Merge tag 'u-boot-stm32-20211110' of https://source.denx.de/u-boot/custodians/u-boot-stm

[J-u-boot.git] / drivers / pinctrl / pinctrl-at91-pio4.c

diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c
index 0c43686e01cc5895912ac2a399ea19d8b691bfa8..26fb5d61d5df7ce9367cdcb345b728b99a552995 100644 (file)
--- a/drivers/pinctrl/pinctrl-at91-pio4.c
+++ b/drivers/pinctrl/pinctrl-at91-pio4.c
@@ -8,7 +8,9 @@
 
 #include <common.h>
 #include <dm.h>
+#include <asm/global_data.h>
 #include <dm/pinctrl.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include <linux/err.h>
 #include <mach/atmel_pio4.h>
@@ -21,8 +23,9 @@ DECLARE_GLOBAL_DATA_PTR;
  * framework groups, Atmel PIO groups will be called banks.
  */
 
-struct atmel_pio4_platdata {
+struct atmel_pio4_plat {
        struct atmel_pio4_port *reg_base;
+       unsigned int slew_rate_support;
 };
 
 static const struct pinconf_param conf_params[] = {
@@ -33,22 +36,30 @@ static const struct pinconf_param conf_params[] = {
        { "input-schmitt-disable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 0 },
        { "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 },
        { "input-debounce", PIN_CONFIG_INPUT_DEBOUNCE, 0 },
+       { "atmel,drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 0 },
+       { "slew-rate", PIN_CONFIG_SLEW_RATE, 0},
 };
 
-static u32 atmel_pinctrl_get_pinconf(const void *blob, int node)
+static u32 atmel_pinctrl_get_pinconf(struct udevice *config,
+                                    struct atmel_pio4_plat *plat)
 {
        const struct pinconf_param *params;
        u32 param, arg, conf = 0;
        u32 i;
+       u32 val;
 
        for (i = 0; i < ARRAY_SIZE(conf_params); i++) {
                params = &conf_params[i];
-               if (!fdt_get_property(blob, node, params->property, NULL))
+               if (!dev_read_prop(config, params->property, NULL))
                        continue;
 
                param = params->param;
                arg = params->default_value;
 
+               /* Keep slew rate enabled by default. */
+               if (plat->slew_rate_support)
+                       conf |= ATMEL_PIO_SR;
+
                switch (param) {
                case PIN_CONFIG_BIAS_DISABLE:
                        conf &= (~ATMEL_PIO_PUEN_MASK);
@@ -81,6 +92,21 @@ static u32 atmel_pinctrl_get_pinconf(const void *blob, int node)
                                conf |= ATMEL_PIO_IFSCEN_MASK;
                        }
                        break;
+               case PIN_CONFIG_DRIVE_STRENGTH:
+                       dev_read_u32(config, params->property, &val);
+                       conf &= (~ATMEL_PIO_DRVSTR_MASK);
+                       conf |= (val << ATMEL_PIO_DRVSTR_OFFSET)
+                               & ATMEL_PIO_DRVSTR_MASK;
+                       break;
+               case PIN_CONFIG_SLEW_RATE:
+                       if (!plat->slew_rate_support)
+                               break;
+
+                       dev_read_u32(config, params->property, &val);
+                       /* And disable it if requested. */
+                       if (val == 0)
+                               conf &= ~ATMEL_PIO_SR;
+                       break;
                default:
                        printf("%s: Unsupported configuration parameter: %u\n",
                               __func__, param);
@@ -94,7 +120,7 @@ static u32 atmel_pinctrl_get_pinconf(const void *blob, int node)
 static inline struct atmel_pio4_port *atmel_pio4_bank_base(struct udevice *dev,
                                                           u32 bank)
 {
-       struct atmel_pio4_platdata *plat = dev_get_platdata(dev);
+       struct atmel_pio4_plat *plat = dev_get_plat(dev);
        struct atmel_pio4_port *bank_base =
                        (struct atmel_pio4_port *)((u32)plat->reg_base +
                        ATMEL_PIO_BANK_OFFSET * bank);
@@ -106,6 +132,7 @@ static inline struct atmel_pio4_port *atmel_pio4_bank_base(struct udevice *dev,
 
 static int atmel_pinctrl_set_state(struct udevice *dev, struct udevice *config)
 {
+       struct atmel_pio4_plat *plat = dev_get_plat(dev);
        struct atmel_pio4_port *bank_base;
        const void *blob = gd->fdt_blob;
        int node = dev_of_offset(config);
@@ -114,7 +141,7 @@ static int atmel_pinctrl_set_state(struct udevice *dev, struct udevice *config)
        u32 i, conf;
        int count;
 
-       conf = atmel_pinctrl_get_pinconf(blob, node);
+       conf = atmel_pinctrl_get_pinconf(config, plat);
 
        count = fdtdec_get_int_array_count(blob, node, "pinmux",
                                           cells, ARRAY_SIZE(cells));
@@ -153,21 +180,25 @@ const struct pinctrl_ops atmel_pinctrl_ops  = {
 
 static int atmel_pinctrl_probe(struct udevice *dev)
 {
-       struct atmel_pio4_platdata *plat = dev_get_platdata(dev);
+       struct atmel_pio4_plat *plat = dev_get_plat(dev);
+       ulong priv = dev_get_driver_data(dev);
        fdt_addr_t addr_base;
 
        dev = dev_get_parent(dev);
-       addr_base = devfdt_get_addr(dev);
+       addr_base = dev_read_addr(dev);
        if (addr_base == FDT_ADDR_T_NONE)
                return -EINVAL;
 
        plat->reg_base = (struct atmel_pio4_port *)addr_base;
+       plat->slew_rate_support = priv;
 
        return 0;
 }
 
 static const struct udevice_id atmel_pinctrl_match[] = {
        { .compatible = "atmel,sama5d2-pinctrl" },
+       { .compatible = "microchip,sama7g5-pinctrl",
+         .data = (ulong)1, },
        {}
 };
 
@@ -176,6 +207,6 @@ U_BOOT_DRIVER(atmel_pinctrl) = {
        .id = UCLASS_PINCTRL,
        .of_match = atmel_pinctrl_match,
        .probe = atmel_pinctrl_probe,
-       .platdata_auto_alloc_size = sizeof(struct atmel_pio4_platdata),
+       .plat_auto      = sizeof(struct atmel_pio4_plat),
        .ops = &atmel_pinctrl_ops,
 };