eficonfig: add "Edit Boot Option" menu entry

[J-u-boot.git] / arch / Kconfig

diff --git a/arch/Kconfig b/arch/Kconfig
index bc31e5ad506b82070a70fcd011c4dc4908370641..c4dc47dccb43a09c5bee2d8fcf6e4cdbbdc7ead2 100644 (file)
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -1,5 +1,5 @@
 config ARCH_MAP_SYSMEM
-       depends on SANDBOX || NDS32
+       depends on SANDBOX
        def_bool y
 
 config CREATE_ARCH_SYMLINK
@@ -8,9 +8,6 @@ config CREATE_ARCH_SYMLINK
 config HAVE_ARCH_IOREMAP
        bool
 
-config NEEDS_MANUAL_RELOC
-       bool
-
 config SYS_CACHE_SHIFT_4
        bool
 
@@ -56,6 +53,8 @@ config ARC
        select SUPPORT_OF_CONTROL
        select SYS_CACHE_SHIFT_7
        select TIMER
+       select SYS_BIG_ENDIAN if CPU_BIG_ENDIAN
+       select SYS_LITTLE_ENDIAN if !CPU_BIG_ENDIAN
 
 config ARM
        bool "ARM architecture"
@@ -76,19 +75,19 @@ config M68K
 
 config MICROBLAZE
        bool "MicroBlaze architecture"
-       select NEEDS_MANUAL_RELOC
        select SUPPORT_OF_CONTROL
-       imply CMD_IRQ
+       imply CMD_TIMER
+       imply SPL_REGMAP if SPL
+       imply SPL_TIMER if SPL
+       imply TIMER
+       imply XILINX_TIMER
 
 config MIPS
        bool "MIPS architecture"
        select HAVE_ARCH_IOREMAP
        select HAVE_PRIVATE_LIBGCC
        select SUPPORT_OF_CONTROL
-
-config NDS32
-       bool "NDS32 architecture"
-       select SUPPORT_OF_CONTROL
+       select SPL_SEPARATE_BSS if SPL
 
 config NIOS2
        bool "Nios II architecture"
@@ -112,6 +111,7 @@ config RISCV
        select SUPPORT_OF_CONTROL
        select OF_CONTROL
        select DM
+       select SPL_SEPARATE_BSS if SPL
        imply DM_SERIAL
        imply DM_ETH
        imply DM_EVENT
@@ -137,6 +137,7 @@ config SANDBOX
        select BZIP2
        select CMD_POWEROFF
        select DM
+       select DM_FUZZING_ENGINE
        select DM_GPIO
        select DM_I2C
        select DM_KEYBOARD
@@ -172,6 +173,7 @@ config SANDBOX
        imply CRC32_VERIFY
        imply FAT_WRITE
        imply FIRMWARE
+       imply FUZZING_ENGINE_SANDBOX
        imply HASH_VERIFY
        imply LZMA
        imply TEE
@@ -367,12 +369,15 @@ config SYS_DISABLE_DCACHE_OPS
         this functionality.
 
 config SYS_IMMR
-       hex
+       hex "Address for the Internal Memory-Mapped Registers (IMMR) window"
        depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A
        default 0xFF000000 if MPC8xx
        default 0xF0000000 if ARCH_MPC8313
        default 0xE0000000 if MPC83xx && !ARCH_MPC8313
        default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
+       default 0xFFE00000 if ARCH_P1010 || ARCH_P1011 || ARCH_P1020 || \
+                             ARCH_P1021 || ARCH_P1024 || ARCH_P1025 || \
+                             ARCH_P2020
        default SYS_CCSRBAR_DEFAULT
        help
          Address for the Internal Memory-Mapped Registers (IMMR) window used
@@ -380,7 +385,7 @@ config SYS_IMMR
 
 config SKIP_LOWLEVEL_INIT
        bool "Skip the calls to certain low level initialization functions"
-       depends on ARM || NDS32 || MIPS || RISCV
+       depends on ARM || MIPS || RISCV
        help
          If enabled, then certain low level initializations (like setting up
          the memory controller) are omitted and/or U-Boot does not relocate
@@ -391,7 +396,7 @@ config SKIP_LOWLEVEL_INIT
 
 config SPL_SKIP_LOWLEVEL_INIT
        bool "Skip the calls to certain low level initialization functions"
-       depends on SPL && (ARM || NDS32 || MIPS || RISCV)
+       depends on SPL && (ARM || MIPS || RISCV)
        help
          If enabled, then certain low level initializations (like setting up
          the memory controller) are omitted and/or U-Boot does not relocate
@@ -440,7 +445,6 @@ source "arch/arm/Kconfig"
 source "arch/m68k/Kconfig"
 source "arch/microblaze/Kconfig"
 source "arch/mips/Kconfig"
-source "arch/nds32/Kconfig"
 source "arch/nios2/Kconfig"
 source "arch/powerpc/Kconfig"
 source "arch/sandbox/Kconfig"
@@ -449,4 +453,32 @@ source "arch/x86/Kconfig"
 source "arch/xtensa/Kconfig"
 source "arch/riscv/Kconfig"
 
+if ARM || M68K || PPC
+
+source "arch/Kconfig.nxp"
+
+endif
+
 source "board/keymile/Kconfig"
+
+if MIPS || MICROBLAZE
+
+choice
+       prompt "Endianness selection"
+       help
+         Some MIPS boards can be configured for either little or big endian
+         byte order. These modes require different U-Boot images. In general there
+         is one preferred byteorder for a particular system but some systems are
+         just as commonly used in the one or the other endianness.
+
+config SYS_BIG_ENDIAN
+       bool "Big endian"
+       depends on (SUPPORTS_BIG_ENDIAN && MIPS) || MICROBLAZE
+
+config SYS_LITTLE_ENDIAN
+       bool "Little endian"
+       depends on (SUPPORTS_LITTLE_ENDIAN && MIPS) || MICROBLAZE
+
+endchoice
+
+endif