mpc83xx: Cleanup usage of DDR constants

[J-u-boot.git] / include / configs / MPC837XEMDS.h

diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index dc4d8773b8bf9fcd54501f3932703115cdf56d91..8c2af084a160c874d3c57149ab00d393cf26d9a2 100644 (file)
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -128,7 +128,10 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE      CONFIG_SYS_DDR_BASE
 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL  DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05
 #define CONFIG_SYS_83XX_DDR_USES_CS0
-#define CONFIG_SYS_DDRCDR_VALUE        0x80080001 /* ODT 150ohm on SoC */
+#define CONFIG_SYS_DDRCDR_VALUE                (DDRCDR_DHC_EN \
+                                       | DDRCDR_ODT \
+                                       | DDRCDR_Q_DRN)
+                                       /* 0x80080001 */ /* ODT 150ohm on SoC */
 
 #undef CONFIG_DDR_ECC          /* support DDR ECC function */
 #undef CONFIG_DDR_ECC_CMD      /* Use DDR ECC user commands */
@@ -147,10 +150,11 @@
 #define CONFIG_SYS_DDR_SIZE            512 /* MB */
 #define CONFIG_SYS_DDR_CS0_BNDS        0x0000001f
 #define CONFIG_SYS_DDR_CS0_CONFIG      (CSCONFIG_EN \
-                               | 0x00010000  /* ODT_WR to CSn */ \
-                               | CSCONFIG_ROW_BIT_14 \
-                               | CSCONFIG_COL_BIT_10)
-                               /* 0x80010202 */
+                       | CSCONFIG_ODT_RD_NEVER  /* ODT_RD to none */ \
+                       | CSCONFIG_ODT_WR_ONLY_CURRENT  /* ODT_WR to CSn */ \
+                       | CSCONFIG_ROW_BIT_14 \
+                       | CSCONFIG_COL_BIT_10)
+                       /* 0x80010202 */
 #define CONFIG_SYS_DDR_TIMING_3        0x00000000
 #define CONFIG_SYS_DDR_TIMING_0        ((0 << TIMING_CFG0_RWT_SHIFT) \
                                | (0 << TIMING_CFG0_WRT_SHIFT) \