*/
-#include <common.h>
#include <clk.h>
#include <dm.h>
#include <i2c.h>
#include <asm/io.h>
#include <wait_bit.h>
+#include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
#define RCAR_I2C_ICSCR 0x00 /* slave ctrl */
#define RCAR_I2C_ICMCR 0x04 /* master ctrl */
#define RCAR_I2C_ICFBSCR 0x38
#define RCAR_I2C_ICFBSCR_TCYC17 0x0f /* 17*Tcyc */
-
enum rcar_i2c_type {
RCAR_I2C_TYPE_GEN2,
RCAR_I2C_TYPE_GEN3,
struct rcar_i2c_priv {
void __iomem *base;
struct clk clk;
+ u32 fall_ns;
+ u32 rise_ns;
u32 intdelay;
u32 icccr;
enum rcar_i2c_type type;
int ret;
for (; nmsgs > 0; nmsgs--, msg++) {
- ret = rcar_i2c_set_addr(dev, msg->addr, 1);
+ ret = rcar_i2c_set_addr(dev, msg->addr, !!(msg->flags & I2C_M_RD));
if (ret)
return ret;
* = F[sum * ick / 1000000000]
* = F[(ick / 1000000) * sum / 1000]
*/
- sum = 35 + 200 + priv->intdelay;
+ sum = priv->fall_ns + priv->rise_ns + priv->intdelay;
round = (ick + 500000) / 1000000 * sum;
round = (round + 500) / 1000;
int ret;
priv->base = dev_read_addr_ptr(dev);
+ priv->rise_ns = dev_read_u32_default(dev,
+ "i2c-scl-rising-time-ns", 200);
+ priv->fall_ns = dev_read_u32_default(dev,
+ "i2c-scl-falling-time-ns", 35);
priv->intdelay = dev_read_u32_default(dev,
"i2c-scl-internal-delay-ns", 5);
priv->type = dev_get_driver_data(dev);
writel(0, priv->base + RCAR_I2C_ICMSR);
writel(0, priv->base + RCAR_I2C_ICMAR);
- ret = rcar_i2c_set_speed(dev, 100000);
+ ret = rcar_i2c_set_speed(dev, I2C_SPEED_STANDARD_RATE);
if (ret)
clk_disable(&priv->clk);
static const struct udevice_id rcar_i2c_ids[] = {
{ .compatible = "renesas,rcar-gen2-i2c", .data = RCAR_I2C_TYPE_GEN2 },
{ .compatible = "renesas,rcar-gen3-i2c", .data = RCAR_I2C_TYPE_GEN3 },
+ { .compatible = "renesas,rcar-gen4-i2c", .data = RCAR_I2C_TYPE_GEN3 },
{ }
};
.id = UCLASS_I2C,
.of_match = rcar_i2c_ids,
.probe = rcar_i2c_probe,
- .priv_auto_alloc_size = sizeof(struct rcar_i2c_priv),
+ .priv_auto = sizeof(struct rcar_i2c_priv),
.ops = &rcar_i2c_ops,
};