Add GPL-2.0+ SPDX-License-Identifier to source files

[J-u-boot.git] / include / configs / M5253DEMO.h

diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h
index 50b3a03a012a1f39b44b5ed51eaf08f1d686b729..bf37fdf14b024ca89031f9bf88cca1f00c54c43c 100644 (file)
--- a/include/configs/M5253DEMO.h
+++ b/include/configs/M5253DEMO.h
@@ -1,24 +1,7 @@
-/*
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+TABILITY or FITNESS FO04-2007 Freescale Semiconductor, Inc.
  * Hayden Fraser ([email protected])
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.         See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+ 
  */
 
 #ifndef _M5253DEMO_H
@@ -33,7 +16,6 @@
 #define CONFIG_MCFUART
 #define CONFIG_SYS_UART_PORT           (0)
 #define CONFIG_BAUDRATE                115200
-#define CONFIG_SYS_BAUDRATE_TABLE      { 9600 , 19200 , 38400 , 57600, 115200 }
 
 #undef CONFIG_WATCHDOG         /* disable watchdog */
 
@@ -57,6 +39,7 @@
  */
 #include <config_cmd_default.h>
 
+#define CONFIG_CMD_CACHE
 #define CONFIG_CMD_LOADB
 #define CONFIG_CMD_LOADS
 #define CONFIG_CMD_EXT2
@@ -85,34 +68,28 @@
 #      define CONFIG_SYS_ATA_REG_OFFSET        0xA0    /* Offset for normal register accesses */
 #      define CONFIG_SYS_ATA_ALT_OFFSET        0xC0    /* Offset for alternate registers */
 #      define CONFIG_SYS_ATA_STRIDE            4       /* Interval between registers */
-#      define _IO_BASE                 0
 #endif
 
-#define CONFIG_NET_MULTI               1
 #define CONFIG_DRIVER_DM9000
 #ifdef CONFIG_DRIVER_DM9000
 #      define CONFIG_DM9000_BASE       (CONFIG_SYS_CS1_BASE | 0x300)
 #      define DM9000_IO                CONFIG_DM9000_BASE
 #      define DM9000_DATA              (CONFIG_DM9000_BASE + 4)
 #      undef CONFIG_DM9000_DEBUG
+#      define CONFIG_DM9000_BYTE_SWAPPED
 
-#      define CONFIG_ETHADDR           00:e0:0c:bc:e5:60
-#      define CONFIG_IPADDR            10.82.121.249
-#      define CONFIG_NETMASK           255.255.252.0
-#      define CONFIG_SERVERIP          10.82.120.80
-#      define CONFIG_GATEWAYIP         10.82.123.254
 #      define CONFIG_OVERWRITE_ETHADDR_ONCE
 
 #      define CONFIG_EXTRA_ENV_SETTINGS                \
                "netdev=eth0\0"                         \
-               "inpclk=" MK_STR(CONFIG_SYS_INPUT_CLKSRC) "\0"  \
+               "inpclk=" __stringify(CONFIG_SYS_INPUT_CLKSRC) "\0"     \
                "loadaddr=10000\0"                      \
                "u-boot=u-boot.bin\0"                   \
                "load=tftp ${loadaddr) ${u-boot}\0"     \
                "upd=run load; run prog\0"              \
-               "prog=prot off 0 2ffff;"        \
-               "era 0 2ffff;"                  \
-               "cp.b ${loadaddr} 0 ${filesize};"       \
+               "prog=prot off 0xff800000 0xff82ffff;"  \
+               "era 0xff800000 0xff82ffff;"            \
+               "cp.b ${loadaddr} 0xff800000 ${filesize};"      \
                "save\0"                                \
                ""
 #endif
@@ -172,9 +149,8 @@
  * Definitions for initial stack pointer and data area (in DPRAM)
  */
 #define CONFIG_SYS_INIT_RAM_ADDR       0x20000000
-#define CONFIG_SYS_INIT_RAM_END        0x10000 /* End of used area in internal SRAM */
-#define CONFIG_SYS_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE       0x10000 /* Size of used area in internal SRAM */
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 /*
@@ -232,6 +208,20 @@
 /* Cache Configuration */
 #define CONFIG_SYS_CACHELINE_SIZE      16
 
+#define ICACHE_STATUS                  (CONFIG_SYS_INIT_RAM_ADDR + \
+                                        CONFIG_SYS_INIT_RAM_SIZE - 8)
+#define DCACHE_STATUS                  (CONFIG_SYS_INIT_RAM_ADDR + \
+                                        CONFIG_SYS_INIT_RAM_SIZE - 4)
+#define CONFIG_SYS_ICACHE_INV          (CF_CACR_DCM)
+#define CONFIG_SYS_CACHE_ACR0          (CONFIG_SYS_FLASH_BASE | \
+                                        CF_ADDRMASK(8) | \
+                                        CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ACR1          (CONFIG_SYS_SDRAM_BASE | \
+                                        CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+                                        CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR         (CF_CACR_CENB | CF_CACR_CEIB | \
+                                        CF_CACR_DBWE)
+
 /* Port configuration */
 #define CONFIG_SYS_FECI2C              0xF0