stdio: Drop #ifdefs in the header file

[J-u-boot.git] / include / virtex2.h

diff --git a/include/virtex2.h b/include/virtex2.h
index 7b7825f513e358be83dbbbb753bd75569892d007..7e8d93f24da45d094ef379f04ae948021a35f6d1 100644 (file)
--- a/include/virtex2.h
+++ b/include/virtex2.h
@@ -1,9 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2002
  * Rich Ireland, Enterasys Networks, [email protected].
  * Keith Outwater, [email protected]
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef _VIRTEX2_H_
@@ -11,10 +10,8 @@
 
 #include <xilinx.h>
 
-extern struct xilinx_fpga_op virtex2_op;
-
 /*
- * Slave SelectMap Implementation function table.
+ * Slave SelectMap or Serial Implementation function table.
  */
 typedef struct {
        xilinx_pre_fn   pre;
@@ -27,25 +24,25 @@ typedef struct {
        xilinx_wr_fn    wr;
        xilinx_rdata_fn rdata;
        xilinx_wdata_fn wdata;
+       xilinx_bwr_fn   wbulkdata;
        xilinx_busy_fn  busy;
        xilinx_abort_fn abort;
        xilinx_post_fn  post;
-} xilinx_virtex2_slave_selectmap_fns;
+} xilinx_virtex2_slave_fns;
 
-/* Slave Serial Implementation function table */
-typedef struct {
-       xilinx_pgm_fn   pgm;
-       xilinx_clk_fn   clk;
-       xilinx_rdata_fn rdata;
-       xilinx_wdata_fn wdata;
-} xilinx_virtex2_slave_serial_fns;
+#if defined(CONFIG_FPGA_VIRTEX2)
+extern struct xilinx_fpga_op virtex2_op;
+# define FPGA_VIRTEX2_OPS      &virtex2_op
+#else
+# define FPGA_VIRTEX2_OPS      NULL
+#endif
 
 /* Device Image Sizes (in bytes)
  *********************************************************************/
-#define XILINX_XC2V40_SIZE             (338208 / 8)
-#define XILINX_XC2V80_SIZE             (597408 / 8)
-#define XILINX_XC2V250_SIZE            (1591584 / 8)
-#define XILINX_XC2V500_SIZE            (2557857 / 8)
+#define XILINX_XC2V40_SIZE     (338208 / 8)
+#define XILINX_XC2V80_SIZE     (597408 / 8)
+#define XILINX_XC2V250_SIZE    (1591584 / 8)
+#define XILINX_XC2V500_SIZE    (2557857 / 8)
 #define XILINX_XC2V1000_SIZE   (3749408 / 8)
 #define XILINX_XC2V1500_SIZE   (5166240 / 8)
 #define XILINX_XC2V2000_SIZE   (6808352 / 8)
@@ -58,39 +55,51 @@ typedef struct {
 /* Descriptor Macros
  *********************************************************************/
 #define XILINX_XC2V40_DESC(iface, fn_table, cookie)    \
-{ xilinx_virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie, \
+       FPGA_VIRTEX2_OPS }
 
 #define XILINX_XC2V80_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie, \
+       FPGA_VIRTEX2_OPS }
 
 #define XILINX_XC2V250_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie, \
+       FPGA_VIRTEX2_OPS }
 
 #define XILINX_XC2V500_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie, \
+       FPGA_VIRTEX2_OPS }
 
 #define XILINX_XC2V1000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie, \
+       FPGA_VIRTEX2_OPS }
 
 #define XILINX_XC2V1500_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie, \
+       FPGA_VIRTEX2_OPS }
 
 #define XILINX_XC2V2000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie, \
+       FPGA_VIRTEX2_OPS }
 
 #define XILINX_XC2V3000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie, \
+       FPGA_VIRTEX2_OPS }
 
 #define XILINX_XC2V4000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie, \
+       FPGA_VIRTEX2_OPS }
 
 #define XILINX_XC2V6000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie, \
+       FPGA_VIRTEX2_OPS }
 
 #define XILINX_XC2V8000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie, \
+       FPGA_VIRTEX2_OPS }
 
 #define XILINX_XC2V10000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie, \
+       FPGA_VIRTEX2_OPS }
 
 #endif /* _VIRTEX2_H_ */