command: Remove the cmd_tbl_t typedef

[J-u-boot.git] / arch / arm / mach-imx / imx_bootaux.c

diff --git a/arch/arm/mach-imx/imx_bootaux.c b/arch/arm/mach-imx/imx_bootaux.c
index 18d7e6819cb13f8603e4af78493958c9c13bfb28..ca823e686169ad36bfed93601cc7089a135f8d99 100644 (file)
--- a/arch/arm/mach-imx/imx_bootaux.c
+++ b/arch/arm/mach-imx/imx_bootaux.c
@@ -7,26 +7,54 @@
 #include <asm/io.h>
 #include <asm/mach-imx/sys_proto.h>
 #include <command.h>
+#include <elf.h>
 #include <imx_sip.h>
 #include <linux/compiler.h>
+#include <cpu_func.h>
 
-int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data)
+int arch_auxiliary_core_up(u32 core_id, ulong addr)
 {
        ulong stack, pc;
 
-       if (!boot_private_data)
+       if (!addr)
                return -EINVAL;
 
-       stack = *(u32 *)boot_private_data;
-       pc = *(u32 *)(boot_private_data + 4);
+#ifdef CONFIG_IMX8M
+       stack = *(u32 *)addr;
+       pc = *(u32 *)(addr + 4);
+#else
+       /*
+        * handling ELF64 binaries
+        * isn't supported yet.
+        */
+       if (valid_elf_image(addr)) {
+               stack = 0x0;
+               pc = load_elf_image_phdr(addr);
+               if (!pc)
+                       return CMD_RET_FAILURE;
+
+       } else {
+               /*
+                * Assume binary file with vector table at the beginning.
+                * Cortex-M4 vector tables start with the stack pointer (SP)
+                * and reset vector (initial PC).
+                */
+               stack = *(u32 *)addr;
+               pc = *(u32 *)(addr + 4);
+       }
+#endif
+       printf("## Starting auxiliary core stack = 0x%08lX, pc = 0x%08lX...\n",
+              stack, pc);
 
        /* Set the stack and pc to M4 bootROM */
        writel(stack, M4_BOOTROM_BASE_ADDR);
        writel(pc, M4_BOOTROM_BASE_ADDR + 4);
 
+       flush_dcache_all();
+
        /* Enable M4 */
 #ifdef CONFIG_IMX8M
-       call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0);
+       call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0, 0);
 #else
        clrsetbits_le32(SRC_BASE_ADDR + SRC_M4_REG_OFFSET,
                        SRC_M4C_NON_SCLR_RST_MASK, SRC_M4_ENABLE_MASK);
@@ -38,7 +66,7 @@ int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data)
 int arch_auxiliary_core_check_up(u32 core_id)
 {
 #ifdef CONFIG_IMX8M
-       return call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_STARTED, 0, 0);
+       return call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_STARTED, 0, 0, 0);
 #else
        unsigned int val;
 
@@ -64,7 +92,8 @@ int arch_auxiliary_core_check_up(u32 core_id)
  * The TCMUL is mapped to (M4_BOOTROM_BASE_ADDR) at A core side for
  * accessing the M4 TCMUL.
  */
-static int do_bootaux(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_bootaux(struct cmd_tbl *cmdtp, int flag, int argc,
+                     char *const argv[])
 {
        ulong addr;
        int ret, up;
@@ -80,7 +109,8 @@ static int do_bootaux(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
        addr = simple_strtoul(argv[1], NULL, 16);
 
-       printf("## Starting auxiliary core at 0x%08lX ...\n", addr);
+       if (!addr)
+               return CMD_RET_FAILURE;
 
        ret = arch_auxiliary_core_up(0, addr);
        if (ret)