Merge branch 'network_master' of https://source.denx.de/u-boot/custodians/u-boot...

[J-u-boot.git] / include / configs / ls1021atsn.h

diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h
index 0dd891b57ec29dd22ceb814128fb3299dedbc4bb..f70b6e94c079808cf03f34151fa9ff4b13730e0f 100644 (file)
--- a/include/configs/ls1021atsn.h
+++ b/include/configs/ls1021atsn.h
@@ -12,9 +12,6 @@
 
 #define CONFIG_DEEP_SLEEP
 
-/* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + 16 * 1024 * 1024)
-
 #define CONFIG_SYS_INIT_RAM_ADDR       OCRAM_BASE_ADDR
 #define CONFIG_SYS_INIT_RAM_SIZE       OCRAM_SIZE
 
@@ -22,7 +19,6 @@
 #define CONFIG_USB_MAX_CONTROLLER_COUNT        1
 
 #define CONFIG_SYS_CLK_FREQ            100000000
-#define CONFIG_DDR_CLK_FREQ            100000000
 
 #define DDR_SDRAM_CFG                  0x470c0008
 #define DDR_CS0_BNDS                   0x008000bf
@@ -51,15 +47,7 @@
 #define SDRAM_CFG2_FRC_SR              0x80000000
 #define SDRAM_CFG_BI                   0x00000001
 
-#ifdef CONFIG_RAMBOOT_PBL
-#define CONFIG_SYS_FSL_PBL_PBI \
-               "board/freescale/ls1021atsn/ls102xa_pbi.cfg"
-#endif
-
 #ifdef CONFIG_SD_BOOT
-#define CONFIG_SYS_FSL_PBL_RCW \
-               "board/freescale/ls1021atsn/ls102xa_rcw_sd.cfg"
-
 #ifdef CONFIG_NXP_ESBC
 #define CONFIG_U_BOOT_HDR_SIZE         (16 << 10)
 #endif /* ifdef CONFIG_NXP_ESBC */
@@ -104,23 +92,10 @@
 #define CONFIG_SYS_NS16550_CLK         get_serial_clock()
 
 /* I2C */
-#if !CONFIG_IS_ENABLED(DM_I2C)
-#define CONFIG_SYS_I2C_LEGACY
-#else
-#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
-#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
-#endif
-#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 
 /* EEPROM */
-#define CONFIG_ID_EEPROM
 #define CONFIG_SYS_I2C_EEPROM_NXID
 #define CONFIG_SYS_EEPROM_BUS_NUM      0
-#define CONFIG_SYS_I2C_EEPROM_ADDR     0x51
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
 
 /* QSPI */
 #define FSL_QSPI_FLASH_SIZE            (1 << 24)
@@ -220,8 +195,6 @@
 #define CONFIG_SYS_MAXARGS             16      /* max number of command args */
 #define CONFIG_SYS_BARGSIZE            CONFIG_SYS_CBSIZE
 
-#define CONFIG_SYS_LOAD_ADDR           0x82000000
-
 #define CONFIG_LS102XA_STREAM_ID
 
 #define CONFIG_SYS_INIT_SP_OFFSET \