+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2013 Google, Inc
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <dt-structs.h>
#include <dwmmc.h>
#include <errno.h>
+#include <log.h>
#include <mapmem.h>
#include <pwrseq.h>
#include <syscon.h>
#include <asm/gpio.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/periph.h>
+#include <asm/arch-rockchip/clock.h>
+#include <asm/arch-rockchip/periph.h>
+#include <linux/delay.h>
#include <linux/err.h>
-DECLARE_GLOBAL_DATA_PTR;
-
struct rockchip_mmc_plat {
#if CONFIG_IS_ENABLED(OF_PLATDATA)
struct dtd_rockchip_rk3288_dw_mshc dtplat;
struct dwmci_host *host = &priv->host;
host->name = dev->name;
- host->ioaddr = (void *)dev_get_addr(dev);
- host->buswidth = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
- "bus-width", 4);
+ host->ioaddr = dev_read_addr_ptr(dev);
+ host->buswidth = dev_read_u32_default(dev, "bus-width", 4);
host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
host->priv = dev;
/* use non-removeable as sdcard and emmc as judgement */
- if (fdtdec_get_bool(gd->fdt_blob, dev->of_offset, "non-removable"))
+ if (dev_read_bool(dev, "non-removable"))
host->dev_index = 0;
else
host->dev_index = 1;
- priv->fifo_depth = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
- "fifo-depth", 0);
+ priv->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0);
+
if (priv->fifo_depth < 0)
return -EINVAL;
- priv->fifo_mode = fdtdec_get_bool(gd->fdt_blob, dev->of_offset,
- "fifo-mode");
- if (fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
- "clock-freq-min-max", priv->minmax, 2))
- return -EINVAL;
+ priv->fifo_mode = dev_read_bool(dev, "fifo-mode");
+
+#ifdef CONFIG_SPL_BUILD
+ if (!priv->fifo_mode)
+ priv->fifo_mode = dev_read_bool(dev, "u-boot,spl-fifo-mode");
+#endif
+
+ /*
+ * 'clock-freq-min-max' is deprecated
+ * (see https://github.com/torvalds/linux/commit/b023030f10573de738bbe8df63d43acab64c9f7b)
+ */
+ if (dev_read_u32_array(dev, "clock-freq-min-max", priv->minmax, 2)) {
+ int val = dev_read_u32_default(dev, "max-frequency", -EINVAL);
+
+ if (val < 0)
+ return val;
+
+ priv->minmax[0] = 400000; /* 400 kHz */
+ priv->minmax[1] = val;
+ } else {
+ debug("%s: 'clock-freq-min-max' property was deprecated.\n",
+ __func__);
+ }
#endif
return 0;
}
host->dev_index = 0;
priv->fifo_depth = dtplat->fifo_depth;
priv->fifo_mode = 0;
- memcpy(priv->minmax, dtplat->clock_freq_min_max, sizeof(priv->minmax));
+ priv->minmax[0] = 400000; /* 400 kHz */
+ priv->minmax[1] = dtplat->max_frequency;
- ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &priv->clk);
+ ret = clk_get_by_driver_info(dev, dtplat->clocks, &priv->clk);
if (ret < 0)
return ret;
#else
}
static const struct udevice_id rockchip_dwmmc_ids[] = {
+ { .compatible = "rockchip,rk2928-dw-mshc" },
{ .compatible = "rockchip,rk3288-dw-mshc" },
{ }
};
-U_BOOT_DRIVER(rockchip_dwmmc_drv) = {
+U_BOOT_DRIVER(rockchip_rk3288_dw_mshc) = {
.name = "rockchip_rk3288_dw_mshc",
.id = UCLASS_MMC,
.of_match = rockchip_dwmmc_ids,
.ops = &dm_dwmci_ops,
.bind = rockchip_dwmmc_bind,
.probe = rockchip_dwmmc_probe,
- .priv_auto_alloc_size = sizeof(struct rockchip_dwmmc_priv),
- .platdata_auto_alloc_size = sizeof(struct rockchip_mmc_plat),
+ .priv_auto = sizeof(struct rockchip_dwmmc_priv),
+ .plat_auto = sizeof(struct rockchip_mmc_plat),
};
+U_BOOT_DRIVER_ALIAS(rockchip_rk3288_dw_mshc, rockchip_rk3328_dw_mshc)
+U_BOOT_DRIVER_ALIAS(rockchip_rk3288_dw_mshc, rockchip_rk3368_dw_mshc)
+
#ifdef CONFIG_PWRSEQ
static int rockchip_dwmmc_pwrseq_set_power(struct udevice *dev, bool enable)
{