information that is embedded into the binary to support U-Boot
relocating itself to the top-of-RAM later during execution.
-config SYS_INIT_SP_BSS_OFFSET
- int
+config INIT_SP_RELATIVE
+ bool "Specify the early stack pointer relative to the .bss section"
help
U-Boot typically uses a hard-coded value for the stack pointer
- before relocation. Define this option to instead calculate the
+ before relocation. Enable this option to instead calculate the
initial SP at run-time. This is useful to avoid hard-coding addresses
into U-Boot, so that can be loaded and executed at arbitrary
- addresses and thus avoid using arbitrary addresses at runtime. This
- option's value is the offset added to &_bss_start in order to
+ addresses and thus avoid using arbitrary addresses at runtime.
+
+ If this option is enabled, the early stack pointer is set to
+ &_bss_start with a offset value added. The offset is specified by
+ SYS_INIT_SP_BSS_OFFSET.
+
+config SYS_INIT_SP_BSS_OFFSET
+ int "Early stack offset from the .bss base address"
+ depends on INIT_SP_RELATIVE
+ default 524288
+ help
+ This option's value is the offset added to &_bss_start in order to
calculate the stack pointer. This offset should be large enough so
that the early malloc region, global data (gd), and early stack usage
do not overlap any appended DTB.
config THUMB2_KERNEL
bool
+config SYS_ICACHE_OFF
+ bool "Do not enable icache"
+ default n
+ help
+ Do not enable instruction cache in U-Boot.
+
+config SPL_SYS_ICACHE_OFF
+ bool "Do not enable icache in SPL"
+ depends on SPL
+ default SYS_ICACHE_OFF
+ help
+ Do not enable instruction cache in SPL.
+
+config SYS_DCACHE_OFF
+ bool "Do not enable dcache"
+ default n
+ help
+ Do not enable data cache in U-Boot.
+
+config SPL_SYS_DCACHE_OFF
+ bool "Do not enable dcache in SPL"
+ depends on SPL
+ default SYS_DCACHE_OFF
+ help
+ Do not enable data cache in SPL.
+
config SYS_ARM_CACHE_CP15
bool "CP15 based cache enabling support"
help
density. For ARM architectures that support Thumb2 this flag will
result in Thumb2 code generated by GCC.
+config TPL_SYS_THUMB_BUILD
+ bool "Build TPL using the Thumb instruction set"
+ default y if SYS_THUMB_BUILD
+ depends on TPL && !ARM64
+ help
+ Use this flag to build SPL using the Thumb instruction set for
+ ARM architectures. Thumb instruction set provides better code
+ density. For ARM architectures that support Thumb2 this flag will
+ result in Thumb2 code generated by GCC.
+
+
config SYS_L2CACHE_OFF
bool "L2cache off"
help
Such implementation may be faster under some conditions
but may increase the binary size.
+config TPL_USE_ARCH_MEMCPY
+ bool "Use an assembly optimized implementation of memcpy for TPL"
+ default y if USE_ARCH_MEMCPY
+ depends on !ARM64
+ help
+ Enable the generation of an optimized version of memcpy.
+ Such implementation may be faster under some conditions
+ but may increase the binary size.
+
config USE_ARCH_MEMSET
bool "Use an assembly optimized implementation of memset"
default y
Such implementation may be faster under some conditions
but may increase the binary size.
+config TPL_USE_ARCH_MEMSET
+ bool "Use an assembly optimized implementation of memset for TPL"
+ default y if USE_ARCH_MEMSET
+ depends on !ARM64
+ help
+ Enable the generation of an optimized version of memset.
+ Such implementation may be faster under some conditions
+ but may increase the binary size.
+
config ARM64_SUPPORT_AARCH32
bool "ARM64 system support AArch32 execution state"
default y if ARM64 && !TARGET_THUNDERX_88XX
config ARCH_RMOBILE
bool "Renesas ARM SoCs"
- select BOARD_EARLY_INIT_F
+ select BOARD_EARLY_INIT_F if !RZA1
select DM
select DM_SERIAL
imply CMD_DM
imply DM_SPI
imply DM_SPI_FLASH
imply FAT_WRITE
+ imply SPL
+ imply SPL_DM
imply SPL_LIBDISK_SUPPORT
imply SPL_MMC_SUPPORT
imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
imply SPL_SPI_FLASH_SUPPORT
imply SPL_SPI_SUPPORT
+ imply L2X0_CACHE
config ARCH_SUNXI
bool "Support sunxi (Allwinner) SoCs"
select DM_ETH
select DM_GPIO
select DM_KEYBOARD
+ select DM_MMC if MMC
+ select DM_SCSI if SCSI
select DM_SERIAL
select DM_USB if DISTRO_DEFAULTS
select OF_BOARD_SETUP
development platform that supports the QorIQ LS1012A
Layerscape Architecture processor.
+config TARGET_LS1028AQDS
+ bool "Support ls1028aqds"
+ select ARCH_LS1028A
+ select ARM64
+ select ARMV8_MULTIENTRY
+ help
+ Support for Freescale LS1028AQDS platform
+ The LS1028A Development System (QDS) is a high-performance
+ development platform that supports the QorIQ LS1028A
+ Layerscape Architecture processor.
+
+config TARGET_LS1028ARDB
+ bool "Support ls1028ardb"
+ select ARCH_LS1028A
+ select ARM64
+ select ARMV8_MULTIENTRY
+ help
+ Support for Freescale LS1028ARDB platform
+ The LS1028A Development System (RDB) is a high-performance
+ development platform that supports the QorIQ LS1028A
+ Layerscape Architecture processor.
+
config TARGET_LS1088ARDB
bool "Support ls1088ardb"
select ARCH_LS1088A
development platform that supports the QorIQ LS1046A
Layerscape Architecture processor.
+config TARGET_LS1046AFRWY
+ bool "Support ls1046afrwy"
+ select ARCH_LS1046A
+ select ARM64
+ select ARMV8_MULTIENTRY
+ select BOARD_EARLY_INIT_F
+ select BOARD_LATE_INIT
+ select DM_SPI_FLASH if DM_SPI
+ imply SCSI
+ help
+ Support for Freescale LS1046AFRWY platform.
+ The LS1046A Freeway Board (FRWY) is a high-performance
+ development platform that supports the QorIQ LS1046A
+ Layerscape Architecture processor.
config TARGET_H2200
bool "Support h2200"
select CPU_PXA
-config TARGET_ZIPITZ2
- bool "Support zipitz2"
- select CPU_PXA
-
config TARGET_COLIBRI_PXA270
bool "Support colibri_pxa270"
select CPU_PXA
select SYSCON
select SYSRESET
select SYS_THUMB_BUILD
+ imply SPL_SYSRESET
imply CMD_DM
imply CMD_POWEROFF
imply ENV_VARS_UBOOT_RUNTIME_CONFIG
+ imply USE_PREBOOT
help
Support for STM32MP SoC family developed by STMicroelectronics,
MPUs based on ARM cortex A core
select SYS_THUMB_BUILD if !ARM64
imply ADC
imply CMD_DM
+ imply DEBUG_UART_BOARD_INIT
imply DISTRO_DEFAULTS
imply FAT_WRITE
imply SARADC_ROCKCHIP
config TI_SECURE_DEVICE
bool "HS Device Type Support"
- depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS
+ depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
help
If a high secure (HS) device type is being used, this config
must be set. This option impacts various aspects of the
source "board/freescale/ls2080aqds/Kconfig"
source "board/freescale/ls2080ardb/Kconfig"
source "board/freescale/ls1088a/Kconfig"
+source "board/freescale/ls1028a/Kconfig"
source "board/freescale/ls1021aqds/Kconfig"
source "board/freescale/ls1043aqds/Kconfig"
source "board/freescale/ls1021atwr/Kconfig"
source "board/freescale/ls1046aqds/Kconfig"
source "board/freescale/ls1043ardb/Kconfig"
source "board/freescale/ls1046ardb/Kconfig"
+source "board/freescale/ls1046afrwy/Kconfig"
source "board/freescale/ls1012aqds/Kconfig"
source "board/freescale/ls1012ardb/Kconfig"
source "board/freescale/ls1012afrdm/Kconfig"
source "board/ucRobotics/bubblegum_96/Kconfig"
source "board/birdland/bav335x/Kconfig"
source "board/toradex/colibri_pxa270/Kconfig"
+source "board/variscite/dart_6ul/Kconfig"
source "board/vscom/baltos/Kconfig"
source "board/woodburn/Kconfig"
source "board/xilinx/Kconfig"
source "board/xilinx/zynq/Kconfig"
source "board/xilinx/zynqmp/Kconfig"
-source "board/zipitz2/Kconfig"
source "arch/arm/Kconfig.debug"