Use jr as register jump instruction

[J-u-boot.git] / cpu / mips / cache.S

diff --git a/cpu/mips/cache.S b/cpu/mips/cache.S
index 89ada716c3adbe60b3ed912531fb9d23edfc4abc..f5939683208f03ccf985b0f0025a4cd70efd02c1 100644 (file)
--- a/cpu/mips/cache.S
+++ b/cpu/mips/cache.S
@@ -282,7 +282,7 @@ LEAF(dcache_disable)
        and     t0, t0, t1
        ori     t0, t0, CONF_CM_UNCACHED
        mtc0    t0, CP0_CONFIG
-       j       ra
+       jr      ra
        END(dcache_disable)
 
 #ifdef CFG_INIT_RAM_LOCK_MIPS
@@ -308,7 +308,7 @@ mips_cache_lock:
        move    a1, a2
        icacheop(a0,a1,a2,a3,0x1d)
 
-       j       ra
+       jr      ra
 
        .end    mips_cache_lock
 #endif /* CFG_INIT_RAM_LOCK_MIPS */