+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
*/
#include <common.h>
#include <asm/fec.h>
#endif
#include <asm/immap.h>
+#include <linux/mii.h>
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
+#if defined(CONFIG_CMD_NET)
#undef MII_DEBUG
#undef ET_DEBUG
for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) {
- phytype = mii_send(mk_mii_read(phyno, PHY_PHYIDR1));
+ phytype = mii_send(mk_mii_read(phyno, MII_PHYSID1));
#ifdef ET_DEBUG
printf("PHY type 0x%x pass %d type\n", phytype, pass);
#endif
phyaddr = phyno;
phytype <<= 16;
phytype |=
- mii_send(mk_mii_read(phyno, PHY_PHYIDR2));
+ mii_send(mk_mii_read(phyno, MII_PHYSID2));
#ifdef ET_DEBUG
printf("PHY @ 0x%x pass %d\n", phyno, pass);
#endif
- for (i = 0; (i < (sizeof(phyinfo) / sizeof(phy_info_t)))
+ for (i = 0; (i < ARRAY_SIZE(phyinfo))
&& (phyinfo[i].phyid != 0); i++) {
if (phyinfo[i].phyid == phytype) {
#ifdef ET_DEBUG
status = 0;
i++;
/* Read PHY control register */
- miiphy_read(dev->name, info->phy_addr, PHY_BMCR, &status);
+ miiphy_read(dev->name, info->phy_addr, MII_BMCR, &status);
/* If phy set to autonegotiate, wait for autonegotiation done,
* if phy is not autonegotiating, just wait for link up.
*/
- if ((status & PHY_BMCR_AUTON) == PHY_BMCR_AUTON) {
- linkgood = (PHY_BMSR_AUTN_COMP | PHY_BMSR_LS);
+ if ((status & BMCR_ANENABLE) == BMCR_ANENABLE) {
+ linkgood = (BMSR_ANEGCOMPLETE | BMSR_LSTATUS);
} else {
- linkgood = PHY_BMSR_LS;
+ linkgood = BMSR_LSTATUS;
}
/* Read PHY status register */
- miiphy_read(dev->name, info->phy_addr, PHY_BMSR, &status);
+ miiphy_read(dev->name, info->phy_addr, MII_BMSR, &status);
if ((status & linkgood) == linkgood)
break;
* Otherwise they hang in mii_send() !!! Sorry!
*/
-int mcffec_miiphy_read(char *devname, unsigned char addr, unsigned char reg,
- unsigned short *value)
+int mcffec_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
{
short rdreg; /* register working value */
#endif
rdreg = mii_send(mk_mii_read(addr, reg));
- *value = rdreg;
-
#ifdef MII_DEBUG
- printf("0x%04x\n", *value);
+ printf("0x%04x\n", rdreg);
#endif
- return 0;
+ return rdreg;
}
-int mcffec_miiphy_write(char *devname, unsigned char addr, unsigned char reg,
- unsigned short value)
+int mcffec_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
+ u16 value)
{
- short rdreg; /* register working value */
-
#ifdef MII_DEBUG
- printf("miiphy_write(0x%x) @ 0x%x = ", reg, addr);
+ printf("miiphy_write(0x%x) @ 0x%x = 0x%04x\n", reg, addr, value);
#endif
- rdreg = mii_send(mk_mii_write(addr, reg, value));
-
-#ifdef MII_DEBUG
- printf("0x%04x\n", value);
-#endif
+ mii_send(mk_mii_write(addr, reg, value));
return 0;
}
-#endif /* CONFIG_CMD_NET, FEC_ENET & NET_MULTI */
+#endif /* CONFIG_CMD_NET */