mtd: nand: Move Toshiba specific init/detection logic in nand_toshiba.c

[J-u-boot.git] / drivers / mtd / nand / raw / nand_base.c

diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 5698c1e6a229715a86bd95f899c8d7249b1b7511..4ea7f10a06fcda306c0a09f87f3317e818f3004d 100644 (file)
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -4163,12 +4163,11 @@ static int nand_get_bits_per_cell(u8 cellinfo)
 void nand_decode_ext_id(struct nand_chip *chip)
 {
        struct mtd_info *mtd = &chip->mtd;
-       int extid, id_len;
+       int extid;
        /* The 3rd id byte holds MLC / multichip data */
        chip->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]);
        /* The 4th id byte is the important one */
        extid = chip->id.data[3];
-       id_len = chip->id.len;
 
        /* Calc pagesize */
        mtd->writesize = 1024 << (extid & 0x03);
@@ -4184,21 +4183,6 @@ void nand_decode_ext_id(struct nand_chip *chip)
        /* Get buswidth information */
        if (extid & 0x1)
                chip->options |= NAND_BUSWIDTH_16;
-
-       /*
-        * Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per
-        * 512B page. For Toshiba SLC, we decode the 5th/6th byte as
-        * follows:
-        * - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm,
-        *                         110b -> 24nm
-        * - ID byte 5, bit[7]:    1 -> BENAND, 0 -> raw SLC
-        */
-       if (id_len >= 6 && chip->id.data[0] == NAND_MFR_TOSHIBA &&
-           nand_is_slc(chip) &&
-           (chip->id.data[5] & 0x7) == 0x6 /* 24nm */ &&
-           !(chip->id.data[4] & 0x80) /* !BENAND */) {
-               mtd->oobsize = 32 * mtd->writesize >> 9;
-       }
 }
 EXPORT_SYMBOL_GPL(nand_decode_ext_id);
 
@@ -4289,8 +4273,7 @@ static void nand_decode_bbm_options(struct mtd_info *mtd,
         * AMD/Spansion, and Macronix.  All others scan only the first page.
         */
        if ((nand_is_slc(chip) &&
-            (maf_id == NAND_MFR_TOSHIBA ||
-             maf_id == NAND_MFR_AMD ||
+            (maf_id == NAND_MFR_AMD ||
              maf_id == NAND_MFR_MACRONIX)) ||
            (mtd->writesize == 2048 && maf_id == NAND_MFR_MICRON))
                chip->bbt_options |= NAND_BBT_SCAN2NDPAGE;