#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 70
/*
#define CONFIG_ENV_IS_IN_EEPROM 1
-#define CFG_ENV_OFFSET 0
-#define CFG_ENV_SIZE 256
+#define CONFIG_ENV_OFFSET 0
+#define CONFIG_ENV_SIZE 256
*/
/* If CFG_AMD_BOOT is defined, the the system will boot from AMD.
*/
#define CONFIG_ENV_IS_IN_FLASH 1
#if defined (CFG_AMD_BOOT)
-#define CFG_ENV_ADDR (CFG_FLASH0_BASE + CFG_CS0_MASK - PHYS_AMD_SECT_SIZE)
-#define CFG_ENV_SIZE PHYS_AMD_SECT_SIZE
-#define CFG_ENV_SECT_SIZE PHYS_AMD_SECT_SIZE
-#define CFG_ENV1_ADDR (CFG_FLASH1_BASE + CFG_CS1_MASK - PHYS_INTEL_SECT_SIZE)
-#define CFG_ENV1_SIZE PHYS_INTEL_SECT_SIZE
-#define CFG_ENV1_SECT_SIZE PHYS_INTEL_SECT_SIZE
+#define CONFIG_ENV_ADDR (CFG_FLASH0_BASE + CFG_CS0_MASK - PHYS_AMD_SECT_SIZE)
+#define CONFIG_ENV_SIZE PHYS_AMD_SECT_SIZE
+#define CONFIG_ENV_SECT_SIZE PHYS_AMD_SECT_SIZE
+#define CONFIG_ENV1_ADDR (CFG_FLASH1_BASE + CFG_CS1_MASK - PHYS_INTEL_SECT_SIZE)
+#define CONFIG_ENV1_SIZE PHYS_INTEL_SECT_SIZE
+#define CONFIG_ENV1_SECT_SIZE PHYS_INTEL_SECT_SIZE
#else
-#define CFG_ENV_ADDR (CFG_FLASH0_BASE + CFG_CS0_MASK - PHYS_INTEL_SECT_SIZE)
-#define CFG_ENV_SIZE PHYS_INTEL_SECT_SIZE
-#define CFG_ENV_SECT_SIZE PHYS_INTEL_SECT_SIZE
-#define CFG_ENV1_ADDR (CFG_FLASH1_BASE + CFG_CS1_MASK - PHYS_AMD_SECT_SIZE)
-#define CFG_ENV1_SIZE PHYS_AMD_SECT_SIZE
-#define CFG_ENV1_SECT_SIZE PHYS_AMD_SECT_SIZE
+#define CONFIG_ENV_ADDR (CFG_FLASH0_BASE + CFG_CS0_MASK - PHYS_INTEL_SECT_SIZE)
+#define CONFIG_ENV_SIZE PHYS_INTEL_SECT_SIZE
+#define CONFIG_ENV_SECT_SIZE PHYS_INTEL_SECT_SIZE
+#define CONFIG_ENV1_ADDR (CFG_FLASH1_BASE + CFG_CS1_MASK - PHYS_AMD_SECT_SIZE)
+#define CONFIG_ENV1_SIZE PHYS_AMD_SECT_SIZE
+#define CONFIG_ENV1_SECT_SIZE PHYS_AMD_SECT_SIZE
#endif
#define CONFIG_ENV_OVERWRITE 1