+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2000-2002
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
*/
/*
#ifndef __PPC_ASM_TMPL__
#define __PPC_ASM_TMPL__
+#include <config.h>
+
/***************************************************************************
*
* These definitions simplify the ugly declarations necessary for GOT
#define r30 30
#define r31 31
-
-#if defined(CONFIG_8xx) || defined(CONFIG_MPC824X)
+#if defined(CONFIG_MPC8xx)
/* Some special registers */
#define LCTRL2 157 /* Load/Store Support (37-41) */
#define ICTRL 158
-#endif /* CONFIG_8xx, CONFIG_MPC824X */
-
+#endif /* CONFIG_MPC8xx */
-#if defined(CONFIG_5xx)
-/* Some special purpose registers */
-#define DER 149 /* Debug Enable Register */
-#define COUNTA 150 /* Breakpoint Counter */
-#define COUNTB 151 /* Breakpoint Counter */
-#define LCTRL1 156 /* Load/Store Support */
-#define LCTRL2 157 /* Load/Store Support */
-#define ICTRL 158 /* I-Bus Support Control Register */
-#define EID 81
-#endif /* CONFIG_5xx */
-#if defined(CONFIG_8xx)
+#if defined(CONFIG_MPC8xx)
/* Registers in the processor's internal memory map that we use.
*/
#define PLPRCR 0x00000284
-#elif defined(CONFIG_8260)
-
-#define HID2 1011
-
-#define HID0_IFEM (1<<7)
-
-#define HID0_ICE_BITPOS 16
-#define HID0_DCE_BITPOS 17
-
-#define IM_REGBASE 0x10000
-#define IM_SYPCR (IM_REGBASE+0x0004)
-#define IM_SWSR (IM_REGBASE+0x000e)
-#define IM_BR0 (IM_REGBASE+0x0100)
-#define IM_OR0 (IM_REGBASE+0x0104)
-#define IM_BR1 (IM_REGBASE+0x0108)
-#define IM_OR1 (IM_REGBASE+0x010c)
-#define IM_BR2 (IM_REGBASE+0x0110)
-#define IM_OR2 (IM_REGBASE+0x0114)
-#define IM_MPTPR (IM_REGBASE+0x0184)
-#define IM_PSDMR (IM_REGBASE+0x0190)
-#define IM_PSRT (IM_REGBASE+0x019c)
-#define IM_IMMR (IM_REGBASE+0x01a8)
-#define IM_SCCR (IM_REGBASE+0x0c80)
-
-#elif defined(CONFIG_MPC5xxx) || defined(CONFIG_MPC8220)
-
-#define HID0_ICE_BITPOS 16
-#define HID0_DCE_BITPOS 17
-
#endif
#define curptr r2
*/
#define COPY_EE(d, s) rlwimi d,s,0,16,16
#define NOCOPY(d, s)
+
+#ifdef CONFIG_E500
+#define EXC_XFER_TEMPLATE(n, label, hdlr, msr, copyee) \
+ stw r22,_NIP(r21); \
+ stw r23,_MSR(r21); \
+ li r23,n; \
+ stw r23,TRAP(r21); \
+ li r20,msr; \
+ copyee(r20,r23); \
+ rlwimi r20,r23,0,25,25; \
+ mtmsr r20; \
+ bl 1f; \
+1: mflr r23; \
+ addis r23,r23,(hdlr - 1b)@ha; \
+ addi r23,r23,(hdlr - 1b)@l; \
+ b transfer_to_handler
+
+#define STD_EXCEPTION(n, label, hdlr) \
+.align 4; \
+label: \
+ EXCEPTION_PROLOG(SRR0, SRR1); \
+ addi r3,r1,STACK_FRAME_OVERHEAD; \
+ EXC_XFER_TEMPLATE(n, label, hdlr, MSR_KERNEL, NOCOPY) \
+
+#define CRIT_EXCEPTION(n, label, hdlr) \
+.align 4; \
+label: \
+ EXCEPTION_PROLOG(CSRR0, CSRR1); \
+ addi r3,r1,STACK_FRAME_OVERHEAD; \
+ EXC_XFER_TEMPLATE(n, label, hdlr, \
+ MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \
+
+#define MCK_EXCEPTION(n, label, hdlr) \
+.align 4; \
+label: \
+ EXCEPTION_PROLOG(MCSRR0, MCSRR1); \
+ addi r3,r1,STACK_FRAME_OVERHEAD; \
+ EXC_XFER_TEMPLATE(n, label, hdlr, \
+ MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \
+
+#else /* !E500 */
+
#define EXC_XFER_TEMPLATE(label, hdlr, msr, copyee) \
bl 1f; \
1: mflr r20; \
EXC_XFER_TEMPLATE(label, hdlr, \
MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \
+#endif /* !E500 */
#endif /* __PPC_ASM_TMPL__ */