Convert CONFIG_SYS_TIMER_COUNTS_DOWN to Kconfig

[J-u-boot.git] / arch / arm / mach-kirkwood / include / mach / config.h

diff --git a/arch/arm/mach-kirkwood/include/mach/config.h b/arch/arm/mach-kirkwood/include/mach/config.h
index eb9502361eef03f910df1e4f6735c63e7562cad8..5186f6e4f9ad2b0c932b08e5844b0e4bc924a495 100644 (file)
--- a/arch/arm/mach-kirkwood/include/mach/config.h
+++ b/arch/arm/mach-kirkwood/include/mach/config.h
@@ -23,12 +23,6 @@
 #endif /* CONFIG_KW88F6281 */
 
 #include <asm/arch/soc.h>
-#define CONFIG_KIRKWOOD_EGIGA_INIT     /* Enable GbePort0/1 for kernel */
-#define CONFIG_KIRKWOOD_RGMII_PAD_1V8  /* Set RGMII Pad voltage to 1.8V */
-#define CONFIG_KIRKWOOD_PCIE_INIT       /* Enable PCIE Port0 for kernel */
-
-/* Kirkwood has 2k of Security SRAM, use it for SP */
-#define CONFIG_SYS_INIT_SP_ADDR                0xC8012000
 
 #define CONFIG_I2C_MVTWSI_BASE0        KW_TWSI_BASE
 #define MV_UART_CONSOLE_BASE   KW_UART0_BASE
@@ -41,41 +35,25 @@
  */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_NAND_KIRKWOOD
-#define CONFIG_SYS_NAND_BASE           0xD8000000      /* MV_DEFADR_NANDF */
+#define CFG_SYS_NAND_BASE              0xD8000000      /* MV_DEFADR_NANDF */
 #define NAND_ALLOW_ERASE_ALL           1
 #endif
 
-/*
- * Ethernet Driver configuration
- */
-#ifdef CONFIG_CMD_NET
-#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN        /* detect link using phy */
-#define CONFIG_RESET_PHY_R     /* use reset_phy() to init mv8831116 PHY */
-#endif /* CONFIG_CMD_NET */
-
 /*
  * IDE Support on SATA ports
  */
 #ifdef CONFIG_IDE
 #define __io
 /* Data, registers and alternate blocks are at the same offset */
-#define CONFIG_SYS_ATA_DATA_OFFSET     (0x0100)
-#define CONFIG_SYS_ATA_REG_OFFSET      (0x0100)
-#define CONFIG_SYS_ATA_ALT_OFFSET      (0x0100)
 /* Each 8-bit ATA register is aligned to a 4-bytes address */
-#define CONFIG_SYS_ATA_STRIDE          4
-/* Controller supports 48-bits LBA addressing */
-#define CONFIG_LBA48
 /* CONFIG_IDE requires some #defines for ATA registers */
-#define CONFIG_SYS_IDE_MAXBUS          2
-#define CONFIG_SYS_IDE_MAXDEVICE       2
 /* ATA registers base is at SATA controller base */
-#define CONFIG_SYS_ATA_BASE_ADDR       MV_SATA_BASE
 #endif /* CONFIG_IDE */
 
 /* Use common timer */
-#define CONFIG_SYS_TIMER_COUNTS_DOWN
+#ifndef CONFIG_TIMER
 #define CONFIG_SYS_TIMER_COUNTER       (MVEBU_TIMER_BASE + 0x14)
 #define CONFIG_SYS_TIMER_RATE          CONFIG_SYS_TCLK
+#endif
 
 #endif /* _KW_CONFIG_H */