]> Git Repo - J-u-boot.git/blobdiff - configs/ls2080ardb_defconfig
configs: Resync with savedefconfig
[J-u-boot.git] / configs / ls2080ardb_defconfig
index 82ad9b27b06eab6b2c6eb591931330577bf906f9..e9818d62de3591b29ac2f87cf8cc04de4a58a00e 100644 (file)
@@ -55,14 +55,15 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="DPMAC1@xgmii"
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="DPMAC1@xgmii"
 CONFIG_NET_RANDOM_ETHADDR=y
-CONFIG_DM=y
 CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=133333333
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_SATA=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_CLK_FREQ=133333333
 CONFIG_DIMM_SLOTS_PER_CTLR=2
+CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
 CONFIG_FSL_ESDHC=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
 CONFIG_FSL_ESDHC=y
@@ -83,6 +84,8 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
 CONFIG_CORTINA_FW_ADDR=0x580980000
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
 CONFIG_CORTINA_FW_ADDR=0x580980000
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_NVME_PCI=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_NVME_PCI=y
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