Convert CONFIG_ENV_IS_IN_MMC/NAND/UBI and NOWHERE to Kconfig

[J-u-boot.git] / include / configs / T102xQDS.h

diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h
index 2613a0f0934cb4725939e74534837a5b33c0444c..c8bba52ed131330423e123db07a3163a347cc701 100644 (file)
--- a/include/configs/T102xQDS.h
+++ b/include/configs/T102xQDS.h
@@ -12,9 +12,6 @@
 #define __T1024QDS_H
 
 /* High Level Configuration Options */
-#define CONFIG_BOOKE
-#define CONFIG_E500                    /* BOOKE e500 family */
-#define CONFIG_E500MC                  /* BOOKE e500mc family */
 #define CONFIG_SYS_BOOK3E_HV           /* Category E.HV supported */
 #define CONFIG_MP                      /* support multiple processors */
 #define CONFIG_ENABLE_36BIT_PHYS
@@ -25,24 +22,16 @@
 #endif
 
 #define CONFIG_SYS_FSL_CPC             /* Corenet Platform Cache */
-#define CONFIG_SYS_NUM_CPC             CONFIG_NUM_DDR_CONTROLLERS
-#define CONFIG_FSL_IFC                 /* Enable IFC Support */
+#define CONFIG_SYS_NUM_CPC             CONFIG_SYS_NUM_DDR_CTLRS
 
-#define CONFIG_FSL_LAW                 /* Use common FSL init code */
 #define CONFIG_ENV_OVERWRITE
 
 #define CONFIG_DEEP_SLEEP
-#if defined(CONFIG_DEEP_SLEEP)
-#define CONFIG_BOARD_EARLY_INIT_F
-#endif
-
-#define CONFIG_FSL_CAAM                        /* Enable SEC/CAAM */
 
 #ifdef CONFIG_RAMBOOT_PBL
 #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xqds/t1024_pbi.cfg
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
-#define CONFIG_FSL_LAW                 /* Use common FSL init code */
 #define CONFIG_SYS_TEXT_BASE           0x00201000
 #define CONFIG_SPL_TEXT_BASE           0xFFFD8000
 #define CONFIG_SPL_PAD_TO              0x40000
@@ -53,7 +42,6 @@
 #define CONFIG_SPL_SKIP_RELOCATE
 #define CONFIG_SPL_COMMON_INIT_DDR
 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
-#define CONFIG_SYS_NO_FLASH
 #endif
 
 #ifdef CONFIG_NAND
@@ -106,7 +94,7 @@
 #define CONFIG_RESET_VECTOR_ADDRESS    0xeffffffc
 #endif
 
-#ifndef CONFIG_SYS_NO_FLASH
+#ifdef CONFIG_MTD_NOR_FLASH
 #define CONFIG_FLASH_CFI_DRIVER
 #define CONFIG_SYS_FLASH_CFI
 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
@@ -153,7 +141,6 @@
 #define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS       \
                (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR)
 #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
-#define CONFIG_SYS_NO_FLASH
 #endif
 
 #if defined(CONFIG_SPIFLASH)
@@ -168,13 +155,11 @@
 #define CONFIG_ENV_SECT_SIZE           0x10000
 #elif defined(CONFIG_SDCARD)
 #define CONFIG_SYS_EXTRA_ENV_RELOC
-#define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV         0
 #define CONFIG_ENV_SIZE                        0x2000
 #define CONFIG_ENV_OFFSET              (512 * 0x800)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_EXTRA_ENV_RELOC
-#define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_SIZE                        0x2000
 #define CONFIG_ENV_OFFSET              (10 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
@@ -253,9 +238,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
 #define CONFIG_DDR_SPD
-#ifndef CONFIG_SYS_FSL_DDR4
-#define CONFIG_SYS_FSL_DDR3
-#endif
 
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define SPD_EEPROM_ADDRESS     0x51
@@ -497,12 +479,11 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_NS16550_COM4        (CONFIG_SYS_CCSRBAR+0x11D600)
 
 /* Video */
-#ifdef CONFIG_PPC_T1024                /* no DIU on T1023 */
+#ifdef CONFIG_ARCH_T1024               /* no DIU on T1023 */
 #define CONFIG_FSL_DIU_FB
 #ifdef CONFIG_FSL_DIU_FB
 #define CONFIG_FSL_DIU_CH7301
 #define CONFIG_SYS_DIU_ADDR    (CONFIG_SYS_CCSRBAR + 0x180000)
-#define CONFIG_CMD_BMP
 #define CONFIG_VIDEO_LOGO
 #define CONFIG_VIDEO_BMP_LOGO
 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
@@ -559,7 +540,6 @@ unsigned long get_board_ddr_clk(void);
  * General PCIe
  * Memory space is mapped 1-1, but I/O space must start from 0.
  */
-#define CONFIG_PCI             /* Enable PCI/PCIE */
 #define CONFIG_PCIE1           /* PCIE controller 1 */
 #define CONFIG_PCIE2           /* PCIE controller 2 */
 #define CONFIG_PCIE3           /* PCIE controller 3 */
@@ -631,9 +611,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_PCIE3_IO_SIZE       0x00010000      /* 64k */
 #endif
 
-#define CONFIG_PCI_PNP                 /* do pci plug-and-play */
 #define CONFIG_PCI_SCAN_SHOW           /* show pci devices on startup */
-#define CONFIG_DOS_PARTITION
 #endif /* CONFIG_PCI */
 
 /*
@@ -648,8 +626,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_SATA1               CONFIG_SYS_MPC85xx_SATA1_ADDR
 #define CONFIG_SYS_SATA1_FLAGS         FLAGS_DMA
 #define CONFIG_LBA48
-#define CONFIG_CMD_SATA
-#define CONFIG_DOS_PARTITION
 #endif
 
 /*
@@ -658,7 +634,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_HAS_FSL_DR_USB
 
 #ifdef CONFIG_HAS_FSL_DR_USB
-#define CONFIG_USB_EHCI
 #define CONFIG_USB_EHCI_FSL
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #endif
@@ -666,12 +641,9 @@ unsigned long get_board_ddr_clk(void);
 /*
  * SDHC
  */
-#define CONFIG_MMC
 #ifdef CONFIG_MMC
 #define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR      CONFIG_SYS_MPC85xx_ESDHC_ADDR
-#define CONFIG_GENERIC_MMC
-#define CONFIG_DOS_PARTITION
 #endif
 
 /* Qman/Bman */
@@ -781,10 +753,9 @@ unsigned long get_board_ddr_clk(void);
 /*
  * Dynamic MTD Partition support with mtdparts
  */
-#ifndef CONFIG_SYS_NO_FLASH
+#ifdef CONFIG_MTD_NOR_FLASH
 #define CONFIG_MTD_DEVICE
 #define CONFIG_MTD_PARTITIONS
-#define CONFIG_CMD_MTDPARTS
 #define CONFIG_FLASH_CFI_MTD
 #define MTDIDS_DEFAULT    "nor0=fe8000000.nor,nand0=fff800000.flash," \
                          "spi0=spife110000.0"
@@ -804,10 +775,6 @@ unsigned long get_board_ddr_clk(void);
 /*
  * Command line configuration.
  */
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_ERRATA
-#define CONFIG_CMD_IRQ
 #define CONFIG_CMD_REGINFO
 
 #ifdef CONFIG_PCI
@@ -849,7 +816,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_BOOTFILE                "uImage"
 #define CONFIG_UBOOTPATH       "u-boot.bin" /* U-Boot image on TFTP server */
 #define CONFIG_LOADADDR                1000000 /* default location for tftp, bootm */
-#define CONFIG_BAUDRATE                115200
 #define __USB_PHY_TYPE         utmi
 
 #define        CONFIG_EXTRA_ENV_SETTINGS                               \
@@ -892,12 +858,6 @@ unsigned long get_board_ddr_clk(void);
 
 #define CONFIG_BOOTCOMMAND     CONFIG_LINUX
 
-/* Hash command with SHA acceleration supported in hardware */
-#ifdef CONFIG_FSL_CAAM
-#define CONFIG_CMD_HASH
-#define CONFIG_SHA_HW_ACCEL
-#endif
-
 #include <asm/fsl_secure_boot.h>
 
 #endif /* __T1024QDS_H */