Git Repo - J-u-boot.git/blame_incremental - configs/P1020RDB-PC_36BIT_NAND

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Commit	Line	Data
	1	CONFIG_PPC=y
	2	CONFIG_SYS_TEXT_BASE=0x11000000
	3	CONFIG_SYS_MALLOC_LEN=0x100000
	4	CONFIG_ENV_SIZE=0x4000
	5	CONFIG_ENV_OFFSET=0x100000
	6	CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
	7	CONFIG_SPL_TEXT_BASE=0xFF800000
	8	CONFIG_SPL_SERIAL=y
	9	CONFIG_TPL_TEXT_BASE=0xF8F80000
	10	CONFIG_TPL_LIBCOMMON_SUPPORT=y
	11	CONFIG_TPL_LIBGENERIC_SUPPORT=y
	12	CONFIG_TPL_SERIAL=y
	13	CONFIG_SPL=y
	14	CONFIG_TPL_MAX_SIZE=0x20000
	15	CONFIG_MPC85xx=y
	16	# CONFIG_CMD_ERRATA is not set
	17	CONFIG_TARGET_P1020RDB_PC=y
	18	CONFIG_ENABLE_36BIT_PHYS=y
	19	CONFIG_SYS_MPC85XX_NO_RESETVEC=y
	20	CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y
	21	CONFIG_PCIE1=y
	22	CONFIG_PCIE2=y
	23	CONFIG_PHYS_64BIT=y
	24	CONFIG_MP=y
	25	CONFIG_FIT=y
	26	CONFIG_FIT_VERBOSE=y
	27	CONFIG_OF_BOARD_SETUP=y
	28	CONFIG_OF_STDOUT_VIA_ALIAS=y
	29	CONFIG_TPL_SYS_MONITOR_BASE=0xF8F80000
	30	CONFIG_BOOTDELAY=10
	31	CONFIG_USE_BOOTCOMMAND=y
	32	CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr"
	33	CONFIG_BOARD_EARLY_INIT_F=y
	34	CONFIG_BOARD_EARLY_INIT_R=y
	35	# CONFIG_MISC_INIT_R is not set
	36	# CONFIG_SPL_FRAMEWORK is not set
	37	CONFIG_SPL_MAX_SIZE=0x1000
	38	CONFIG_SPL_NAND_BOOT=y
	39	CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y
	40	CONFIG_SPL_INIT_MINIMAL=y
	41	CONFIG_SPL_FLUSH_IMAGE=y
	42	CONFIG_SPL_RELOC_TEXT_BASE=0xf8fbe000
	43	CONFIG_SPL_RELOC_STACK=0xf8fbfff0
	44	CONFIG_TPL_GD_ADDR=0xf8fac000
	45	CONFIG_TPL_RELOC_TEXT_BASE=0xf8f80000
	46	CONFIG_TPL_RELOC_STACK=0xf8fb0000
	47	CONFIG_TPL_RELOC_MALLOC=y
	48	CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000
	49	CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
	50	CONFIG_SPL_NAND_SUPPORT=y
	51	CONFIG_SPL_TARGET="u-boot-with-spl.bin"
	52	CONFIG_TPL=y
	53	CONFIG_TPL_ENV_SUPPORT=y
	54	CONFIG_TPL_I2C=y
	55	CONFIG_TPL_MPC8XXX_INIT_DDR=y
	56	CONFIG_TPL_NAND_SUPPORT=y
	57	CONFIG_HUSH_PARSER=y
	58	# CONFIG_AUTO_COMPLETE is not set
	59	CONFIG_SYS_PBSIZE=276
	60	CONFIG_CMD_IMLS=y
	61	CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
	62	CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
	63	CONFIG_CMD_I2C=y
	64	CONFIG_CMD_MMC=y
	65	CONFIG_CMD_USB=y
	66	CONFIG_CMD_MII=y
	67	CONFIG_CMD_PING=y
	68	# CONFIG_CMD_HASH is not set
	69	CONFIG_CMD_EXT2=y
	70	CONFIG_CMD_FAT=y
	71	CONFIG_OF_CONTROL=y
	72	CONFIG_ENV_OVERWRITE=y
	73	CONFIG_ENV_IS_IN_NAND=y
	74	CONFIG_ENV_RANGE=0xc000
	75	CONFIG_SYS_RELOC_GD_ENV_ADDR=y
	76	CONFIG_USE_BOOTFILE=y
	77	CONFIG_BOOTFILE="uImage"
	78	CONFIG_USE_ETHPRIME=y
	79	CONFIG_ETHPRIME="eTSEC1"
	80	CONFIG_LBA48=y
	81	CONFIG_DDR_CLK_FREQ=66666666
	82	CONFIG_SYS_SPD_BUS_NUM=1
	83	CONFIG_CHIP_SELECTS_PER_CTRL=1
	84	CONFIG_SYS_DDR_RAW_TIMING=y
	85	CONFIG_SYS_BR0_PRELIM_BOOL=y
	86	CONFIG_SYS_BR0_PRELIM=0xFF800C21
	87	CONFIG_SYS_OR0_PRELIM=0xFFFF8396
	88	CONFIG_SYS_BR1_PRELIM_BOOL=y
	89	CONFIG_SYS_BR1_PRELIM=0xEF001001
	90	CONFIG_SYS_OR1_PRELIM=0xFC000FF7
	91	CONFIG_SYS_BR2_PRELIM_BOOL=y
	92	CONFIG_SYS_BR2_PRELIM=0xFFB00801
	93	CONFIG_SYS_OR2_PRELIM=0xFFFE09FF
	94	CONFIG_SYS_BR3_PRELIM_BOOL=y
	95	CONFIG_SYS_BR3_PRELIM=0xFFA00801
	96	CONFIG_SYS_OR3_PRELIM=0xFFF009F7
	97	CONFIG_TPL_COMMON_INIT_DDR=y
	98	CONFIG_DM_I2C=y
	99	CONFIG_SPL_SYS_I2C_LEGACY=y
	100	CONFIG_TPL_SYS_I2C_LEGACY=y
	101	CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
	102	CONFIG_SYS_I2C_FSL=y
	103	CONFIG_SYS_FSL_I2C_OFFSET=0x3000
	104	CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y
	105	CONFIG_SYS_FSL_I2C2_OFFSET=0x3100
	106	CONFIG_SYS_I2C_EEPROM_ADDR=0x52
	107	CONFIG_FSL_ESDHC=y
	108	CONFIG_MTD=y
	109	CONFIG_MTD_NOR_FLASH=y
	110	CONFIG_FLASH_CFI_DRIVER=y
	111	CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
	112	CONFIG_SYS_FLASH_EMPTY_INFO=y
	113	CONFIG_SYS_FLASH_CFI=y
	114	CONFIG_SYS_FLASH_QUIET_TEST=y
	115	CONFIG_SYS_MAX_FLASH_SECT=128
	116	CONFIG_MTD_RAW_NAND=y
	117	CONFIG_NAND_FSL_ELBC=y
	118	CONFIG_SYS_NAND_BLOCK_SIZE=0x4000
	119	CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
	120	CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000
	121	CONFIG_DM_SPI_FLASH=y
	122	CONFIG_SF_DEFAULT_SPEED=10000000
	123	CONFIG_SPI_FLASH_SPANSION=y
	124	CONFIG_PHY_ATHEROS=y
	125	CONFIG_PHY_BROADCOM=y
	126	CONFIG_PHY_DAVICOM=y
	127	CONFIG_PHY_LXT=y
	128	CONFIG_PHY_MARVELL=y
	129	CONFIG_PHY_NATSEMI=y
	130	CONFIG_PHY_REALTEK=y
	131	CONFIG_PHY_SMSC=y
	132	CONFIG_PHY_VITESSE=y
	133	CONFIG_PHY_FIXED=y
	134	CONFIG_DM_MDIO=y
	135	CONFIG_PHY_GIGE=y
	136	CONFIG_E1000=y
	137	CONFIG_MII=y
	138	CONFIG_TSEC_ENET=y
	139	CONFIG_PCIE_FSL=y
	140	CONFIG_DM_RTC=y
	141	CONFIG_SYS_NS16550=y
	142	CONFIG_SPI=y
	143	CONFIG_DM_SPI=y
	144	CONFIG_FSL_ESPI=y
	145	CONFIG_USB=y
	146	CONFIG_USB_EHCI_FSL=y
	147	CONFIG_USB_MAX_CONTROLLER_COUNT=2
	148	CONFIG_USB_STORAGE=y
	149	CONFIG_ADDR_MAP=y