Git Repo - J-u-boot.git/blame_incremental - cpu/arm920t/imx/interrupts.c

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Commit	Line	Data
	1	/*
	2	* (C) Copyright 2002
	3	* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
	4	* Marius Groeger <[email protected]>
	5	*
	6	* (C) Copyright 2002
	7	* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
	8	* Alex Zuepke <[email protected]>
	9	*
	10	* (C) Copyright 2002
	11	* Gary Jennejohn, DENX Software Engineering, <[email protected]>
	12	*
	13	* See file CREDITS for list of people who contributed to this
	14	* project.
	15	*
	16	* This program is free software; you can redistribute it and/or
	17	* modify it under the terms of the GNU General Public License as
	18	* published by the Free Software Foundation; either version 2 of
	19	* the License, or (at your option) any later version.
	20	*
	21	* This program is distributed in the hope that it will be useful,
	22	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	23	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	24	* GNU General Public License for more details.
	25	*
	26	* You should have received a copy of the GNU General Public License
	27	* along with this program; if not, write to the Free Software
	28	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	29	* MA 02111-1307 USA
	30	*/
	31
	32	#include <common.h>
	33	#if defined (CONFIG_IMX)
	34
	35	#include <arm920t.h>
	36	#include <asm/arch/imx-regs.h>
	37
	38	int interrupt_init (void)
	39	{
	40	int i;
	41	/* setup GP Timer 1 */
	42	TCTL1 = TCTL_SWR;
	43	for ( i=0; i<100; i++) TCTL1 = 0; /* We have no udelay by now */
	44	TPRER1 = get_PERCLK1() / 1000000; /* 1 MHz */
	45	TCTL1 \|= TCTL_FRR \| (1<<1); /* Freerun Mode, PERCLK1 input */
	46
	47	reset_timer_masked();
	48
	49	return (0);
	50	}
	51
	52	/*
	53	* timer without interrupts
	54	*/
	55
	56	void reset_timer (void)
	57	{
	58	reset_timer_masked ();
	59	}
	60
	61	ulong get_timer (ulong base)
	62	{
	63	return get_timer_masked() - base;
	64	}
	65
	66	void set_timer (ulong t)
	67	{
	68	/* nop */
	69	}
	70
	71	void reset_timer_masked (void)
	72	{
	73	TCTL1 &= ~TCTL_TEN;
	74	TCTL1 \|= TCTL_TEN; /* Enable timer */
	75	}
	76
	77	ulong get_timer_masked (void)
	78	{
	79	return TCN1;
	80	}
	81
	82	void udelay_masked (unsigned long usec)
	83	{
	84	ulong endtime = get_timer_masked() + usec;
	85	signed long diff;
	86
	87	do {
	88	ulong now = get_timer_masked ();
	89	diff = endtime - now;
	90	} while (diff >= 0);
	91	}
	92
	93	void udelay (unsigned long usec)
	94	{
	95	udelay_masked(usec);
	96	}
	97
	98	/*
	99	* This function is derived from PowerPC code (read timebase as long long).
	100	* On ARM it just returns the timer value.
	101	*/
	102	unsigned long long get_ticks(void)
	103	{
	104	return get_timer(0);
	105	}
	106
	107	/*
	108	* This function is derived from PowerPC code (timebase clock frequency).
	109	* On ARM it returns the number of timer ticks per second.
	110	*/
	111	ulong get_tbclk (void)
	112	{
	113	ulong tbclk;
	114
	115	tbclk = CONFIG_SYS_HZ;
	116
	117	return tbclk;
	118	}
	119
	120	/*
	121	* Reset the cpu by setting up the watchdog timer and let him time out
	122	*/
	123	void reset_cpu (ulong ignored)
	124	{
	125	/* Disable watchdog and set Time-Out field to 0 */
	126	WCR = 0x00000000;
	127
	128	/* Write Service Sequence */
	129	WSR = 0x00005555;
	130	WSR = 0x0000AAAA;
	131
	132	/* Enable watchdog */
	133	WCR = 0x00000001;
	134
	135	while (1);
	136	/NOTREACHED/
	137	}
	138
	139	#endif /* defined (CONFIG_IMX) */