Git Repo - J-u-boot.git/blame_incremental - configs/ls1046aqds_SECURE_BOOT

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Commit	Line	Data
	1	CONFIG_ARM=y
	2	CONFIG_COUNTER_FREQUENCY=25000000
	3	CONFIG_TARGET_LS1046AQDS=y
	4	CONFIG_SYS_TEXT_BASE=0x60100000
	5	CONFIG_SYS_MALLOC_LEN=0x120000
	6	CONFIG_NR_DRAM_BANKS=2
	7	CONFIG_ENV_SIZE=0x20000
	8	CONFIG_NXP_ESBC=y
	9	CONFIG_SYS_I2C_MXC_I2C1=y
	10	CONFIG_SYS_I2C_MXC_I2C2=y
	11	CONFIG_SYS_I2C_MXC_I2C3=y
	12	CONFIG_SYS_I2C_MXC_I2C4=y
	13	CONFIG_DM_GPIO=y
	14	CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
	15	CONFIG_FSL_USE_PCA9547_MUX=y
	16	CONFIG_VID=y
	17	CONFIG_VID_FLS_ENV="ls1046aqds_vdd_mv"
	18	CONFIG_VOL_MONITOR_INA220=y
	19	CONFIG_VOL_MONITOR_IR36021_SET=y
	20	CONFIG_FSL_QIXIS=y
	21	# CONFIG_QIXIS_I2C_ACCESS is not set
	22	CONFIG_FSL_LS_PPA=y
	23	CONFIG_AHCI=y
	24	CONFIG_SYS_MEMTEST_START=0x80000000
	25	CONFIG_SYS_MEMTEST_END=0x9fffffff
	26	CONFIG_DISTRO_DEFAULTS=y
	27	CONFIG_REMAKE_ELF=y
	28	CONFIG_MP=y
	29	CONFIG_FIT_VERBOSE=y
	30	CONFIG_OF_BOARD_SETUP=y
	31	CONFIG_DYNAMIC_SYS_CLK_FREQ=y
	32	CONFIG_BOOTDELAY=10
	33	CONFIG_USE_BOOTARGS=y
	34	CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
	35	CONFIG_BOOTCOMMAND="run distro_bootcmd; run nor_bootcmd; env exists secureboot && esbc_halt;;"
	36	CONFIG_MISC_INIT_R=y
	37	CONFIG_SYS_MAXARGS=64
	38	CONFIG_SYS_PBSIZE=532
	39	CONFIG_CMD_BOOTZ=y
	40	CONFIG_CMD_IMLS=y
	41	CONFIG_CMD_GREPENV=y
	42	CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
	43	CONFIG_CMD_MEMINFO=y
	44	CONFIG_CMD_MEMTEST=y
	45	CONFIG_CMD_GPIO=y
	46	CONFIG_CMD_GPT=y
	47	CONFIG_CMD_I2C=y
	48	CONFIG_CMD_MMC=y
	49	CONFIG_CMD_NAND=y
	50	CONFIG_CMD_PCI=y
	51	CONFIG_CMD_USB=y
	52	CONFIG_CMD_CACHE=y
	53	CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
	54	CONFIG_OF_CONTROL=y
	55	CONFIG_ENV_OVERWRITE=y
	56	CONFIG_DM=y
	57	CONFIG_SATA=y
	58	CONFIG_SATA_CEVA=y
	59	CONFIG_DYNAMIC_DDR_CLK_FREQ=y
	60	CONFIG_DDR_ECC=y
	61	CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
	62	CONFIG_MPC8XXX_GPIO=y
	63	CONFIG_DM_I2C=y
	64	CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
	65	CONFIG_SYS_I2C_EEPROM_ADDR=0x57
	66	CONFIG_FSL_ESDHC=y
	67	CONFIG_MTD=y
	68	CONFIG_MTD_NOR_FLASH=y
	69	CONFIG_FLASH_CFI_DRIVER=y
	70	CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
	71	CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
	72	CONFIG_SYS_FLASH_CFI=y
	73	CONFIG_SYS_MAX_FLASH_BANKS=2
	74	CONFIG_MTD_RAW_NAND=y
	75	CONFIG_NAND_FSL_IFC=y
	76	CONFIG_SYS_NAND_ONFI_DETECTION=y
	77	CONFIG_SF_DEFAULT_BUS=1
	78	CONFIG_SPI_FLASH_EON=y
	79	CONFIG_SPI_FLASH_STMICRO=y
	80	CONFIG_SPI_FLASH_SST=y
	81	CONFIG_PHYLIB=y
	82	CONFIG_PHYLIB_10G=y
	83	CONFIG_PHY_REALTEK=y
	84	CONFIG_PHY_VITESSE=y
	85	CONFIG_E1000=y
	86	CONFIG_FMAN_ENET=y
	87	CONFIG_SYS_FMAN_FW_ADDR=0x60900000
	88	CONFIG_NVME_PCI=y
	89	CONFIG_PCI=y
	90	CONFIG_DM_PCI_COMPAT=y
	91	CONFIG_PCIE_LAYERSCAPE_RC=y
	92	CONFIG_PCIE_LAYERSCAPE_EP=y
	93	CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
	94	CONFIG_DM_SCSI=y
	95	CONFIG_SYS_NS16550=y
	96	CONFIG_SPI=y
	97	CONFIG_DM_SPI=y
	98	CONFIG_FSL_DSPI=y
	99	CONFIG_USB=y
	100	CONFIG_USB_XHCI_HCD=y
	101	CONFIG_USB_XHCI_DWC3=y
	102	CONFIG_RSA=y