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1 | // SPDX-License-Identifier: GPL-2.0+ | |
2 | /* | |
3 | * (C) Copyright 2001, 2002, 2003 | |
4 | * Wolfgang Denk, DENX Software Engineering, [email protected]. | |
5 | * Keith Outwater, [email protected]` | |
6 | * Steven Scholz, [email protected] | |
7 | */ | |
8 | ||
9 | /* | |
10 | * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim) | |
11 | * DS1307 and DS1338/9 Real Time Clock (RTC). | |
12 | * | |
13 | * based on ds1337.c | |
14 | */ | |
15 | ||
16 | #include <common.h> | |
17 | #include <command.h> | |
18 | #include <dm.h> | |
19 | #include <rtc.h> | |
20 | #include <i2c.h> | |
21 | ||
22 | enum ds_type { | |
23 | ds_1307, | |
24 | ds_1337, | |
25 | ds_1340, | |
26 | m41t11, | |
27 | mcp794xx, | |
28 | }; | |
29 | ||
30 | /* | |
31 | * RTC register addresses | |
32 | */ | |
33 | #define RTC_SEC_REG_ADDR 0x00 | |
34 | #define RTC_MIN_REG_ADDR 0x01 | |
35 | #define RTC_HR_REG_ADDR 0x02 | |
36 | #define RTC_DAY_REG_ADDR 0x03 | |
37 | #define RTC_DATE_REG_ADDR 0x04 | |
38 | #define RTC_MON_REG_ADDR 0x05 | |
39 | #define RTC_YR_REG_ADDR 0x06 | |
40 | #define RTC_CTL_REG_ADDR 0x07 | |
41 | ||
42 | #define RTC_SEC_BIT_CH 0x80 /* Clock Halt (in Register 0) */ | |
43 | ||
44 | #define RTC_CTL_BIT_RS0 0x01 /* Rate select 0 */ | |
45 | #define RTC_CTL_BIT_RS1 0x02 /* Rate select 1 */ | |
46 | #define RTC_CTL_BIT_SQWE 0x10 /* Square Wave Enable */ | |
47 | #define RTC_CTL_BIT_OUT 0x80 /* Output Control */ | |
48 | ||
49 | /* MCP7941X-specific bits */ | |
50 | #define MCP7941X_BIT_ST 0x80 | |
51 | #define MCP7941X_BIT_VBATEN 0x08 | |
52 | ||
53 | #ifndef CONFIG_DM_RTC | |
54 | ||
55 | /*---------------------------------------------------------------------*/ | |
56 | #undef DEBUG_RTC | |
57 | ||
58 | #ifdef DEBUG_RTC | |
59 | #define DEBUGR(fmt, args...) printf(fmt, ##args) | |
60 | #else | |
61 | #define DEBUGR(fmt, args...) | |
62 | #endif | |
63 | /*---------------------------------------------------------------------*/ | |
64 | ||
65 | #ifndef CONFIG_SYS_I2C_RTC_ADDR | |
66 | # define CONFIG_SYS_I2C_RTC_ADDR 0x68 | |
67 | #endif | |
68 | ||
69 | #if defined(CONFIG_RTC_DS1307) && (CONFIG_SYS_I2C_SPEED > 100000) | |
70 | # error The DS1307 is specified only up to 100kHz! | |
71 | #endif | |
72 | ||
73 | static uchar rtc_read (uchar reg); | |
74 | static void rtc_write (uchar reg, uchar val); | |
75 | ||
76 | /* | |
77 | * Get the current time from the RTC | |
78 | */ | |
79 | int rtc_get (struct rtc_time *tmp) | |
80 | { | |
81 | int rel = 0; | |
82 | uchar sec, min, hour, mday, wday, mon, year; | |
83 | ||
84 | #ifdef CONFIG_RTC_MCP79411 | |
85 | read_rtc: | |
86 | #endif | |
87 | sec = rtc_read (RTC_SEC_REG_ADDR); | |
88 | min = rtc_read (RTC_MIN_REG_ADDR); | |
89 | hour = rtc_read (RTC_HR_REG_ADDR); | |
90 | wday = rtc_read (RTC_DAY_REG_ADDR); | |
91 | mday = rtc_read (RTC_DATE_REG_ADDR); | |
92 | mon = rtc_read (RTC_MON_REG_ADDR); | |
93 | year = rtc_read (RTC_YR_REG_ADDR); | |
94 | ||
95 | DEBUGR ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x " | |
96 | "hr: %02x min: %02x sec: %02x\n", | |
97 | year, mon, mday, wday, hour, min, sec); | |
98 | ||
99 | #ifdef CONFIG_RTC_DS1307 | |
100 | if (sec & RTC_SEC_BIT_CH) { | |
101 | printf ("### Warning: RTC oscillator has stopped\n"); | |
102 | /* clear the CH flag */ | |
103 | rtc_write (RTC_SEC_REG_ADDR, | |
104 | rtc_read (RTC_SEC_REG_ADDR) & ~RTC_SEC_BIT_CH); | |
105 | rel = -1; | |
106 | } | |
107 | #endif | |
108 | ||
109 | #ifdef CONFIG_RTC_MCP79411 | |
110 | /* make sure that the backup battery is enabled */ | |
111 | if (!(wday & MCP7941X_BIT_VBATEN)) { | |
112 | rtc_write(RTC_DAY_REG_ADDR, | |
113 | wday | MCP7941X_BIT_VBATEN); | |
114 | } | |
115 | ||
116 | /* clock halted? turn it on, so clock can tick. */ | |
117 | if (!(sec & MCP7941X_BIT_ST)) { | |
118 | rtc_write(RTC_SEC_REG_ADDR, MCP7941X_BIT_ST); | |
119 | printf("Started RTC\n"); | |
120 | goto read_rtc; | |
121 | } | |
122 | #endif | |
123 | ||
124 | ||
125 | tmp->tm_sec = bcd2bin (sec & 0x7F); | |
126 | tmp->tm_min = bcd2bin (min & 0x7F); | |
127 | tmp->tm_hour = bcd2bin (hour & 0x3F); | |
128 | tmp->tm_mday = bcd2bin (mday & 0x3F); | |
129 | tmp->tm_mon = bcd2bin (mon & 0x1F); | |
130 | tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000); | |
131 | tmp->tm_wday = bcd2bin ((wday - 1) & 0x07); | |
132 | tmp->tm_yday = 0; | |
133 | tmp->tm_isdst= 0; | |
134 | ||
135 | DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", | |
136 | tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, | |
137 | tmp->tm_hour, tmp->tm_min, tmp->tm_sec); | |
138 | ||
139 | return rel; | |
140 | } | |
141 | ||
142 | ||
143 | /* | |
144 | * Set the RTC | |
145 | */ | |
146 | int rtc_set (struct rtc_time *tmp) | |
147 | { | |
148 | DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", | |
149 | tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, | |
150 | tmp->tm_hour, tmp->tm_min, tmp->tm_sec); | |
151 | ||
152 | if (tmp->tm_year < 1970 || tmp->tm_year > 2069) | |
153 | printf("WARNING: year should be between 1970 and 2069!\n"); | |
154 | ||
155 | rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100)); | |
156 | rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon)); | |
157 | #ifdef CONFIG_RTC_MCP79411 | |
158 | rtc_write (RTC_DAY_REG_ADDR, | |
159 | bin2bcd (tmp->tm_wday + 1) | MCP7941X_BIT_VBATEN); | |
160 | #else | |
161 | rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1)); | |
162 | #endif | |
163 | rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday)); | |
164 | rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour)); | |
165 | rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min)); | |
166 | #ifdef CONFIG_RTC_MCP79411 | |
167 | rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec) | MCP7941X_BIT_ST); | |
168 | #else | |
169 | rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec)); | |
170 | #endif | |
171 | ||
172 | return 0; | |
173 | } | |
174 | ||
175 | ||
176 | /* | |
177 | * Reset the RTC. We setting the date back to 1970-01-01. | |
178 | * We also enable the oscillator output on the SQW/OUT pin and program | |
179 | * it for 32,768 Hz output. Note that according to the datasheet, turning | |
180 | * on the square wave output increases the current drain on the backup | |
181 | * battery to something between 480nA and 800nA. | |
182 | */ | |
183 | void rtc_reset (void) | |
184 | { | |
185 | rtc_write (RTC_SEC_REG_ADDR, 0x00); /* clearing Clock Halt */ | |
186 | rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_SQWE | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS0); | |
187 | } | |
188 | ||
189 | ||
190 | /* | |
191 | * Helper functions | |
192 | */ | |
193 | ||
194 | static | |
195 | uchar rtc_read (uchar reg) | |
196 | { | |
197 | return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg)); | |
198 | } | |
199 | ||
200 | ||
201 | static void rtc_write (uchar reg, uchar val) | |
202 | { | |
203 | i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); | |
204 | } | |
205 | ||
206 | #endif /* !CONFIG_DM_RTC */ | |
207 | ||
208 | #ifdef CONFIG_DM_RTC | |
209 | static int ds1307_rtc_set(struct udevice *dev, const struct rtc_time *tm) | |
210 | { | |
211 | int ret; | |
212 | uchar buf[7]; | |
213 | enum ds_type type = dev_get_driver_data(dev); | |
214 | ||
215 | debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", | |
216 | tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, | |
217 | tm->tm_hour, tm->tm_min, tm->tm_sec); | |
218 | ||
219 | if (tm->tm_year < 1970 || tm->tm_year > 2069) | |
220 | printf("WARNING: year should be between 1970 and 2069!\n"); | |
221 | ||
222 | buf[RTC_YR_REG_ADDR] = bin2bcd(tm->tm_year % 100); | |
223 | buf[RTC_MON_REG_ADDR] = bin2bcd(tm->tm_mon); | |
224 | buf[RTC_DAY_REG_ADDR] = bin2bcd(tm->tm_wday + 1); | |
225 | buf[RTC_DATE_REG_ADDR] = bin2bcd(tm->tm_mday); | |
226 | buf[RTC_HR_REG_ADDR] = bin2bcd(tm->tm_hour); | |
227 | buf[RTC_MIN_REG_ADDR] = bin2bcd(tm->tm_min); | |
228 | buf[RTC_SEC_REG_ADDR] = bin2bcd(tm->tm_sec); | |
229 | ||
230 | if (type == mcp794xx) { | |
231 | buf[RTC_DAY_REG_ADDR] |= MCP7941X_BIT_VBATEN; | |
232 | buf[RTC_SEC_REG_ADDR] |= MCP7941X_BIT_ST; | |
233 | } | |
234 | ||
235 | ret = dm_i2c_write(dev, 0, buf, sizeof(buf)); | |
236 | if (ret < 0) | |
237 | return ret; | |
238 | ||
239 | return 0; | |
240 | } | |
241 | ||
242 | static int ds1307_rtc_get(struct udevice *dev, struct rtc_time *tm) | |
243 | { | |
244 | int ret; | |
245 | uchar buf[7]; | |
246 | enum ds_type type = dev_get_driver_data(dev); | |
247 | ||
248 | read_rtc: | |
249 | ret = dm_i2c_read(dev, 0, buf, sizeof(buf)); | |
250 | if (ret < 0) | |
251 | return ret; | |
252 | ||
253 | if (type == ds_1307) { | |
254 | if (buf[RTC_SEC_REG_ADDR] & RTC_SEC_BIT_CH) { | |
255 | printf("### Warning: RTC oscillator has stopped\n"); | |
256 | /* clear the CH flag */ | |
257 | buf[RTC_SEC_REG_ADDR] &= ~RTC_SEC_BIT_CH; | |
258 | dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, | |
259 | buf[RTC_SEC_REG_ADDR]); | |
260 | return -1; | |
261 | } | |
262 | } | |
263 | ||
264 | if (type == m41t11) { | |
265 | /* clock halted? turn it on, so clock can tick. */ | |
266 | if (buf[RTC_SEC_REG_ADDR] & RTC_SEC_BIT_CH) { | |
267 | buf[RTC_SEC_REG_ADDR] &= ~RTC_SEC_BIT_CH; | |
268 | dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, | |
269 | MCP7941X_BIT_ST); | |
270 | dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, | |
271 | buf[RTC_SEC_REG_ADDR]); | |
272 | goto read_rtc; | |
273 | } | |
274 | } | |
275 | ||
276 | if (type == mcp794xx) { | |
277 | /* make sure that the backup battery is enabled */ | |
278 | if (!(buf[RTC_DAY_REG_ADDR] & MCP7941X_BIT_VBATEN)) { | |
279 | dm_i2c_reg_write(dev, RTC_DAY_REG_ADDR, | |
280 | buf[RTC_DAY_REG_ADDR] | | |
281 | MCP7941X_BIT_VBATEN); | |
282 | } | |
283 | ||
284 | /* clock halted? turn it on, so clock can tick. */ | |
285 | if (!(buf[RTC_SEC_REG_ADDR] & MCP7941X_BIT_ST)) { | |
286 | dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, | |
287 | MCP7941X_BIT_ST); | |
288 | printf("Started RTC\n"); | |
289 | goto read_rtc; | |
290 | } | |
291 | } | |
292 | ||
293 | tm->tm_sec = bcd2bin(buf[RTC_SEC_REG_ADDR] & 0x7F); | |
294 | tm->tm_min = bcd2bin(buf[RTC_MIN_REG_ADDR] & 0x7F); | |
295 | tm->tm_hour = bcd2bin(buf[RTC_HR_REG_ADDR] & 0x3F); | |
296 | tm->tm_mday = bcd2bin(buf[RTC_DATE_REG_ADDR] & 0x3F); | |
297 | tm->tm_mon = bcd2bin(buf[RTC_MON_REG_ADDR] & 0x1F); | |
298 | tm->tm_year = bcd2bin(buf[RTC_YR_REG_ADDR]) + | |
299 | (bcd2bin(buf[RTC_YR_REG_ADDR]) >= 70 ? | |
300 | 1900 : 2000); | |
301 | tm->tm_wday = bcd2bin((buf[RTC_DAY_REG_ADDR] - 1) & 0x07); | |
302 | tm->tm_yday = 0; | |
303 | tm->tm_isdst = 0; | |
304 | ||
305 | debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", | |
306 | tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, | |
307 | tm->tm_hour, tm->tm_min, tm->tm_sec); | |
308 | ||
309 | return 0; | |
310 | } | |
311 | ||
312 | static int ds1307_rtc_reset(struct udevice *dev) | |
313 | { | |
314 | int ret; | |
315 | ||
316 | /* clear Clock Halt */ | |
317 | ret = dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, 0x00); | |
318 | if (ret < 0) | |
319 | return ret; | |
320 | ret = dm_i2c_reg_write(dev, RTC_CTL_REG_ADDR, | |
321 | RTC_CTL_BIT_SQWE | RTC_CTL_BIT_RS1 | | |
322 | RTC_CTL_BIT_RS0); | |
323 | if (ret < 0) | |
324 | return ret; | |
325 | ||
326 | return 0; | |
327 | } | |
328 | ||
329 | static int ds1307_probe(struct udevice *dev) | |
330 | { | |
331 | i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS | | |
332 | DM_I2C_CHIP_WR_ADDRESS); | |
333 | ||
334 | return 0; | |
335 | } | |
336 | ||
337 | static const struct rtc_ops ds1307_rtc_ops = { | |
338 | .get = ds1307_rtc_get, | |
339 | .set = ds1307_rtc_set, | |
340 | .reset = ds1307_rtc_reset, | |
341 | }; | |
342 | ||
343 | static const struct udevice_id ds1307_rtc_ids[] = { | |
344 | { .compatible = "dallas,ds1307", .data = ds_1307 }, | |
345 | { .compatible = "dallas,ds1337", .data = ds_1337 }, | |
346 | { .compatible = "dallas,ds1340", .data = ds_1340 }, | |
347 | { .compatible = "microchip,mcp7941x", .data = mcp794xx }, | |
348 | { .compatible = "st,m41t11", .data = m41t11 }, | |
349 | { } | |
350 | }; | |
351 | ||
352 | U_BOOT_DRIVER(rtc_ds1307) = { | |
353 | .name = "rtc-ds1307", | |
354 | .id = UCLASS_RTC, | |
355 | .probe = ds1307_probe, | |
356 | .of_match = ds1307_rtc_ids, | |
357 | .ops = &ds1307_rtc_ops, | |
358 | }; | |
359 | #endif /* CONFIG_DM_RTC */ |