Git Repo - J-u-boot.git/blame_incremental - arch/arm/mach-davinci/Kconfig

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Commit	Line	Data
	1	if ARCH_DAVINCI
	2
	3	choice
	4	prompt "DaVinci board select"
	5	optional
	6
	7	config TARGET_DA850EVM
	8	bool "DA850 EVM board"
	9	select MACH_DAVINCI_DA850_EVM
	10	select SOC_DA850
	11	select SUPPORT_SPL
	12
	13	config TARGET_OMAPL138_LCDK
	14	bool "OMAPL138 LCDK"
	15	select SOC_DA8XX
	16	select SUPPORT_SPL
	17	select SPL_BOARD_INIT
	18
	19	config TARGET_LEGOEV3
	20	bool "LEGO MINDSTORMS EV3"
	21	select MACH_DAVINCI_DA850_EVM
	22	select SOC_DA850
	23
	24	endchoice
	25
	26	config SYS_SOC
	27	default "davinci"
	28
	29	config DA850_LOWLEVEL
	30	bool "Enable Lowlevel DA850 initialization"
	31	depends on SOC_DA850
	32
	33	config SYS_DA850_PLL_INIT
	34	bool
	35
	36	config SYS_DA850_DDR_INIT
	37	bool
	38
	39	config SOC_DA850
	40	bool
	41	select SOC_DA8XX
	42
	43	config SOC_DA8XX
	44	bool
	45	select SYS_DA850_DDR_INIT if SUPPORT_SPL \|\| DA850_LOWLEVEL
	46	select SYS_DA850_PLL_INIT if SUPPORT_SPL \|\| DA850_LOWLEVEL
	47
	48	config MACH_DAVINCI_DA850_EVM
	49	bool
	50
	51	if SYS_DA850_PLL_INIT
	52	comment "DA850 PLL Initialization Parameters"
	53
	54	config SYS_DV_CLKMODE
	55	int "PLLCTL Clock Mode"
	56	default 0
	57	help
	58	Set PLLCTL Clock Mode bit as External Clock or On Chip oscillator
	59
	60	config SYS_DA850_PLL0_POSTDIV
	61	int "PLLC0 PLL Post-Divider"
	62	default 1
	63	help
	64	Value written to PLLC0 PLL Post-Divider Control Register
	65
	66	config SYS_DA850_PLL0_PLLDIV1
	67	hex "PLLC0 Divider 1"
	68	default 0x8000
	69	help
	70	Value written to PLLC0 Divider 1 register
	71
	72	config SYS_DA850_PLL0_PLLDIV2
	73	hex "PLLC0 Divider 2"
	74	default 0x8001
	75	help
	76	Value written to PLLC0 Divider 2 register
	77
	78	config SYS_DA850_PLL0_PLLDIV3
	79	hex "PLLC0 Divider 3"
	80	default 0x8002
	81	help
	82	Value written to PLLC0 Divider 3 register
	83
	84	config SYS_DA850_PLL0_PLLDIV4
	85	hex "PLLC0 Divider 4"
	86	default 0x8003
	87	help
	88	Value written to PLLC0 Divider 4 register
	89
	90	config SYS_DA850_PLL0_PLLDIV5
	91	hex "PLLC0 Divider 5"
	92	default 0x8002
	93	help
	94	Value written to PLLC0 Divider 5 register
	95
	96	config SYS_DA850_PLL0_PLLDIV6
	97	hex "PLLC0 Divider 6"
	98	default 0x8000
	99	help
	100	Value written to PLLC0 Divider 6 register
	101
	102	config SYS_DA850_PLL0_PLLDIV7
	103	hex "PLLC0 Divider 7"
	104	default 0x8005
	105	help
	106	Value written to PLLC0 Divider 7 register
	107
	108	config SYS_DA850_PLL1_POSTDIV
	109	hex "PLLC1 PLL Post-Divider"
	110	default 1
	111	help
	112	Value written to PLLC1 PLL Post-Divider Control Register
	113
	114	config SYS_DA850_PLL1_PLLDIV1
	115	hex "PLLC1 Divider 2"
	116	default 0x8000
	117	help
	118	Value written to PLLC1 Divider 1 register
	119
	120	config SYS_DA850_PLL1_PLLDIV2
	121	hex "PLLC1 Divider 2"
	122	default 0x8001
	123	help
	124	Value written to PLLC1 Divider 2 register
	125
	126	config SYS_DA850_PLL1_PLLDIV3
	127	hex "PLLC1 Divider 3"
	128	default 0x8002
	129	help
	130	Value written to PLLC1 Divider 3 register
	131
	132	endif
	133
	134	source "board/davinci/da8xxevm/Kconfig"
	135	source "board/lego/ev3/Kconfig"
	136
	137	config SPL_LDSCRIPT
	138	default "board/davinci/da8xxevm/u-boot-spl-da850evm.lds"
	139
	140	endif