| | 1 | /* |
| | 2 | * Voipac PXA270 configuration file |
| | 3 | * |
| | 4 | * Copyright (C) 2010 Marek Vasut <[email protected]> |
| | 5 | * |
| | 6 | * This program is free software; you can redistribute it and/or |
| | 7 | * modify it under the terms of the GNU General Public License as |
| | 8 | * published by the Free Software Foundation; either version 2 of |
| | 9 | * the License, or (at your option) any later version. |
| | 10 | * |
| | 11 | * This program is distributed in the hope that it will be useful, |
| | 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| | 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| | 14 | * GNU General Public License for more details. |
| | 15 | * |
| | 16 | * You should have received a copy of the GNU General Public License |
| | 17 | * along with this program; if not, write to the Free Software |
| | 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| | 19 | * MA 02111-1307 USA |
| | 20 | */ |
| | 21 | |
| | 22 | #ifndef __CONFIG_H |
| | 23 | #define __CONFIG_H |
| | 24 | |
| | 25 | /* |
| | 26 | * High Level Board Configuration Options |
| | 27 | */ |
| | 28 | #define CONFIG_PXA27X 1 /* Marvell PXA270 CPU */ |
| | 29 | #define CONFIG_VPAC270 1 /* Voipac PXA270 board */ |
| | 30 | #define CONFIG_SYS_TEXT_BASE 0x0 |
| | 31 | |
| | 32 | /* |
| | 33 | * Environment settings |
| | 34 | */ |
| | 35 | #define CONFIG_ENV_OVERWRITE |
| | 36 | #define CONFIG_SYS_MALLOC_LEN (128*1024) |
| | 37 | #define CONFIG_ARCH_CPU_INIT |
| | 38 | #define CONFIG_BOOTCOMMAND \ |
| | 39 | "if mmc init && fatload mmc 0 0xa4000000 uImage; then " \ |
| | 40 | "bootm 0xa4000000; " \ |
| | 41 | "fi; " \ |
| | 42 | "if usb reset && fatload usb 0 0xa4000000 uImage; then " \ |
| | 43 | "bootm 0xa4000000; " \ |
| | 44 | "fi; " \ |
| | 45 | "if ide reset && fatload ide 0 0xa4000000 uImage; then " \ |
| | 46 | "bootm 0xa4000000; " \ |
| | 47 | "fi; " \ |
| | 48 | "bootm 0x60000;" |
| | 49 | #define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200" |
| | 50 | #define CONFIG_TIMESTAMP |
| | 51 | #define CONFIG_BOOTDELAY 2 /* Autoboot delay */ |
| | 52 | #define CONFIG_CMDLINE_TAG |
| | 53 | #define CONFIG_SETUP_MEMORY_TAGS |
| | 54 | #define CONFIG_SYS_TEXT_BASE 0x0 |
| | 55 | #define CONFIG_LZMA /* LZMA compression support */ |
| | 56 | |
| | 57 | /* |
| | 58 | * Serial Console Configuration |
| | 59 | */ |
| | 60 | #define CONFIG_PXA_SERIAL |
| | 61 | #define CONFIG_FFUART 1 |
| | 62 | #define CONFIG_BAUDRATE 115200 |
| | 63 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
| | 64 | |
| | 65 | /* |
| | 66 | * Bootloader Components Configuration |
| | 67 | */ |
| | 68 | #include <config_cmd_default.h> |
| | 69 | |
| | 70 | #define CONFIG_CMD_NET |
| | 71 | #define CONFIG_CMD_ENV |
| | 72 | #undef CONFIG_CMD_IMLS |
| | 73 | #define CONFIG_CMD_MMC |
| | 74 | #define CONFIG_CMD_USB |
| | 75 | #undef CONFIG_LCD |
| | 76 | #define CONFIG_CMD_IDE |
| | 77 | |
| | 78 | #ifdef CONFIG_ONENAND |
| | 79 | #undef CONFIG_CMD_FLASH |
| | 80 | #define CONFIG_CMD_ONENAND |
| | 81 | #else |
| | 82 | #define CONFIG_CMD_FLASH |
| | 83 | #undef CONFIG_CMD_ONENAND |
| | 84 | #endif |
| | 85 | |
| | 86 | /* |
| | 87 | * Networking Configuration |
| | 88 | * chip on the Voipac PXA270 board |
| | 89 | */ |
| | 90 | #ifdef CONFIG_CMD_NET |
| | 91 | #define CONFIG_CMD_PING |
| | 92 | #define CONFIG_CMD_DHCP |
| | 93 | |
| | 94 | #define CONFIG_NET_MULTI 1 |
| | 95 | #define CONFIG_DRIVER_DM9000 1 |
| | 96 | #define CONFIG_DM9000_BASE 0x08000300 /* CS2 */ |
| | 97 | #define DM9000_IO (CONFIG_DM9000_BASE) |
| | 98 | #define DM9000_DATA (CONFIG_DM9000_BASE + 4) |
| | 99 | #define CONFIG_NET_RETRY_COUNT 10 |
| | 100 | |
| | 101 | #define CONFIG_BOOTP_BOOTFILESIZE |
| | 102 | #define CONFIG_BOOTP_BOOTPATH |
| | 103 | #define CONFIG_BOOTP_GATEWAY |
| | 104 | #define CONFIG_BOOTP_HOSTNAME |
| | 105 | #endif |
| | 106 | |
| | 107 | /* |
| | 108 | * MMC Card Configuration |
| | 109 | */ |
| | 110 | #ifdef CONFIG_CMD_MMC |
| | 111 | #define CONFIG_MMC |
| | 112 | #define CONFIG_PXA_MMC |
| | 113 | #define CONFIG_SYS_MMC_BASE 0xF0000000 |
| | 114 | #define CONFIG_CMD_FAT |
| | 115 | #define CONFIG_CMD_EXT2 |
| | 116 | #define CONFIG_DOS_PARTITION |
| | 117 | #endif |
| | 118 | |
| | 119 | /* |
| | 120 | * KGDB |
| | 121 | */ |
| | 122 | #ifdef CONFIG_CMD_KGDB |
| | 123 | #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */ |
| | 124 | #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ |
| | 125 | #endif |
| | 126 | |
| | 127 | /* |
| | 128 | * HUSH Shell Configuration |
| | 129 | */ |
| | 130 | #define CONFIG_SYS_HUSH_PARSER 1 |
| | 131 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
| | 132 | |
| | 133 | #define CONFIG_SYS_LONGHELP |
| | 134 | #ifdef CONFIG_SYS_HUSH_PARSER |
| | 135 | #define CONFIG_SYS_PROMPT "$ " |
| | 136 | #else |
| | 137 | #define CONFIG_SYS_PROMPT "=> " |
| | 138 | #endif |
| | 139 | #define CONFIG_SYS_CBSIZE 256 |
| | 140 | #define CONFIG_SYS_PBSIZE \ |
| | 141 | (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) |
| | 142 | #define CONFIG_SYS_MAXARGS 16 |
| | 143 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
| | 144 | #define CONFIG_SYS_DEVICE_NULLDEV 1 |
| | 145 | |
| | 146 | /* |
| | 147 | * Clock Configuration |
| | 148 | */ |
| | 149 | #define CONFIG_SYS_HZ 1000 /* Timer @ 3250000 Hz */ |
| | 150 | #define CONFIG_SYS_CPUSPEED 0x190 /* 312MHz */ |
| | 151 | |
| | 152 | /* |
| | 153 | * Stack sizes |
| | 154 | */ |
| | 155 | #define CONFIG_STACKSIZE (128*1024) /* regular stack */ |
| | 156 | #ifdef CONFIG_USE_IRQ |
| | 157 | #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ |
| | 158 | #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ |
| | 159 | #endif |
| | 160 | |
| | 161 | /* |
| | 162 | * DRAM Map |
| | 163 | */ |
| | 164 | #define CONFIG_NR_DRAM_BANKS 2 /* 2 banks of DRAM */ |
| | 165 | #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ |
| | 166 | #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ |
| | 167 | |
| | 168 | #ifdef CONFIG_RAM_256M |
| | 169 | #define PHYS_SDRAM_2 0x80000000 /* SDRAM Bank #2 */ |
| | 170 | #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */ |
| | 171 | #endif |
| | 172 | |
| | 173 | #define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */ |
| | 174 | #ifdef CONFIG_RAM_256M |
| | 175 | #define CONFIG_SYS_DRAM_SIZE 0x10000000 /* 256 MB DRAM */ |
| | 176 | #else |
| | 177 | #define CONFIG_SYS_DRAM_SIZE 0x08000000 /* 128 MB DRAM */ |
| | 178 | #endif |
| | 179 | |
| | 180 | #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ |
| | 181 | #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ |
| | 182 | |
| | 183 | #define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 |
| | 184 | #define CONFIG_SYS_IPL_LOAD_ADDR (0x5c000000) |
| | 185 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| | 186 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| | 187 | (PHYS_SDRAM_1 + GENERATED_GBL_DATA_SIZE + 2048) |
| | 188 | |
| | 189 | /* |
| | 190 | * NOR FLASH |
| | 191 | */ |
| | 192 | #define CONFIG_SYS_MONITOR_BASE 0x0 |
| | 193 | #define CONFIG_SYS_MONITOR_LEN 0x40000 |
| | 194 | #define CONFIG_ENV_ADDR \ |
| | 195 | (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) |
| | 196 | #define CONFIG_ENV_SIZE 0x4000 |
| | 197 | |
| | 198 | #if defined(CONFIG_CMD_FLASH) /* NOR */ |
| | 199 | #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ |
| | 200 | |
| | 201 | #ifdef CONFIG_RAM_256M |
| | 202 | #define PHYS_FLASH_2 0x02000000 /* Flash Bank #2 */ |
| | 203 | #endif |
| | 204 | |
| | 205 | #define CONFIG_SYS_FLASH_CFI |
| | 206 | #define CONFIG_FLASH_CFI_DRIVER 1 |
| | 207 | |
| | 208 | #define CONFIG_SYS_MAX_FLASH_SECT (4 + 255) |
| | 209 | #ifdef CONFIG_RAM_256M |
| | 210 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 |
| | 211 | #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 } |
| | 212 | #else |
| | 213 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| | 214 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 |
| | 215 | #endif |
| | 216 | |
| | 217 | #define CONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ) |
| | 218 | #define CONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ) |
| | 219 | |
| | 220 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 |
| | 221 | #define CONFIG_SYS_FLASH_PROTECTION 1 |
| | 222 | |
| | 223 | #define CONFIG_ENV_IS_IN_FLASH 1 |
| | 224 | |
| | 225 | /* |
| | 226 | * The first four sectors of the NOR flash are 0x8000 bytes big, the rest of the |
| | 227 | * flash consists of 0x20000 bytes big sectors. |
| | 228 | */ |
| | 229 | #if (CONFIG_ENV_ADDR <= 0x18000) |
| | 230 | #define CONFIG_ENV_SECT_SIZE 0x8000 |
| | 231 | #else |
| | 232 | #define CONFIG_ENV_SECT_SIZE 0x20000 |
| | 233 | #endif |
| | 234 | |
| | 235 | #elif defined(CONFIG_CMD_ONENAND) /* OneNAND */ |
| | 236 | #define CONFIG_SYS_NO_FLASH |
| | 237 | #define CONFIG_SYS_ONENAND_BASE 0x00000000 |
| | 238 | |
| | 239 | #define CONFIG_ENV_IS_IN_ONENAND 1 |
| | 240 | #define CONFIG_ENV_SECT_SIZE 0x20000 |
| | 241 | |
| | 242 | #else /* No flash */ |
| | 243 | #define CONFIG_SYS_NO_FLASH |
| | 244 | #define CONFIG_SYS_ENV_IS_NOWHERE |
| | 245 | #endif |
| | 246 | |
| | 247 | /* |
| | 248 | * IDE |
| | 249 | */ |
| | 250 | #ifdef CONFIG_CMD_IDE |
| | 251 | #define CONFIG_LBA48 |
| | 252 | #undef CONFIG_IDE_LED |
| | 253 | #undef CONFIG_IDE_RESET |
| | 254 | |
| | 255 | #define __io |
| | 256 | |
| | 257 | #define CONFIG_SYS_IDE_MAXBUS 1 |
| | 258 | #define CONFIG_SYS_IDE_MAXDEVICE 1 |
| | 259 | |
| | 260 | #define CONFIG_SYS_ATA_BASE_ADDR 0x0c000000 |
| | 261 | #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0 |
| | 262 | |
| | 263 | #define CONFIG_SYS_ATA_DATA_OFFSET 0x120 |
| | 264 | #define CONFIG_SYS_ATA_REG_OFFSET 0x120 |
| | 265 | #define CONFIG_SYS_ATA_ALT_OFFSET 0x120 |
| | 266 | |
| | 267 | #define CONFIG_SYS_ATA_STRIDE 2 |
| | 268 | #endif |
| | 269 | |
| | 270 | /* |
| | 271 | * GPIO settings |
| | 272 | */ |
| | 273 | #define CONFIG_SYS_GPSR0_VAL 0x01308800 |
| | 274 | #define CONFIG_SYS_GPSR1_VAL 0x00cf0000 |
| | 275 | #define CONFIG_SYS_GPSR2_VAL 0x922ac000 |
| | 276 | #define CONFIG_SYS_GPSR3_VAL 0x0161e800 |
| | 277 | |
| | 278 | #define CONFIG_SYS_GPCR0_VAL 0x00010000 |
| | 279 | #define CONFIG_SYS_GPCR1_VAL 0x0 |
| | 280 | #define CONFIG_SYS_GPCR2_VAL 0x0 |
| | 281 | #define CONFIG_SYS_GPCR3_VAL 0x0 |
| | 282 | |
| | 283 | #define CONFIG_SYS_GPDR0_VAL 0xcbb18800 |
| | 284 | #define CONFIG_SYS_GPDR1_VAL 0xfccfa981 |
| | 285 | #define CONFIG_SYS_GPDR2_VAL 0x922affff |
| | 286 | #define CONFIG_SYS_GPDR3_VAL 0x0161e904 |
| | 287 | |
| | 288 | #define CONFIG_SYS_GAFR0_L_VAL 0x00100000 |
| | 289 | #define CONFIG_SYS_GAFR0_U_VAL 0xa5da8510 |
| | 290 | #define CONFIG_SYS_GAFR1_L_VAL 0x6992901a |
| | 291 | #define CONFIG_SYS_GAFR1_U_VAL 0xaaa5a0aa |
| | 292 | #define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa |
| | 293 | #define CONFIG_SYS_GAFR2_U_VAL 0x4109a401 |
| | 294 | #define CONFIG_SYS_GAFR3_L_VAL 0x54010310 |
| | 295 | #define CONFIG_SYS_GAFR3_U_VAL 0x00025401 |
| | 296 | |
| | 297 | #define CONFIG_SYS_PSSR_VAL 0x30 |
| | 298 | |
| | 299 | /* |
| | 300 | * Clock settings |
| | 301 | */ |
| | 302 | #define CONFIG_SYS_CKEN 0x00500240 |
| | 303 | #define CONFIG_SYS_CCCR 0x02000290 |
| | 304 | |
| | 305 | /* |
| | 306 | * Memory settings |
| | 307 | */ |
| | 308 | #define CONFIG_SYS_MSC0_VAL 0x3ffc95fa |
| | 309 | #define CONFIG_SYS_MSC1_VAL 0x02ccf974 |
| | 310 | #define CONFIG_SYS_MSC2_VAL 0x00000000 |
| | 311 | #ifdef CONFIG_RAM_256M |
| | 312 | #define CONFIG_SYS_MDCNFG_VAL 0x8ad30ad3 |
| | 313 | #else |
| | 314 | #define CONFIG_SYS_MDCNFG_VAL 0x88000ad3 |
| | 315 | #endif |
| | 316 | #define CONFIG_SYS_MDREFR_VAL 0x201fe01e |
| | 317 | #define CONFIG_SYS_MDMRS_VAL 0x00000000 |
| | 318 | #define CONFIG_SYS_FLYCNFG_VAL 0x00000000 |
| | 319 | #define CONFIG_SYS_SXCNFG_VAL 0x40044004 |
| | 320 | #define CONFIG_SYS_MEM_BUF_IMP 0x0f |
| | 321 | |
| | 322 | /* |
| | 323 | * PCMCIA and CF Interfaces |
| | 324 | */ |
| | 325 | #define CONFIG_SYS_MECR_VAL 0x00000001 |
| | 326 | #define CONFIG_SYS_MCMEM0_VAL 0x00014307 |
| | 327 | #define CONFIG_SYS_MCMEM1_VAL 0x00014307 |
| | 328 | #define CONFIG_SYS_MCATT0_VAL 0x0001c787 |
| | 329 | #define CONFIG_SYS_MCATT1_VAL 0x0001c787 |
| | 330 | #define CONFIG_SYS_MCIO0_VAL 0x0001430f |
| | 331 | #define CONFIG_SYS_MCIO1_VAL 0x0001430f |
| | 332 | |
| | 333 | /* |
| | 334 | * LCD |
| | 335 | */ |
| | 336 | #ifdef CONFIG_LCD |
| | 337 | #define CONFIG_VOIPAC_LCD |
| | 338 | #endif |
| | 339 | |
| | 340 | /* |
| | 341 | * USB |
| | 342 | */ |
| | 343 | #ifdef CONFIG_CMD_USB |
| | 344 | #define CONFIG_USB_OHCI_NEW |
| | 345 | #define CONFIG_SYS_USB_OHCI_CPU_INIT |
| | 346 | #define CONFIG_SYS_USB_OHCI_BOARD_INIT |
| | 347 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 |
| | 348 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x4C000000 |
| | 349 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "vpac270" |
| | 350 | #define CONFIG_USB_STORAGE |
| | 351 | #endif |
| | 352 | |
| | 353 | #endif /* __CONFIG_H */ |
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