]>
Commit | Line | Data |
---|---|---|
1 | CONFIG_PPC=y | |
2 | CONFIG_SYS_TEXT_BASE=0xFE000000 | |
3 | CONFIG_ENV_SIZE=0x2000 | |
4 | CONFIG_ENV_SECT_SIZE=0x10000 | |
5 | CONFIG_IDENT_STRING=" hrcon 0.01" | |
6 | CONFIG_SYS_CLK_FREQ=33333333 | |
7 | CONFIG_MPC83xx=y | |
8 | CONFIG_TARGET_HRCON=y | |
9 | CONFIG_SYSTEM_PLL_VCO_DIV_2=y | |
10 | CONFIG_SYSTEM_PLL_FACTOR_4_1=y | |
11 | CONFIG_CORE_PLL_RATIO_3_1=y | |
12 | CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y | |
13 | CONFIG_TSEC1_MODE_RGMII=y | |
14 | CONFIG_TSEC2_MODE_RGMII=y | |
15 | CONFIG_BAT0=y | |
16 | CONFIG_BAT0_NAME="DDR" | |
17 | CONFIG_BAT0_BASE=0x00000000 | |
18 | CONFIG_BAT0_LENGTH_128_MBYTES=y | |
19 | CONFIG_BAT0_ACCESS_RW=y | |
20 | CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y | |
21 | CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y | |
22 | CONFIG_BAT0_USER_MODE_VALID=y | |
23 | CONFIG_BAT0_SUPERVISOR_MODE_VALID=y | |
24 | CONFIG_BAT1=y | |
25 | CONFIG_BAT1_NAME="IMMRBAR" | |
26 | CONFIG_BAT1_BASE=0xE0000000 | |
27 | CONFIG_BAT1_LENGTH_8_MBYTES=y | |
28 | CONFIG_BAT1_ACCESS_RW=y | |
29 | CONFIG_BAT1_ICACHE_INHIBITED=y | |
30 | CONFIG_BAT1_ICACHE_GUARDED=y | |
31 | CONFIG_BAT1_DCACHE_INHIBITED=y | |
32 | CONFIG_BAT1_DCACHE_GUARDED=y | |
33 | CONFIG_BAT1_USER_MODE_VALID=y | |
34 | CONFIG_BAT1_SUPERVISOR_MODE_VALID=y | |
35 | CONFIG_BAT2=y | |
36 | CONFIG_BAT2_NAME="FLASH" | |
37 | CONFIG_BAT2_BASE=0xFE000000 | |
38 | CONFIG_BAT2_LENGTH_8_MBYTES=y | |
39 | CONFIG_BAT2_ACCESS_RW=y | |
40 | CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y | |
41 | CONFIG_BAT2_DCACHE_INHIBITED=y | |
42 | CONFIG_BAT2_DCACHE_GUARDED=y | |
43 | CONFIG_BAT2_USER_MODE_VALID=y | |
44 | CONFIG_BAT2_SUPERVISOR_MODE_VALID=y | |
45 | CONFIG_BAT3=y | |
46 | CONFIG_BAT3_NAME="STACK_IN_DCACHE" | |
47 | CONFIG_BAT3_BASE=0xE6000000 | |
48 | CONFIG_BAT3_ACCESS_RW=y | |
49 | CONFIG_BAT3_USER_MODE_VALID=y | |
50 | CONFIG_BAT3_SUPERVISOR_MODE_VALID=y | |
51 | CONFIG_LBLAW0=y | |
52 | CONFIG_LBLAW0_BASE=0xFE000000 | |
53 | CONFIG_LBLAW0_NAME="FLASH" | |
54 | CONFIG_LBLAW0_LENGTH_8_MBYTES=y | |
55 | CONFIG_LBLAW1=y | |
56 | CONFIG_LBLAW1_BASE=0xE0600000 | |
57 | CONFIG_LBLAW1_NAME="FPGA0" | |
58 | CONFIG_LBLAW1_LENGTH_1_MBYTES=y | |
59 | CONFIG_ELBC_BR0_OR0=y | |
60 | CONFIG_BR0_OR0_NAME="FLASH" | |
61 | CONFIG_BR0_OR0_BASE=0xFE000000 | |
62 | CONFIG_BR0_PORTSIZE_16BIT=y | |
63 | CONFIG_OR0_AM_8_MBYTES=y | |
64 | CONFIG_OR0_XAM_SET=y | |
65 | CONFIG_OR0_SCY_15=y | |
66 | CONFIG_OR0_CSNT_EARLIER=y | |
67 | CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y | |
68 | CONFIG_OR0_XACS_EXTENDED=y | |
69 | CONFIG_OR0_TRLX_RELAXED=y | |
70 | CONFIG_OR0_EHTR_8_CYCLE=y | |
71 | CONFIG_ELBC_BR1_OR1=y | |
72 | CONFIG_BR1_OR1_NAME="FPGA" | |
73 | CONFIG_BR1_OR1_BASE=0xE0600000 | |
74 | CONFIG_BR1_PORTSIZE_16BIT=y | |
75 | CONFIG_OR1_AM_1_MBYTES=y | |
76 | CONFIG_OR1_XAM_SET=y | |
77 | CONFIG_OR1_SCY_15=y | |
78 | CONFIG_OR1_CSNT_EARLIER=y | |
79 | CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y | |
80 | CONFIG_OR1_XACS_EXTENDED=y | |
81 | CONFIG_OR1_TRLX_RELAXED=y | |
82 | CONFIG_OR1_EHTR_8_CYCLE=y | |
83 | CONFIG_HID0_FINAL_EMCP=y | |
84 | CONFIG_HID0_FINAL_DPM=y | |
85 | CONFIG_HID0_FINAL_ICE=y | |
86 | CONFIG_HID2_HBE=y | |
87 | CONFIG_SICR_ETSEC1_A_TSEC_GTX_CLK125=y | |
88 | CONFIG_SICR_IEEE1588_A_GPIO=y | |
89 | CONFIG_SICR_GTM_GPIO=y | |
90 | CONFIG_SICR_ETSEC2_GPIO=y | |
91 | CONFIG_SICR_GPIOSEL_IEEE1588=y | |
92 | CONFIG_SICR_TMSOBI1_2_5_V=y | |
93 | CONFIG_SICR_TMSOBI2_2_5_V=y | |
94 | CONFIG_ACR_PIPE_DEP_4=y | |
95 | CONFIG_ACR_RPTCNT_4=y | |
96 | CONFIG_SPCR_TSECEP_3=y | |
97 | CONFIG_LCRR_DBYP_PLL_BYPASSED=y | |
98 | CONFIG_LCRR_CLKDIV_2=y | |
99 | CONFIG_CMD_IOLOOP=y | |
100 | CONFIG_FIT=y | |
101 | CONFIG_FIT_VERBOSE=y | |
102 | CONFIG_OF_BOARD_SETUP=y | |
103 | CONFIG_OF_STDOUT_VIA_ALIAS=y | |
104 | CONFIG_BOOTDELAY=5 | |
105 | CONFIG_USE_PREBOOT=y | |
106 | CONFIG_SYS_CONSOLE_INFO_QUIET=y | |
107 | # CONFIG_DISPLAY_BOARDINFO is not set | |
108 | CONFIG_BOARD_EARLY_INIT_F=y | |
109 | CONFIG_BOARD_EARLY_INIT_R=y | |
110 | CONFIG_LAST_STAGE_INIT=y | |
111 | CONFIG_HUSH_PARSER=y | |
112 | CONFIG_AUTOBOOT_KEYED=y | |
113 | CONFIG_AUTOBOOT_STOP_STR=" " | |
114 | CONFIG_CMD_IMLS=y | |
115 | CONFIG_CMD_FPGAD=y | |
116 | CONFIG_CMD_I2C=y | |
117 | CONFIG_CMD_MMC=y | |
118 | CONFIG_CMD_PCI=y | |
119 | # CONFIG_CMD_SETEXPR is not set | |
120 | CONFIG_CMD_MII=y | |
121 | CONFIG_CMD_PING=y | |
122 | CONFIG_CMD_EXT2=y | |
123 | CONFIG_DOS_PARTITION=y | |
124 | CONFIG_SYS_REDUNDAND_ENVIRONMENT=y | |
125 | CONFIG_ENV_ADDR=0xFE060000 | |
126 | CONFIG_ENV_ADDR_REDUND=0xFE070000 | |
127 | CONFIG_FSL_ESDHC=y | |
128 | CONFIG_MTD_NOR_FLASH=y | |
129 | CONFIG_FLASH_CFI_DRIVER=y | |
130 | CONFIG_SYS_FLASH_PROTECTION=y | |
131 | CONFIG_SYS_FLASH_CFI=y | |
132 | CONFIG_BITBANGMII=y | |
133 | CONFIG_PHY_ATHEROS=y | |
134 | CONFIG_PHY_BROADCOM=y | |
135 | CONFIG_PHY_DAVICOM=y | |
136 | CONFIG_PHY_LXT=y | |
137 | CONFIG_PHY_MARVELL=y | |
138 | CONFIG_PHY_NATSEMI=y | |
139 | CONFIG_PHY_REALTEK=y | |
140 | CONFIG_PHY_SMSC=y | |
141 | CONFIG_PHY_VITESSE=y | |
142 | CONFIG_MII=y | |
143 | CONFIG_TSEC_ENET=y | |
144 | CONFIG_CONS_INDEX=2 | |
145 | CONFIG_SYS_NS16550=y | |
146 | CONFIG_OF_LIBFDT=y |