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0417ef17 FE |
1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* | |
3 | * Copyright (C) 2016 Freescale Semiconductor, Inc. | |
4 | * | |
5 | * Configuration settings for the Embedded Artists i.MX7ULP COM board. | |
6 | */ | |
7 | ||
8 | #ifndef __MX7ULP_COM_CONFIG_H | |
9 | #define __MX7ULP_COM_CONFIG_H | |
10 | ||
11 | #include <linux/sizes.h> | |
12 | #include <asm/arch/imx-regs.h> | |
13 | ||
8b71576f RS |
14 | #ifdef CONFIG_SPL |
15 | #include "imx7ulp_spl.h" | |
16 | #endif | |
17 | ||
0417ef17 FE |
18 | /* Using ULP WDOG for reset */ |
19 | #define WDOG_BASE_ADDR WDG1_RBASE | |
20 | ||
65cc0e2a | 21 | #define CFG_SYS_HZ_CLOCK 1000000 /* Fixed at 1MHz from TSTMR */ |
0417ef17 | 22 | |
0417ef17 FE |
23 | /* UART */ |
24 | #define LPUART_BASE LPUART4_RBASE | |
25 | ||
0417ef17 FE |
26 | /* Physical Memory Map */ |
27 | ||
28 | #define PHYS_SDRAM 0x60000000 | |
aa6e94de | 29 | #define CFG_SYS_SDRAM_BASE PHYS_SDRAM |
0417ef17 | 30 | |
0613c36a | 31 | #define CFG_EXTRA_ENV_SETTINGS \ |
0417ef17 FE |
32 | "image=zImage\0" \ |
33 | "console=ttyLP0\0" \ | |
34 | "fdt_high=0xffffffff\0" \ | |
35 | "initrd_high=0xffffffff\0" \ | |
36 | "fdt_file=imx7ulp-com.dtb\0" \ | |
37 | "fdt_addr=0x63000000\0" \ | |
38 | "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ | |
de35b8f9 | 39 | "mmcpart=1\0" \ |
adfaa428 | 40 | "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ |
0417ef17 FE |
41 | "mmcargs=setenv bootargs console=${console},${baudrate} " \ |
42 | "root=${mmcroot}\0" \ | |
43 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ | |
44 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ | |
45 | "mmcboot=echo Booting from mmc ...; " \ | |
46 | "run mmcargs; " \ | |
47 | "if run loadfdt; then " \ | |
48 | "bootz ${loadaddr} - ${fdt_addr}; " \ | |
49 | "fi;\0" \ | |
50 | ||
65cc0e2a TR |
51 | #define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
52 | #define CFG_SYS_INIT_RAM_SIZE SZ_256K | |
0417ef17 | 53 | |
0417ef17 | 54 | #endif /* __CONFIG_H */ |