]>
Commit | Line | Data |
---|---|---|
d90a5a30 MY |
1 | # |
2 | # PINCTRL infrastructure and drivers | |
3 | # | |
4 | ||
5 | menu "Pin controllers" | |
6 | ||
7 | config PINCTRL | |
8 | bool "Support pin controllers" | |
9 | depends on DM | |
10 | help | |
11 | This enables the basic support for pinctrl framework. You may want | |
12 | to enable some more options depending on what you want to do. | |
13 | ||
14 | config PINCTRL_FULL | |
15 | bool "Support full pin controllers" | |
16 | depends on PINCTRL && OF_CONTROL | |
17 | default y | |
18 | help | |
19 | This provides Linux-compatible device tree interface for the pinctrl | |
20 | subsystem. This feature depends on device tree configuration because | |
21 | it parses a device tree to look for the pinctrl device which the | |
22 | peripheral device is associated with. | |
23 | ||
24 | If this option is disabled (it is the only possible choice for non-DT | |
25 | boards), the pinctrl core provides no systematic mechanism for | |
26 | identifying peripheral devices, applying needed pinctrl settings. | |
27 | It is totally up to the implementation of each low-level driver. | |
28 | You can save memory footprint in return for some limitations. | |
29 | ||
30 | config PINCTRL_GENERIC | |
31 | bool "Support generic pin controllers" | |
32 | depends on PINCTRL_FULL | |
33 | default y | |
34 | help | |
35 | Say Y here if you want to use the pinctrl subsystem through the | |
36 | generic DT interface. If enabled, some functions become available | |
37 | to parse common properties such as "pins", "groups", "functions" and | |
38 | some pin configuration parameters. It would be easier if you only | |
39 | need the generic DT interface for pin muxing and pin configuration. | |
40 | If you need to handle vendor-specific DT properties, you can disable | |
41 | this option and implement your own set_state callback in the pinctrl | |
42 | operations. | |
43 | ||
44 | config PINMUX | |
45 | bool "Support pin multiplexing controllers" | |
46 | depends on PINCTRL_GENERIC | |
47 | default y | |
48 | help | |
49 | This option enables pin multiplexing through the generic pinctrl | |
de2069c7 MB |
50 | framework. Most SoCs have their own multiplexing arrangement where |
51 | a single pin can be used for several functions. An SoC pinctrl driver | |
52 | allows the required function to be selected for each pin. | |
458a0700 | 53 | The driver is typically controlled by the device tree. |
d90a5a30 MY |
54 | |
55 | config PINCONF | |
56 | bool "Support pin configuration controllers" | |
57 | depends on PINCTRL_GENERIC | |
58 | help | |
59 | This option enables pin configuration through the generic pinctrl | |
60 | framework. | |
61 | ||
c20851b3 PD |
62 | config PINCONF_RECURSIVE |
63 | bool "Support recursive binding for pin configuration nodes" | |
64 | depends on PINCTRL_FULL | |
65 | default n if ARCH_STM32MP | |
66 | default y | |
67 | help | |
68 | In the Linux pinctrl binding, the pin configuration nodes need not be | |
69 | direct children of the pin controller device (may be grandchildren for | |
70 | example). It is define is each individual pin controller device. | |
71 | Say Y here if you want to keep this behavior with the pinconfig | |
423e324d | 72 | u-class: all sub are recursively bounded. |
c20851b3 PD |
73 | If the option is disabled, this behavior is deactivated and only |
74 | the direct children of pin controller will be assumed as pin | |
75 | configuration; you can save memory footprint when this feature is | |
76 | no needed. | |
77 | ||
d90a5a30 | 78 | config SPL_PINCTRL |
0fa0abec | 79 | bool "Support pin controllers in SPL" |
d90a5a30 MY |
80 | depends on SPL && SPL_DM |
81 | help | |
82 | This option is an SPL-variant of the PINCTRL option. | |
83 | See the help of PINCTRL for details. | |
84 | ||
8aeafb54 SG |
85 | config TPL_PINCTRL |
86 | bool "Support pin controllers in TPL" | |
87 | depends on TPL && TPL_DM | |
88 | help | |
89 | This option is an TPL variant of the PINCTRL option. | |
90 | See the help of PINCTRL for details. | |
91 | ||
747093dd SG |
92 | config VPL_PINCTRL |
93 | bool "Support pin controllers in VPL" | |
94 | depends on VPL && VPL_DM | |
95 | help | |
96 | This option is an VPL variant of the PINCTRL option. | |
97 | See the help of PINCTRL for details. | |
98 | ||
d90a5a30 MY |
99 | config SPL_PINCTRL_FULL |
100 | bool "Support full pin controllers in SPL" | |
101 | depends on SPL_PINCTRL && SPL_OF_CONTROL | |
b9747696 | 102 | default n if TARGET_STM32F746_DISCO |
d90a5a30 MY |
103 | default y |
104 | help | |
747093dd | 105 | This option is an SPL variant of the PINCTRL_FULL option. |
d90a5a30 MY |
106 | See the help of PINCTRL_FULL for details. |
107 | ||
8aeafb54 SG |
108 | config TPL_PINCTRL_FULL |
109 | bool "Support full pin controllers in TPL" | |
110 | depends on TPL_PINCTRL && TPL_OF_CONTROL | |
111 | help | |
747093dd SG |
112 | This option is a TPL variant of the PINCTRL_FULL option. |
113 | See the help of PINCTRL_FULL for details. | |
114 | ||
115 | config VPL_PINCTRL_FULL | |
116 | bool "Support full pin controllers in VPL" | |
117 | depends on VPL_PINCTRL && VPL_OF_CONTROL | |
118 | help | |
119 | This option is a VPL variant of the PINCTRL_FULL option. | |
8aeafb54 SG |
120 | See the help of PINCTRL_FULL for details. |
121 | ||
d90a5a30 MY |
122 | config SPL_PINCTRL_GENERIC |
123 | bool "Support generic pin controllers in SPL" | |
124 | depends on SPL_PINCTRL_FULL | |
125 | default y | |
126 | help | |
127 | This option is an SPL-variant of the PINCTRL_GENERIC option. | |
128 | See the help of PINCTRL_GENERIC for details. | |
129 | ||
5bc65f5c QS |
130 | config TPL_PINCTRL_GENERIC |
131 | bool "Support generic pin controllers in TPL" | |
132 | depends on TPL_PINCTRL_FULL | |
133 | default y | |
134 | help | |
135 | This option is a TPL-variant of the PINCTRL_GENERIC option. | |
136 | See the help of PINCTRL_GENERIC for details. | |
137 | ||
d90a5a30 MY |
138 | config SPL_PINMUX |
139 | bool "Support pin multiplexing controllers in SPL" | |
140 | depends on SPL_PINCTRL_GENERIC | |
141 | default y | |
142 | help | |
143 | This option is an SPL-variant of the PINMUX option. | |
144 | See the help of PINMUX for details. | |
458a0700 SG |
145 | The pinctrl subsystem can add a substantial overhead to the SPL |
146 | image since it typically requires quite a few tables either in the | |
147 | driver or in the device tree. If this is acceptable and you need | |
148 | to adjust pin multiplexing in SPL in order to boot into U-Boot, | |
149 | enable this option. You will need to enable device tree in SPL | |
150 | for this to work. | |
d90a5a30 MY |
151 | |
152 | config SPL_PINCONF | |
153 | bool "Support pin configuration controllers in SPL" | |
154 | depends on SPL_PINCTRL_GENERIC | |
155 | help | |
156 | This option is an SPL-variant of the PINCONF option. | |
157 | See the help of PINCONF for details. | |
158 | ||
c20851b3 PD |
159 | config SPL_PINCONF_RECURSIVE |
160 | bool "Support recursive binding for pin configuration nodes in SPL" | |
161 | depends on SPL_PINCTRL_FULL | |
162 | default n if ARCH_STM32MP | |
163 | default y | |
164 | help | |
165 | This option is an SPL-variant of the PINCONF_RECURSIVE option. | |
166 | See the help of PINCONF_RECURSIVE for details. | |
167 | ||
d90a5a30 MY |
168 | if PINCTRL || SPL_PINCTRL |
169 | ||
b814e000 MK |
170 | config PINCTRL_APPLE |
171 | bool "Apple pinctrl driver" | |
172 | depends on DM && PINCTRL_GENERIC && ARCH_APPLE | |
173 | default y | |
174 | help | |
175 | Support pin multiplexing on Apple SoCs. | |
176 | ||
177 | The driver is controlled by a device tree node which contains | |
178 | both the GPIO definitions and pin control functions for each | |
179 | available multiplex function. | |
180 | ||
51c7f348 | 181 | config PINCTRL_AR933X |
a79d0643 WW |
182 | bool "QCA/Athores ar933x pin control driver" |
183 | depends on DM && SOC_AR933X | |
184 | help | |
185 | Support pin multiplexing control on QCA/Athores ar933x SoCs. | |
186 | The driver is controlled by a device tree node which contains | |
187 | both the GPIO definitions and pin control functions for each | |
188 | available multiplex function. | |
189 | ||
51c7f348 PT |
190 | config PINCTRL_AT91 |
191 | bool "AT91 pinctrl driver" | |
192 | depends on DM | |
193 | help | |
194 | This option is to enable the AT91 pinctrl driver for AT91 PIO | |
195 | controller. | |
196 | ||
197 | AT91 PIO controller is a combined gpio-controller, pin-mux and | |
198 | pin-config module. Each I/O pin may be dedicated as a general-purpose | |
199 | I/O or be assigned to a function of an embedded peripheral. Each I/O | |
200 | pin has a glitch filter providing rejection of glitches lower than | |
201 | one-half of peripheral clock cycle and a debouncing filter providing | |
202 | rejection of unwanted pulses from key or push button operations. You | |
203 | can also control the multi-driver capability, pull-up and pull-down | |
204 | feature on each I/O pin. | |
205 | ||
206 | config PINCTRL_AT91PIO4 | |
207 | bool "AT91 PIO4 pinctrl driver" | |
208 | depends on DM | |
209 | help | |
210 | This option is to enable the AT91 pinctrl driver for AT91 PIO4 | |
211 | controller which is available on SAMA5D2 SoC. | |
212 | ||
74749f1e SG |
213 | config PINCTRL_INTEL |
214 | bool "Standard Intel pin-control and pin-mux driver" | |
215 | help | |
216 | Recent Intel chips such as Apollo Lake (APL) use a common pin control | |
217 | and GPIO scheme. The settings for this come from an SoC-specific | |
218 | driver which must be separately enabled. The driver supports setting | |
219 | pins on start-up and changing the GPIO attributes. | |
220 | ||
51c7f348 PT |
221 | config PINCTRL_PIC32 |
222 | bool "Microchip PIC32 pin-control and pin-mux driver" | |
223 | depends on DM && MACH_PIC32 | |
224 | default y | |
225 | help | |
226 | Supports individual pin selection and configuration for each | |
227 | remappable peripheral available on Microchip PIC32 | |
228 | SoCs. This driver is controlled by a device tree node which | |
cb4d1bbe | 229 | contains both GPIO definition and pin control functions. |
51c7f348 PT |
230 | |
231 | config PINCTRL_QCA953X | |
c102453a WW |
232 | bool "QCA/Athores qca953x pin control driver" |
233 | depends on DM && SOC_QCA953X | |
234 | help | |
235 | Support pin multiplexing control on QCA/Athores qca953x SoCs. | |
c102453a | 236 | |
51c7f348 PT |
237 | The driver is controlled by a device tree node which contains both |
238 | the GPIO definitions and pin control functions for each available | |
239 | multiplex function. | |
240 | ||
5990b059 HS |
241 | config PINCTRL_QE |
242 | bool "QE based pinctrl driver, like on mpc83xx" | |
243 | depends on DM | |
244 | help | |
245 | This option is to enable the QE pinctrl driver for QE based io | |
246 | controller. | |
247 | ||
09aa7c46 AY |
248 | config PINCTRL_ROCKCHIP_RV1108 |
249 | bool "Rockchip rv1108 pin control driver" | |
250 | depends on DM | |
251 | help | |
252 | Support pin multiplexing control on Rockchip rv1108 SoC. | |
253 | ||
254 | The driver is controlled by a device tree node which contains | |
255 | both the GPIO definitions and pin control functions for each | |
256 | available multiplex function. | |
257 | ||
9c6a3c67 MY |
258 | config PINCTRL_SANDBOX |
259 | bool "Sandbox pinctrl driver" | |
260 | depends on SANDBOX | |
261 | help | |
51c7f348 | 262 | This enables pinctrl driver for sandbox. |
9c6a3c67 | 263 | |
51c7f348 PT |
264 | Currently, this driver actually does nothing but print debug |
265 | messages when pinctrl operations are invoked. | |
266 | ||
267 | config PINCTRL_SINGLE | |
268 | bool "Single register pin-control and pin-multiplex driver" | |
269 | depends on DM | |
5f266c60 | 270 | help |
51c7f348 PT |
271 | This enables pinctrl driver for systems using a single register for |
272 | pin configuration and multiplexing. TI's AM335X SoCs are examples of | |
273 | such systems. | |
274 | ||
275 | Depending on the platform make sure to also enable OF_TRANSLATE and | |
276 | eventually SPL_OF_TRANSLATE to get correct address translations. | |
5f266c60 | 277 | |
0c563102 PC |
278 | config PINCTRL_STI |
279 | bool "STMicroelectronics STi pin-control and pin-mux driver" | |
280 | depends on DM && ARCH_STI | |
281 | default y | |
282 | help | |
eae488b7 | 283 | Support pin multiplexing control on STMicroelectronics STi SoCs. |
51c7f348 | 284 | |
0c563102 | 285 | The driver is controlled by a device tree node which contains both |
51c7f348 PT |
286 | the GPIO definitions and pin control functions for each available |
287 | multiplex function. | |
0c563102 | 288 | |
94d53084 VM |
289 | config PINCTRL_STM32 |
290 | bool "ST STM32 pin control driver" | |
291 | depends on DM | |
292 | help | |
51c7f348 | 293 | Supports pin multiplexing control on stm32 SoCs. |
94d53084 | 294 | |
51c7f348 PT |
295 | The driver is controlled by a device tree node which contains both |
296 | the GPIO definitions and pin control functions for each available | |
297 | multiplex function. | |
44d5c371 | 298 | |
8262435d PD |
299 | config PINCTRL_STMFX |
300 | bool "STMicroelectronics STMFX I2C GPIO expander pinctrl driver" | |
301 | depends on DM && PINCTRL_FULL | |
302 | help | |
303 | I2C driver for STMicroelectronics Multi-Function eXpander (STMFX) | |
304 | GPIO expander. | |
305 | Supports pin multiplexing control on stm32 SoCs. | |
306 | ||
307 | The driver is controlled by a device tree node which contains both | |
308 | the GPIO definitions and pin control functions for each available | |
309 | multiplex function. | |
310 | ||
311 | config SPL_PINCTRL_STMFX | |
312 | bool "STMicroelectronics STMFX I2C GPIO expander pinctrl driver in SPL" | |
313 | depends on SPL_PINCTRL_FULL | |
314 | help | |
315 | This option is an SPL-variant of the SPL_PINCTRL_STMFX option. | |
316 | See the help of PINCTRL_STMFX for details. | |
317 | ||
4f0e44e4 | 318 | config ASPEED_AST2500_PINCTRL |
171fd224 MS |
319 | bool "Aspeed AST2500 pin control driver" |
320 | depends on DM && PINCTRL_GENERIC && ASPEED_AST2500 | |
321 | default y | |
322 | help | |
323 | Support pin multiplexing control on Aspeed ast2500 SoC. The driver | |
324 | uses Generic Pinctrl framework and is compatible with the Linux | |
325 | driver, i.e. it uses the same device tree configuration. | |
4f0e44e4 | 326 | |
46220bf0 RC |
327 | config ASPEED_AST2600_PINCTRL |
328 | bool "Aspeed AST2600 pin control driver" | |
329 | depends on DM && PINCTRL_GENERIC && ASPEED_AST2600 | |
330 | default y | |
331 | help | |
332 | Support pin multiplexing control on Aspeed ast2600 SoC. The driver | |
333 | uses Generic Pinctrl framework and is compatible with the Linux | |
334 | driver, i.e. it uses the same device tree configuration. | |
335 | ||
7224d5cc SA |
336 | config PINCTRL_K210 |
337 | bool "Kendryte K210 Fully-Programmable Input/Output Array driver" | |
338 | depends on DM && PINCTRL_GENERIC | |
339 | help | |
340 | Support pin multiplexing on the K210. The "FPIOA" can remap any | |
341 | supported function to any multifunctional IO pin. It can also perform | |
342 | basic GPIO functions, such as reading the current value of a pin. | |
dbd673f1 ARS |
343 | |
344 | config PINCTRL_ZYNQMP | |
345 | bool "Xilinx ZynqMP pin control driver" | |
346 | depends on DM && PINCTRL_GENERIC && ARCH_ZYNQMP | |
347 | default y | |
348 | help | |
349 | Support pin multiplexing control on Xilinx ZynqMP. The driver uses | |
350 | Generic Pinctrl framework and is compatible with the Linux driver, | |
351 | i.e. it uses the same device tree configuration. | |
352 | ||
d90a5a30 MY |
353 | endif |
354 | ||
efc46771 PT |
355 | source "drivers/pinctrl/broadcom/Kconfig" |
356 | source "drivers/pinctrl/exynos/Kconfig" | |
74749f1e | 357 | source "drivers/pinctrl/intel/Kconfig" |
01aa9d1d | 358 | source "drivers/pinctrl/mediatek/Kconfig" |
efc46771 PT |
359 | source "drivers/pinctrl/meson/Kconfig" |
360 | source "drivers/pinctrl/mscc/Kconfig" | |
3fad441c | 361 | source "drivers/pinctrl/mtmips/Kconfig" |
efc46771 | 362 | source "drivers/pinctrl/mvebu/Kconfig" |
8d393b2c | 363 | source "drivers/pinctrl/nexell/Kconfig" |
f49d616b | 364 | source "drivers/pinctrl/nuvoton/Kconfig" |
745df68d | 365 | source "drivers/pinctrl/nxp/Kconfig" |
53b2c7af | 366 | source "drivers/pinctrl/qcom/Kconfig" |
910df4d0 | 367 | source "drivers/pinctrl/renesas/Kconfig" |
5a127325 | 368 | source "drivers/pinctrl/rockchip/Kconfig" |
b799eabc | 369 | source "drivers/pinctrl/sunxi/Kconfig" |
91069320 | 370 | source "drivers/pinctrl/tegra/Kconfig" |
5dc626f8 | 371 | source "drivers/pinctrl/uniphier/Kconfig" |
732f01aa | 372 | source "drivers/pinctrl/starfive/Kconfig" |
5dc626f8 | 373 | |
d90a5a30 | 374 | endmenu |