[J-u-boot.git] / drivers / fpga / fpga.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * (C) Copyright 2002
 * Rich Ireland, Enterasys Networks, [email protected].
 */

/* Generic FPGA support */
#include <common.h>             /* core U-Boot definitions */
#include <init.h>
#include <log.h>
#include <xilinx.h>             /* xilinx specific definitions */
#include <altera.h>             /* altera specific definitions */
#include <lattice.h>
#include <dm/device_compat.h>

/* Local definitions */
#ifndef CONFIG_MAX_FPGA_DEVICES
#define CONFIG_MAX_FPGA_DEVICES		5
#endif

/* Local static data */
static int next_desc = FPGA_INVALID_DEVICE;
static fpga_desc desc_table[CONFIG_MAX_FPGA_DEVICES];

/*
 * fpga_no_sup
 * 'no support' message function
 */
static void fpga_no_sup(char *fn, char *msg)
{
	if (fn && msg)
		printf("%s: No support for %s.\n", fn, msg);
	else if (msg)
		printf("No support for %s.\n", msg);
	else
		printf("No FPGA support!\n");
}


/* fpga_get_desc
 *	map a device number to a descriptor
 */
const fpga_desc *const fpga_get_desc(int devnum)
{
	fpga_desc *desc = (fpga_desc *)NULL;

	if ((devnum >= 0) && (devnum < next_desc)) {
		desc = &desc_table[devnum];
		debug("%s: found fpga descriptor #%d @ 0x%p\n",
		      __func__, devnum, desc);
	}

	return desc;
}

/*
 * fpga_validate
 *	generic parameter checking code
 */
const fpga_desc *const fpga_validate(int devnum, const void *buf,
				     size_t bsize, char *fn)
{
	const fpga_desc *desc = fpga_get_desc(devnum);

	if (!desc)
		printf("%s: Invalid device number %d\n", fn, devnum);

	if (!buf) {
		printf("%s: Null buffer.\n", fn);
		return (fpga_desc * const)NULL;
	}
	return desc;
}

/*
 * fpga_dev_info
 *	generic multiplexing code
 */
static int fpga_dev_info(int devnum)
{
	int ret_val = FPGA_FAIL; /* assume failure */
	const fpga_desc * const desc = fpga_get_desc(devnum);

	if (desc) {
		debug("%s: Device Descriptor @ 0x%p\n",
		      __func__, desc->devdesc);

		switch (desc->devtype) {
		case fpga_xilinx:
#if defined(CONFIG_FPGA_XILINX)
			printf("Xilinx Device\nDescriptor @ 0x%p\n", desc);
			ret_val = xilinx_info(desc->devdesc);
#else
			fpga_no_sup((char *)__func__, "Xilinx devices");
#endif
			break;
		case fpga_altera:
#if defined(CONFIG_FPGA_ALTERA)
			printf("Altera Device\nDescriptor @ 0x%p\n", desc);
			ret_val = altera_info(desc->devdesc);
#else
			fpga_no_sup((char *)__func__, "Altera devices");
#endif
			break;
		case fpga_lattice:
#if defined(CONFIG_FPGA_LATTICE)
			printf("Lattice Device\nDescriptor @ 0x%p\n", desc);
			ret_val = lattice_info(desc->devdesc);
#else
			fpga_no_sup((char *)__func__, "Lattice devices");
#endif
			break;
		default:
			printf("%s: Invalid or unsupported device type %d\n",
			       __func__, desc->devtype);
		}
	} else {
		printf("%s: Invalid device number %d\n", __func__, devnum);
	}

	return ret_val;
}

/*
 * fpga_init is usually called from misc_init_r() and MUST be called
 * before any of the other fpga functions are used.
 */
void fpga_init(void)
{
	next_desc = 0;
	memset(desc_table, 0, sizeof(desc_table));

	debug("%s\n", __func__);
}

/*
 * fpga_count
 * Basic interface function to get the current number of devices available.
 */
int fpga_count(void)
{
	return next_desc;
}

/*
 * fpga_add
 *	Add the device descriptor to the device table.
 */
int fpga_add(fpga_type devtype, void *desc)
{
	int devnum = FPGA_INVALID_DEVICE;

	if (!desc) {
		printf("%s: NULL device descriptor\n", __func__);
		return devnum;
	}

	if (next_desc < 0) {
		printf("%s: FPGA support not initialized!\n", __func__);
	} else if ((devtype > fpga_min_type) && (devtype < fpga_undefined)) {
		if (next_desc < CONFIG_MAX_FPGA_DEVICES) {
			devnum = next_desc;
			desc_table[next_desc].devtype = devtype;
			desc_table[next_desc++].devdesc = desc;
		} else {
			printf("%s: Exceeded Max FPGA device count\n",
			       __func__);
		}
	} else {
		printf("%s: Unsupported FPGA type %d\n", __func__, devtype);
	}

	return devnum;
}

/*
 * Return 1 if the fpga data is partial.
 * This is only required for fpga drivers that support bitstream_type.
 */
int __weak fpga_is_partial_data(int devnum, size_t img_len)
{
	return 0;
}

/*
 * Convert bitstream data and load into the fpga
 */
int __weak fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
			      bitstream_type bstype)
{
	printf("Bitstream support not implemented for this FPGA device\n");
	return FPGA_FAIL;
}

#if defined(CONFIG_CMD_FPGA_LOADFS)
int fpga_fsload(int devnum, const void *buf, size_t size,
		 fpga_fs_info *fpga_fsinfo)
{
	int ret_val = FPGA_FAIL;           /* assume failure */
	const fpga_desc *desc = fpga_validate(devnum, buf, size,
					      (char *)__func__);

	if (desc) {
		switch (desc->devtype) {
		case fpga_xilinx:
#if defined(CONFIG_FPGA_XILINX)
			ret_val = xilinx_loadfs(desc->devdesc, buf, size,
						fpga_fsinfo);
#else
			fpga_no_sup((char *)__func__, "Xilinx devices");
#endif
			break;
		default:
			printf("%s: Invalid or unsupported device type %d\n",
			       __func__, desc->devtype);
		}
	}

	return ret_val;
}
#endif

#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
int fpga_loads(int devnum, const void *buf, size_t size,
	       struct fpga_secure_info *fpga_sec_info)
{
	int ret_val = FPGA_FAIL;

	const fpga_desc *desc = fpga_validate(devnum, buf, size,
					      (char *)__func__);

	if (desc) {
		switch (desc->devtype) {
		case fpga_xilinx:
#if defined(CONFIG_FPGA_XILINX)
			ret_val = xilinx_loads(desc->devdesc, buf, size,
					       fpga_sec_info);
#else
			fpga_no_sup((char *)__func__, "Xilinx devices");
#endif
			break;
		default:
			printf("%s: Invalid or unsupported device type %d\n",
			       __func__, desc->devtype);
		}
	}

	return ret_val;
}
#endif

/*
 * Generic multiplexing code
 */
int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype,
	      int flags)
{
	int ret_val = FPGA_FAIL;           /* assume failure */
	const fpga_desc *desc = fpga_validate(devnum, buf, bsize,
					      (char *)__func__);

	if (desc) {
		switch (desc->devtype) {
		case fpga_xilinx:
#if defined(CONFIG_FPGA_XILINX)
			ret_val = xilinx_load(desc->devdesc, buf, bsize,
					      bstype, flags);
#else
			fpga_no_sup((char *)__func__, "Xilinx devices");
#endif
			break;
		case fpga_altera:
#if defined(CONFIG_FPGA_ALTERA)
			ret_val = altera_load(desc->devdesc, buf, bsize);
#else
			fpga_no_sup((char *)__func__, "Altera devices");
#endif
			break;
		case fpga_lattice:
#if defined(CONFIG_FPGA_LATTICE)
			ret_val = lattice_load(desc->devdesc, buf, bsize);
#else
			fpga_no_sup((char *)__func__, "Lattice devices");
#endif
			break;
		default:
			printf("%s: Invalid or unsupported device type %d\n",
			       __func__, desc->devtype);
		}
	}

	return ret_val;
}

/*
 * fpga_dump
 *	generic multiplexing code
 */
int fpga_dump(int devnum, const void *buf, size_t bsize)
{
	int ret_val = FPGA_FAIL;           /* assume failure */
	const fpga_desc *desc = fpga_validate(devnum, buf, bsize,
					      (char *)__func__);

	if (desc) {
		switch (desc->devtype) {
		case fpga_xilinx:
#if defined(CONFIG_FPGA_XILINX)
			ret_val = xilinx_dump(desc->devdesc, buf, bsize);
#else
			fpga_no_sup((char *)__func__, "Xilinx devices");
#endif
			break;
		case fpga_altera:
#if defined(CONFIG_FPGA_ALTERA)
			ret_val = altera_dump(desc->devdesc, buf, bsize);
#else
			fpga_no_sup((char *)__func__, "Altera devices");
#endif
			break;
		case fpga_lattice:
#if defined(CONFIG_FPGA_LATTICE)
			ret_val = lattice_dump(desc->devdesc, buf, bsize);
#else
			fpga_no_sup((char *)__func__, "Lattice devices");
#endif
			break;
		default:
			printf("%s: Invalid or unsupported device type %d\n",
			       __func__, desc->devtype);
		}
	}

	return ret_val;
}

/*
 * fpga_info
 *	front end to fpga_dev_info.  If devnum is invalid, report on all
 *	available devices.
 */
int fpga_info(int devnum)
{
	if (devnum == FPGA_INVALID_DEVICE) {
		if (next_desc > 0) {
			int dev;

			for (dev = 0; dev < next_desc; dev++)
				fpga_dev_info(dev);

			return FPGA_SUCCESS;
		} else {
			printf("%s: No FPGA devices available.\n", __func__);
			return FPGA_FAIL;
		}
	}

	return fpga_dev_info(devnum);
}

#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
int fpga_compatible2flag(int devnum, const char *compatible)
{
	const fpga_desc * const desc = fpga_get_desc(devnum);

	if (!desc)
		return 0;

	switch (desc->devtype) {
#if defined(CONFIG_FPGA_XILINX)
	case fpga_xilinx:
	{
		xilinx_desc *xdesc = (xilinx_desc *)desc->devdesc;

		if (xdesc->operations && xdesc->operations->str2flag)
			return xdesc->operations->str2flag(xdesc, compatible);
	}
#endif
	default:
		break;
	}

	return 0;
}
#endif
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
e2211743 WD	2	/*
	3	* (C) Copyright 2002
	4	* Rich Ireland, Enterasys Networks, [email protected].
e2211743 WD	5	*/
e2211743 WD	6
f6555d90	7	/* Generic FPGA support */
e2211743	8	#include <common.h> /* core U-Boot definitions */
691d719d	9	#include <init.h>
f7ae49fc	10	#include <log.h>
e2211743 WD	11	#include <xilinx.h> /* xilinx specific definitions */
e2211743 WD	12	#include <altera.h> /* altera specific definitions */
3b8ac464	13	#include <lattice.h>
336d4615	14	#include <dm/device_compat.h>
e2211743	15
e2211743 WD	16	/* Local definitions */
	17	#ifndef CONFIG_MAX_FPGA_DEVICES
	18	#define CONFIG_MAX_FPGA_DEVICES 5
	19	#endif
	20
e2211743	21	/* Local static data */
e2211743 WD	22	static int next_desc = FPGA_INVALID_DEVICE;
	23	static fpga_desc desc_table[CONFIG_MAX_FPGA_DEVICES];
	24
f6555d90 MS	25	/*
f6555d90 MS	26	* fpga_no_sup
e2211743 WD	27	* 'no support' message function
e2211743 WD	28	*/
f6555d90	29	static void fpga_no_sup(char fn, char msg)
e2211743	30	{
f6555d90 MS	31	if (fn && msg)
	32	printf("%s: No support for %s.\n", fn, msg);
	33	else if (msg)
	34	printf("No support for %s.\n", msg);
	35	else
62a3b7dd	36	printf("No FPGA support!\n");
e2211743 WD	37	}
	38
	39
	40	/* fpga_get_desc
	41	* map a device number to a descriptor
	42	*/
ebd322de	43	const fpga_desc *const fpga_get_desc(int devnum)
e2211743	44	{
f6555d90	45	fpga_desc desc = (fpga_desc )NULL;
e2211743	46
f6555d90	47	if ((devnum >= 0) && (devnum < next_desc)) {
e2211743	48	desc = &desc_table[devnum];
f6555d90 MS	49	debug("%s: found fpga descriptor #%d @ 0x%p\n",
f6555d90 MS	50	__func__, devnum, desc);
e2211743 WD	51	}
	52
	53	return desc;
	54	}
	55
f6555d90 MS	56	/*
f6555d90 MS	57	* fpga_validate
e2211743 WD	58	* generic parameter checking code
e2211743 WD	59	*/
6631db47 MS	60	const fpga_desc const fpga_validate(int devnum, const void buf,
6631db47 MS	61	size_t bsize, char *fn)
e2211743	62	{
f6555d90	63	const fpga_desc *desc = fpga_get_desc(devnum);
e2211743	64
f6555d90 MS	65	if (!desc)
f6555d90 MS	66	printf("%s: Invalid device number %d\n", fn, devnum);
e2211743	67
f6555d90 MS	68	if (!buf) {
f6555d90 MS	69	printf("%s: Null buffer.\n", fn);
e2211743 WD	70	return (fpga_desc * const)NULL;
e2211743 WD	71	}
e2211743 WD	72	return desc;
	73	}
	74
f6555d90 MS	75	/*
f6555d90 MS	76	* fpga_dev_info
e2211743 WD	77	* generic multiplexing code
e2211743 WD	78	*/
f6555d90	79	static int fpga_dev_info(int devnum)
e2211743	80	{
f6555d90 MS	81	int ret_val = FPGA_FAIL; /* assume failure */
f6555d90 MS	82	const fpga_desc * const desc = fpga_get_desc(devnum);
e2211743	83
f6555d90 MS	84	if (desc) {
	85	debug("%s: Device Descriptor @ 0x%p\n",
	86	__func__, desc->devdesc);
e2211743	87
f6555d90	88	switch (desc->devtype) {
e2211743	89	case fpga_xilinx:
0133502e	90	#if defined(CONFIG_FPGA_XILINX)
f6555d90 MS	91	printf("Xilinx Device\nDescriptor @ 0x%p\n", desc);
f6555d90 MS	92	ret_val = xilinx_info(desc->devdesc);
e2211743	93	#else
f6555d90	94	fpga_no_sup((char *)__func__, "Xilinx devices");
e2211743 WD	95	#endif
	96	break;
	97	case fpga_altera:
0133502e	98	#if defined(CONFIG_FPGA_ALTERA)
f6555d90 MS	99	printf("Altera Device\nDescriptor @ 0x%p\n", desc);
f6555d90 MS	100	ret_val = altera_info(desc->devdesc);
e2211743	101	#else
f6555d90	102	fpga_no_sup((char *)__func__, "Altera devices");
e2211743 WD	103	#endif
e2211743 WD	104	break;
3b8ac464	105	case fpga_lattice:
439f6f7e	106	#if defined(CONFIG_FPGA_LATTICE)
3b8ac464 SB	107	printf("Lattice Device\nDescriptor @ 0x%p\n", desc);
3b8ac464 SB	108	ret_val = lattice_info(desc->devdesc);
439f6f7e	109	#else
f6555d90	110	fpga_no_sup((char *)__func__, "Lattice devices");
439f6f7e	111	#endif
3b8ac464	112	break;
e2211743	113	default:
f6555d90 MS	114	printf("%s: Invalid or unsupported device type %d\n",
f6555d90 MS	115	__func__, desc->devtype);
e2211743 WD	116	}
e2211743 WD	117	} else {
f6555d90	118	printf("%s: Invalid device number %d\n", __func__, devnum);
e2211743 WD	119	}
	120
	121	return ret_val;
	122	}
	123
f6555d90	124	/*
905bca6c	125	* fpga_init is usually called from misc_init_r() and MUST be called
e2211743 WD	126	* before any of the other fpga functions are used.
e2211743 WD	127	*/
6385b281	128	void fpga_init(void)
e2211743	129	{
e2211743	130	next_desc = 0;
f6555d90	131	memset(desc_table, 0, sizeof(desc_table));
e2211743	132
ee976c1b	133	debug("%s\n", __func__);
e2211743 WD	134	}
e2211743 WD	135
f6555d90 MS	136	/*
f6555d90 MS	137	* fpga_count
e2211743 WD	138	* Basic interface function to get the current number of devices available.
e2211743 WD	139	*/
f6555d90	140	int fpga_count(void)
e2211743 WD	141	{
	142	return next_desc;
	143	}
	144
f6555d90 MS	145	/*
f6555d90 MS	146	* fpga_add
6385b281	147	* Add the device descriptor to the device table.
e2211743	148	*/
f6555d90	149	int fpga_add(fpga_type devtype, void *desc)
e2211743 WD	150	{
	151	int devnum = FPGA_INVALID_DEVICE;
	152
cda1e3fb MS	153	if (!desc) {
	154	printf("%s: NULL device descriptor\n", __func__);
	155	return devnum;
	156	}
	157
f6555d90 MS	158	if (next_desc < 0) {
	159	printf("%s: FPGA support not initialized!\n", __func__);
	160	} else if ((devtype > fpga_min_type) && (devtype < fpga_undefined)) {
cda1e3fb MS	161	if (next_desc < CONFIG_MAX_FPGA_DEVICES) {
	162	devnum = next_desc;
	163	desc_table[next_desc].devtype = devtype;
	164	desc_table[next_desc++].devdesc = desc;
e2211743	165	} else {
cda1e3fb MS	166	printf("%s: Exceeded Max FPGA device count\n",
cda1e3fb MS	167	__func__);
e2211743 WD	168	}
e2211743 WD	169	} else {
f6555d90	170	printf("%s: Unsupported FPGA type %d\n", __func__, devtype);
e2211743 WD	171	}
	172
	173	return devnum;
	174	}
	175
8b93a92f GS	176	/*
	177	* Return 1 if the fpga data is partial.
	178	* This is only required for fpga drivers that support bitstream_type.
	179	*/
	180	int __weak fpga_is_partial_data(int devnum, size_t img_len)
	181	{
	182	return 0;
	183	}
	184
52c20644 MS	185	/*
	186	* Convert bitstream data and load into the fpga
	187	*/
7a78bd26 MS	188	int __weak fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
7a78bd26 MS	189	bitstream_type bstype)
52c20644 MS	190	{
	191	printf("Bitstream support not implemented for this FPGA device\n");
	192	return FPGA_FAIL;
	193	}
	194
1a897668 SDPP	195	#if defined(CONFIG_CMD_FPGA_LOADFS)
	196	int fpga_fsload(int devnum, const void *buf, size_t size,
	197	fpga_fs_info *fpga_fsinfo)
	198	{
	199	int ret_val = FPGA_FAIL; /* assume failure */
	200	const fpga_desc *desc = fpga_validate(devnum, buf, size,
	201	(char *)__func__);
	202
	203	if (desc) {
	204	switch (desc->devtype) {
	205	case fpga_xilinx:
	206	#if defined(CONFIG_FPGA_XILINX)
	207	ret_val = xilinx_loadfs(desc->devdesc, buf, size,
	208	fpga_fsinfo);
	209	#else
	210	fpga_no_sup((char *)__func__, "Xilinx devices");
	211	#endif
	212	break;
	213	default:
	214	printf("%s: Invalid or unsupported device type %d\n",
	215	__func__, desc->devtype);
	216	}
	217	}
	218
	219	return ret_val;
	220	}
	221	#endif
	222
fb2b8856	223	#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
cedd48e2 SDPP	224	int fpga_loads(int devnum, const void *buf, size_t size,
	225	struct fpga_secure_info *fpga_sec_info)
	226	{
	227	int ret_val = FPGA_FAIL;
	228
	229	const fpga_desc *desc = fpga_validate(devnum, buf, size,
	230	(char *)__func__);
	231
	232	if (desc) {
	233	switch (desc->devtype) {
	234	case fpga_xilinx:
	235	#if defined(CONFIG_FPGA_XILINX)
	236	ret_val = xilinx_loads(desc->devdesc, buf, size,
	237	fpga_sec_info);
	238	#else
	239	fpga_no_sup((char *)__func__, "Xilinx devices");
	240	#endif
	241	break;
	242	default:
	243	printf("%s: Invalid or unsupported device type %d\n",
	244	__func__, desc->devtype);
	245	}
	246	}
	247
	248	return ret_val;
	249	}
	250	#endif
	251
e2211743	252	/*
f6555d90	253	* Generic multiplexing code
e2211743	254	*/
282eed50 OS	255	int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype,
282eed50 OS	256	int flags)
e2211743 WD	257	{
e2211743 WD	258	int ret_val = FPGA_FAIL; /* assume failure */
f6555d90 MS	259	const fpga_desc *desc = fpga_validate(devnum, buf, bsize,
f6555d90 MS	260	(char *)__func__);
e2211743	261
f6555d90 MS	262	if (desc) {
f6555d90 MS	263	switch (desc->devtype) {
e2211743	264	case fpga_xilinx:
0133502e	265	#if defined(CONFIG_FPGA_XILINX)
7a78bd26	266	ret_val = xilinx_load(desc->devdesc, buf, bsize,
282eed50	267	bstype, flags);
e2211743	268	#else
f6555d90	269	fpga_no_sup((char *)__func__, "Xilinx devices");
e2211743 WD	270	#endif
	271	break;
	272	case fpga_altera:
0133502e	273	#if defined(CONFIG_FPGA_ALTERA)
f6555d90	274	ret_val = altera_load(desc->devdesc, buf, bsize);
e2211743	275	#else
f6555d90	276	fpga_no_sup((char *)__func__, "Altera devices");
e2211743 WD	277	#endif
e2211743 WD	278	break;
3b8ac464	279	case fpga_lattice:
439f6f7e	280	#if defined(CONFIG_FPGA_LATTICE)
3b8ac464	281	ret_val = lattice_load(desc->devdesc, buf, bsize);
439f6f7e	282	#else
f6555d90	283	fpga_no_sup((char *)__func__, "Lattice devices");
439f6f7e	284	#endif
3b8ac464	285	break;
e2211743	286	default:
f6555d90 MS	287	printf("%s: Invalid or unsupported device type %d\n",
f6555d90 MS	288	__func__, desc->devtype);
e2211743 WD	289	}
	290	}
	291
	292	return ret_val;
	293	}
	294
f6555d90 MS	295	/*
f6555d90 MS	296	* fpga_dump
e2211743 WD	297	* generic multiplexing code
e2211743 WD	298	*/
e6a857da	299	int fpga_dump(int devnum, const void *buf, size_t bsize)
e2211743 WD	300	{
e2211743 WD	301	int ret_val = FPGA_FAIL; /* assume failure */
f6555d90 MS	302	const fpga_desc *desc = fpga_validate(devnum, buf, bsize,
f6555d90 MS	303	(char *)__func__);
e2211743	304
f6555d90 MS	305	if (desc) {
f6555d90 MS	306	switch (desc->devtype) {
e2211743	307	case fpga_xilinx:
0133502e	308	#if defined(CONFIG_FPGA_XILINX)
f6555d90	309	ret_val = xilinx_dump(desc->devdesc, buf, bsize);
e2211743	310	#else
f6555d90	311	fpga_no_sup((char *)__func__, "Xilinx devices");
e2211743 WD	312	#endif
	313	break;
	314	case fpga_altera:
0133502e	315	#if defined(CONFIG_FPGA_ALTERA)
f6555d90	316	ret_val = altera_dump(desc->devdesc, buf, bsize);
e2211743	317	#else
f6555d90	318	fpga_no_sup((char *)__func__, "Altera devices");
e2211743 WD	319	#endif
e2211743 WD	320	break;
3b8ac464	321	case fpga_lattice:
439f6f7e	322	#if defined(CONFIG_FPGA_LATTICE)
3b8ac464	323	ret_val = lattice_dump(desc->devdesc, buf, bsize);
439f6f7e	324	#else
f6555d90	325	fpga_no_sup((char *)__func__, "Lattice devices");
439f6f7e	326	#endif
3b8ac464	327	break;
e2211743	328	default:
f6555d90 MS	329	printf("%s: Invalid or unsupported device type %d\n",
f6555d90 MS	330	__func__, desc->devtype);
e2211743 WD	331	}
	332	}
	333
	334	return ret_val;
	335	}
	336
f6555d90 MS	337	/*
f6555d90 MS	338	* fpga_info
e2211743 WD	339	* front end to fpga_dev_info. If devnum is invalid, report on all
	340	* available devices.
	341	*/
f6555d90	342	int fpga_info(int devnum)
e2211743	343	{
f6555d90 MS	344	if (devnum == FPGA_INVALID_DEVICE) {
f6555d90 MS	345	if (next_desc > 0) {
e2211743 WD	346	int dev;
e2211743 WD	347
f6555d90 MS	348	for (dev = 0; dev < next_desc; dev++)
	349	fpga_dev_info(dev);
	350
e2211743 WD	351	return FPGA_SUCCESS;
e2211743 WD	352	} else {
f6555d90	353	printf("%s: No FPGA devices available.\n", __func__);
e2211743 WD	354	return FPGA_FAIL;
	355	}
	356	}
e2211743	357
f6555d90 MS	358	return fpga_dev_info(devnum);
f6555d90 MS	359	}
2c60514d OS	360
	361	#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
	362	int fpga_compatible2flag(int devnum, const char *compatible)
	363	{
	364	const fpga_desc * const desc = fpga_get_desc(devnum);
	365
	366	if (!desc)
	367	return 0;
	368
	369	switch (desc->devtype) {
	370	#if defined(CONFIG_FPGA_XILINX)
	371	case fpga_xilinx:
	372	{
	373	xilinx_desc xdesc = (xilinx_desc )desc->devdesc;
	374
	375	if (xdesc->operations && xdesc->operations->str2flag)
	376	return xdesc->operations->str2flag(xdesc, compatible);
	377	}
	378	#endif
	379	default:
	380	break;
	381	}
	382
	383	return 0;
	384	}
	385	#endif