[J-u-boot.git] / arch / arm / lib / interrupts.c

/*
 * (C) Copyright 2003
 * Texas Instruments <www.ti.com>
 *
 * (C) Copyright 2002
 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
 * Marius Groeger <[email protected]>
 *
 * (C) Copyright 2002
 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
 * Alex Zuepke <[email protected]>
 *
 * (C) Copyright 2002-2004
 * Gary Jennejohn, DENX Software Engineering, <[email protected]>
 *
 * (C) Copyright 2004
 * Philippe Robin, ARM Ltd. <[email protected]>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <asm/proc-armv/ptrace.h>
#include <asm/u-boot-arm.h>

DECLARE_GLOBAL_DATA_PTR;

#ifdef CONFIG_USE_IRQ
int interrupt_init (void)
{
	unsigned long cpsr;

	/*
	 * setup up stacks if necessary
	 */
	IRQ_STACK_START = gd->irq_sp - 4;
	IRQ_STACK_START_IN = gd->irq_sp + 8;
	FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;


	__asm__ __volatile__("mrs %0, cpsr\n"
			     : "=r" (cpsr)
			     :
			     : "memory");

	__asm__ __volatile__("msr cpsr_c, %0\n"
			     "mov sp, %1\n"
			     :
			     : "r" (IRQ_MODE | I_BIT | F_BIT | (cpsr & ~FIQ_MODE)),
			       "r" (IRQ_STACK_START)
			     : "memory");

	__asm__ __volatile__("msr cpsr_c, %0\n"
			     "mov sp, %1\n"
			     :
			     : "r" (FIQ_MODE | I_BIT | F_BIT | (cpsr & ~IRQ_MODE)),
			       "r" (FIQ_STACK_START)
			     : "memory");

	__asm__ __volatile__("msr cpsr_c, %0"
			     :
			     : "r" (cpsr)
			     : "memory");

	return arch_interrupt_init();
}

/* enable IRQ interrupts */
void enable_interrupts (void)
{
	unsigned long temp;
	__asm__ __volatile__("mrs %0, cpsr\n"
			     "bic %0, %0, #0x80\n"
			     "msr cpsr_c, %0"
			     : "=r" (temp)
			     :
			     : "memory");
}


/*
 * disable IRQ/FIQ interrupts
 * returns true if interrupts had been enabled before we disabled them
 */
int disable_interrupts (void)
{
	unsigned long old,temp;
	__asm__ __volatile__("mrs %0, cpsr\n"
			     "orr %1, %0, #0xc0\n"
			     "msr cpsr_c, %1"
			     : "=r" (old), "=r" (temp)
			     :
			     : "memory");
	return (old & 0x80) == 0;
}
#else
int interrupt_init (void)
{
	/*
	 * setup up stacks if necessary
	 */
	IRQ_STACK_START_IN = gd->irq_sp + 8;

	return 0;
}

void enable_interrupts (void)
{
	return;
}
int disable_interrupts (void)
{
	return 0;
}
#endif


void bad_mode (void)
{
	panic ("Resetting CPU ...\n");
	reset_cpu (0);
}

void show_regs (struct pt_regs *regs)
{
	unsigned long __maybe_unused flags;
	const char __maybe_unused *processor_modes[] = {
	"USER_26",	"FIQ_26",	"IRQ_26",	"SVC_26",
	"UK4_26",	"UK5_26",	"UK6_26",	"UK7_26",
	"UK8_26",	"UK9_26",	"UK10_26",	"UK11_26",
	"UK12_26",	"UK13_26",	"UK14_26",	"UK15_26",
	"USER_32",	"FIQ_32",	"IRQ_32",	"SVC_32",
	"UK4_32",	"UK5_32",	"UK6_32",	"ABT_32",
	"UK8_32",	"UK9_32",	"HYP_32",	"UND_32",
	"UK12_32",	"UK13_32",	"UK14_32",	"SYS_32",
	};

	flags = condition_codes (regs);

	printf("pc : [<%08lx>]	   lr : [<%08lx>]\n",
	       instruction_pointer(regs), regs->ARM_lr);
	if (gd->flags & GD_FLG_RELOC) {
		printf("reloc pc : [<%08lx>]	   lr : [<%08lx>]\n",
		       instruction_pointer(regs) - gd->reloc_off,
		       regs->ARM_lr - gd->reloc_off);
	}
	printf("sp : %08lx  ip : %08lx	 fp : %08lx\n",
	       regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
	printf ("r10: %08lx  r9 : %08lx	 r8 : %08lx\n",
		regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
	printf ("r7 : %08lx  r6 : %08lx	 r5 : %08lx  r4 : %08lx\n",
		regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
	printf ("r3 : %08lx  r2 : %08lx	 r1 : %08lx  r0 : %08lx\n",
		regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
	printf ("Flags: %c%c%c%c",
		flags & CC_N_BIT ? 'N' : 'n',
		flags & CC_Z_BIT ? 'Z' : 'z',
		flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
	printf ("  IRQs %s  FIQs %s  Mode %s%s\n",
		interrupts_enabled (regs) ? "on" : "off",
		fast_interrupts_enabled (regs) ? "on" : "off",
		processor_modes[processor_mode (regs)],
		thumb_mode (regs) ? " (T)" : "");
}

void do_undefined_instruction (struct pt_regs *pt_regs)
{
	printf ("undefined instruction\n");
	show_regs (pt_regs);
	bad_mode ();
}

void do_software_interrupt (struct pt_regs *pt_regs)
{
	printf ("software interrupt\n");
	show_regs (pt_regs);
	bad_mode ();
}

void do_prefetch_abort (struct pt_regs *pt_regs)
{
	printf ("prefetch abort\n");
	show_regs (pt_regs);
	bad_mode ();
}

void do_data_abort (struct pt_regs *pt_regs)
{
	printf ("data abort\n");
	show_regs (pt_regs);
	bad_mode ();
}

void do_not_used (struct pt_regs *pt_regs)
{
	printf ("not used\n");
	show_regs (pt_regs);
	bad_mode ();
}

void do_fiq (struct pt_regs *pt_regs)
{
	printf ("fast interrupt request\n");
	show_regs (pt_regs);
	bad_mode ();
}

#ifndef CONFIG_USE_IRQ
void do_irq (struct pt_regs *pt_regs)
{
	printf ("interrupt request\n");
	show_regs (pt_regs);
	bad_mode ();
}
#endif
Commit	Line	Data
74f4304e WD	1	/*
	2	* (C) Copyright 2003
	3	* Texas Instruments <www.ti.com>
	4	*
	5	* (C) Copyright 2002
	6	* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
	7	* Marius Groeger <[email protected]>
	8	*
	9	* (C) Copyright 2002
	10	* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
	11	* Alex Zuepke <[email protected]>
	12	*
	13	* (C) Copyright 2002-2004
792a09eb	14	* Gary Jennejohn, DENX Software Engineering, <[email protected]>
74f4304e WD	15	*
	16	* (C) Copyright 2004
	17	* Philippe Robin, ARM Ltd. <[email protected]>
	18	*
3765b3e7	19	* SPDX-License-Identifier: GPL-2.0+
74f4304e WD	20	*/
	21
	22	#include <common.h>
	23	#include <asm/proc-armv/ptrace.h>
49c4bc3a	24	#include <asm/u-boot-arm.h>
74f4304e	25
c358d9c3 JCPV	26	DECLARE_GLOBAL_DATA_PTR;
c358d9c3 JCPV	27
f1d2b313	28	#ifdef CONFIG_USE_IRQ
c358d9c3 JCPV	29	int interrupt_init (void)
c358d9c3 JCPV	30	{
571bdf16 GS	31	unsigned long cpsr;
571bdf16 GS	32
c358d9c3 JCPV	33	/*
	34	* setup up stacks if necessary
	35	*/
f1d2b313 HS	36	IRQ_STACK_START = gd->irq_sp - 4;
f1d2b313 HS	37	IRQ_STACK_START_IN = gd->irq_sp + 8;
c358d9c3 JCPV	38	FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
c358d9c3 JCPV	39
571bdf16 GS	40
	41	__asm__ __volatile__("mrs %0, cpsr\n"
	42	: "=r" (cpsr)
	43	:
	44	: "memory");
	45
	46	__asm__ __volatile__("msr cpsr_c, %0\n"
	47	"mov sp, %1\n"
	48	:
	49	: "r" (IRQ_MODE \| I_BIT \| F_BIT \| (cpsr & ~FIQ_MODE)),
	50	"r" (IRQ_STACK_START)
	51	: "memory");
	52
	53	__asm__ __volatile__("msr cpsr_c, %0\n"
	54	"mov sp, %1\n"
	55	:
	56	: "r" (FIQ_MODE \| I_BIT \| F_BIT \| (cpsr & ~IRQ_MODE)),
	57	"r" (FIQ_STACK_START)
	58	: "memory");
	59
	60	__asm__ __volatile__("msr cpsr_c, %0"
	61	:
	62	: "r" (cpsr)
	63	: "memory");
	64
c358d9c3 JCPV	65	return arch_interrupt_init();
	66	}
	67
74f4304e WD	68	/* enable IRQ interrupts */
	69	void enable_interrupts (void)
	70	{
	71	unsigned long temp;
	72	__asm__ __volatile__("mrs %0, cpsr\n"
	73	"bic %0, %0, #0x80\n"
	74	"msr cpsr_c, %0"
	75	: "=r" (temp)
	76	:
	77	: "memory");
	78	}
	79
	80
	81	/*
	82	* disable IRQ/FIQ interrupts
	83	* returns true if interrupts had been enabled before we disabled them
	84	*/
	85	int disable_interrupts (void)
	86	{
	87	unsigned long old,temp;
	88	__asm__ __volatile__("mrs %0, cpsr\n"
	89	"orr %1, %0, #0xc0\n"
	90	"msr cpsr_c, %1"
	91	: "=r" (old), "=r" (temp)
	92	:
	93	: "memory");
	94	return (old & 0x80) == 0;
	95	}
	96	#else
f1d2b313 HS	97	int interrupt_init (void)
	98	{
	99	/*
	100	* setup up stacks if necessary
	101	*/
	102	IRQ_STACK_START_IN = gd->irq_sp + 8;
	103
	104	return 0;
	105	}
f1d2b313	106
74f4304e WD	107	void enable_interrupts (void)
	108	{
	109	return;
	110	}
	111	int disable_interrupts (void)
	112	{
	113	return 0;
	114	}
	115	#endif
	116
	117
	118	void bad_mode (void)
	119	{
	120	panic ("Resetting CPU ...\n");
	121	reset_cpu (0);
	122	}
	123
	124	void show_regs (struct pt_regs *regs)
	125	{
80402f34 HS	126	unsigned long __maybe_unused flags;
80402f34 HS	127	const char __maybe_unused *processor_modes[] = {
74f4304e WD	128	"USER_26", "FIQ_26", "IRQ_26", "SVC_26",
	129	"UK4_26", "UK5_26", "UK6_26", "UK7_26",
	130	"UK8_26", "UK9_26", "UK10_26", "UK11_26",
	131	"UK12_26", "UK13_26", "UK14_26", "UK15_26",
	132	"USER_32", "FIQ_32", "IRQ_32", "SVC_32",
	133	"UK4_32", "UK5_32", "UK6_32", "ABT_32",
b726d22d	134	"UK8_32", "UK9_32", "HYP_32", "UND_32",
74f4304e WD	135	"UK12_32", "UK13_32", "UK14_32", "SYS_32",
	136	};
	137
	138	flags = condition_codes (regs);
	139
23d184d2 SG	140	printf("pc : [<%08lx>] lr : [<%08lx>]\n",
	141	instruction_pointer(regs), regs->ARM_lr);
	142	if (gd->flags & GD_FLG_RELOC) {
	143	printf("reloc pc : [<%08lx>] lr : [<%08lx>]\n",
	144	instruction_pointer(regs) - gd->reloc_off,
	145	regs->ARM_lr - gd->reloc_off);
	146	}
	147	printf("sp : %08lx ip : %08lx fp : %08lx\n",
	148	regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
6d0943a6	149	printf ("r10: %08lx r9 : %08lx r8 : %08lx\n",
74f4304e	150	regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
6d0943a6	151	printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
74f4304e	152	regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
6d0943a6	153	printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
74f4304e WD	154	regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
	155	printf ("Flags: %c%c%c%c",
	156	flags & CC_N_BIT ? 'N' : 'n',
	157	flags & CC_Z_BIT ? 'Z' : 'z',
	158	flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
	159	printf (" IRQs %s FIQs %s Mode %s%s\n",
	160	interrupts_enabled (regs) ? "on" : "off",
	161	fast_interrupts_enabled (regs) ? "on" : "off",
	162	processor_modes[processor_mode (regs)],
	163	thumb_mode (regs) ? " (T)" : "");
	164	}
	165
	166	void do_undefined_instruction (struct pt_regs *pt_regs)
	167	{
	168	printf ("undefined instruction\n");
	169	show_regs (pt_regs);
	170	bad_mode ();
	171	}
	172
	173	void do_software_interrupt (struct pt_regs *pt_regs)
	174	{
	175	printf ("software interrupt\n");
	176	show_regs (pt_regs);
	177	bad_mode ();
	178	}
	179
	180	void do_prefetch_abort (struct pt_regs *pt_regs)
	181	{
	182	printf ("prefetch abort\n");
	183	show_regs (pt_regs);
	184	bad_mode ();
	185	}
	186
	187	void do_data_abort (struct pt_regs *pt_regs)
	188	{
1551df35	189	printf ("data abort\n");
74f4304e WD	190	show_regs (pt_regs);
	191	bad_mode ();
	192	}
	193
	194	void do_not_used (struct pt_regs *pt_regs)
	195	{
	196	printf ("not used\n");
	197	show_regs (pt_regs);
	198	bad_mode ();
	199	}
	200
	201	void do_fiq (struct pt_regs *pt_regs)
	202	{
	203	printf ("fast interrupt request\n");
	204	show_regs (pt_regs);
	205	bad_mode ();
	206	}
	207
6d0943a6	208	#ifndef CONFIG_USE_IRQ
74f4304e WD	209	void do_irq (struct pt_regs *pt_regs)
	210	{
	211	printf ("interrupt request\n");
	212	show_regs (pt_regs);
	213	bad_mode ();
	214	}
6d0943a6	215	#endif