[J-u-boot.git] / include / power / tps65910_pmic.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright (C) EETS GmbH, 2017, Felix Brack <[email protected]>
 */

#ifndef __TPS65910_PMIC_H_
#define __TPS65910_PMIC_H_

#define TPS65910_I2C_SEL_MASK		(0x1 << 4)
#define TPS65910_VDD_SR_MASK		(0x1 << 7)
#define TPS65910_GAIN_SEL_MASK		(0x3 << 6)
#define TPS65910_VDD_SEL_MASK		0x7f
#define TPS65910_VDD_SEL_MIN		3
#define TPS65910_VDD_SEL_MAX		75
#define TPS65910_SEL_MASK		(0x3 << 2)
#define TPS65910_SUPPLY_STATE_MASK	0x3
#define TPS65910_SUPPLY_STATE_OFF	0x0
#define TPS65910_SUPPLY_STATE_ON	0x1

/* i2c registers */
enum {
	TPS65910_REG_RTC_SEC			= 0x00,
	TPS65910_REG_RTC_MIN,
	TPS65910_REG_RTC_HOUR,
	TPS65910_REG_RTC_DAY,
	TPS65910_REG_RTC_MONTH,
	TPS65910_REG_RTC_YEAR,
	TPS65910_REG_RTC_WEEK,
	TPS65910_REG_RTC_ALARM_SEC		= 0x08,
	TPS65910_REG_RTC_ALARM_MIN,
	TPS65910_REG_RTC_ALARM_HOUR,
	TPS65910_REG_RTC_ALARM_DAY,
	TPS65910_REG_RTC_ALARM_MONTH,
	TPS65910_REG_RTC_ALARM_YEAR,
	TPS65910_REG_RTC_CTRL			= 0x10,
	TPS65910_REG_RTC_STAT,
	TPS65910_REG_RTC_INT,
	TPS65910_REG_RTC_COMP_LSB,
	TPS65910_REG_RTC_COMP_MSB,
	TPS65910_REG_RTC_RESISTOR_PRG,
	TPS65910_REG_RTC_RESET_STAT,
	TPS65910_REG_BACKUP1,
	TPS65910_REG_BACKUP2,
	TPS65910_REG_BACKUP3,
	TPS65910_REG_BACKUP4,
	TPS65910_REG_BACKUP5,
	TPS65910_REG_PUADEN,
	TPS65910_REG_REF,
	TPS65910_REG_VRTC,
	TPS65910_REG_VIO			= 0x20,
	TPS65910_REG_VDD1,
	TPS65910_REG_VDD1_VAL,
	TPS65910_REG_VDD1_VAL_SR,
	TPS65910_REG_VDD2,
	TPS65910_REG_VDD2_VAL,
	TPS65910_REG_VDD2_VAL_SR,
	TPS65910_REG_VDD3,
	TPS65910_REG_VDIG1			= 0x30,
	TPS65910_REG_VDIG2,
	TPS65910_REG_VAUX1,
	TPS65910_REG_VAUX2,
	TPS65910_REG_VAUX33,
	TPS65910_REG_VMMC,
	TPS65910_REG_VPLL,
	TPS65910_REG_VDAC,
	TPS65910_REG_THERM,
	TPS65910_REG_BATTERY_BACKUP_CHARGE,
	TPS65910_REG_DCDC_CTRL			= 0x3e,
	TPS65910_REG_DEVICE_CTRL,
	TPS65910_REG_DEVICE_CTRL2,
	TPS65910_REG_SLEEP_KEEP_LDO_ON,
	TPS65910_REG_SLEEP_KEEP_RES_ON,
	TPS65910_REG_SLEEP_SET_LDO_OFF,
	TPS65910_REG_SLEEP_SET_RES_OFF,
	TPS65910_REG_EN1_LDO_ASS,
	TPS65910_REG_EM1_SMPS_ASS,
	TPS65910_REG_EN2_LDO_ASS,
	TPS65910_REG_EM2_SMPS_ASS,
	TPS65910_REG_INT_STAT			= 0x50,
	TPS65910_REG_INT_MASK,
	TPS65910_REG_INT_STAT2,
	TPS65910_REG_INT_MASK2,
	TPS65910_REG_GPIO			= 0x60,
	TPS65910_REG_JTAGREVNUM			= 0x80,
	TPS65910_NUM_REGS
};

/* chip supplies */
enum {
	TPS65910_SUPPLY_VCCIO	= 0x00,
	TPS65910_SUPPLY_VCC1,
	TPS65910_SUPPLY_VCC2,
	TPS65910_SUPPLY_VCC3,
	TPS65910_SUPPLY_VCC4,
	TPS65910_SUPPLY_VCC5,
	TPS65910_SUPPLY_VCC6,
	TPS65910_SUPPLY_VCC7,
	TPS65910_NUM_SUPPLIES
};

/* regulator unit numbers */
enum {
	TPS65910_UNIT_VRTC = 0x00,
	TPS65910_UNIT_VIO,
	TPS65910_UNIT_VDD1,
	TPS65910_UNIT_VDD2,
	TPS65910_UNIT_VDD3,
	TPS65910_UNIT_VDIG1,
	TPS65910_UNIT_VDIG2,
	TPS65910_UNIT_VPLL,
	TPS65910_UNIT_VDAC,
	TPS65910_UNIT_VAUX1,
	TPS65910_UNIT_VAUX2,
	TPS65910_UNIT_VAUX33,
	TPS65910_UNIT_VMMC,
};

/* platform data */
struct tps65910_regulator_pdata {
	u32 supply;	/* regulator supply voltage in uV */
	uint unit;	/* unit-address according to DT */
};

/* driver names */
#define TPS65910_BUCK_DRIVER	"tps65910_buck"
#define TPS65910_BOOST_DRIVER	"tps65910_boost"
#define TPS65910_LDO_DRIVER	"tps65910_ldo"

#endif /* __TPS65910_PMIC_H_ */
Commit	Line	Data
83d290c5	1	/* SPDX-License-Identifier: GPL-2.0+ */
854dfbf9 FB	2	/*
854dfbf9 FB	3	* Copyright (C) EETS GmbH, 2017, Felix Brack <[email protected]>
854dfbf9 FB	4	*/
	5
	6	#ifndef __TPS65910_PMIC_H_
	7	#define __TPS65910_PMIC_H_
	8
	9	#define TPS65910_I2C_SEL_MASK (0x1 << 4)
	10	#define TPS65910_VDD_SR_MASK (0x1 << 7)
	11	#define TPS65910_GAIN_SEL_MASK (0x3 << 6)
	12	#define TPS65910_VDD_SEL_MASK 0x7f
	13	#define TPS65910_VDD_SEL_MIN 3
	14	#define TPS65910_VDD_SEL_MAX 75
	15	#define TPS65910_SEL_MASK (0x3 << 2)
	16	#define TPS65910_SUPPLY_STATE_MASK 0x3
	17	#define TPS65910_SUPPLY_STATE_OFF 0x0
	18	#define TPS65910_SUPPLY_STATE_ON 0x1
	19
	20	/* i2c registers */
	21	enum {
	22	TPS65910_REG_RTC_SEC = 0x00,
	23	TPS65910_REG_RTC_MIN,
	24	TPS65910_REG_RTC_HOUR,
	25	TPS65910_REG_RTC_DAY,
	26	TPS65910_REG_RTC_MONTH,
	27	TPS65910_REG_RTC_YEAR,
	28	TPS65910_REG_RTC_WEEK,
	29	TPS65910_REG_RTC_ALARM_SEC = 0x08,
	30	TPS65910_REG_RTC_ALARM_MIN,
	31	TPS65910_REG_RTC_ALARM_HOUR,
	32	TPS65910_REG_RTC_ALARM_DAY,
	33	TPS65910_REG_RTC_ALARM_MONTH,
	34	TPS65910_REG_RTC_ALARM_YEAR,
	35	TPS65910_REG_RTC_CTRL = 0x10,
	36	TPS65910_REG_RTC_STAT,
	37	TPS65910_REG_RTC_INT,
	38	TPS65910_REG_RTC_COMP_LSB,
	39	TPS65910_REG_RTC_COMP_MSB,
	40	TPS65910_REG_RTC_RESISTOR_PRG,
	41	TPS65910_REG_RTC_RESET_STAT,
	42	TPS65910_REG_BACKUP1,
	43	TPS65910_REG_BACKUP2,
	44	TPS65910_REG_BACKUP3,
	45	TPS65910_REG_BACKUP4,
	46	TPS65910_REG_BACKUP5,
	47	TPS65910_REG_PUADEN,
	48	TPS65910_REG_REF,
	49	TPS65910_REG_VRTC,
	50	TPS65910_REG_VIO = 0x20,
	51	TPS65910_REG_VDD1,
	52	TPS65910_REG_VDD1_VAL,
	53	TPS65910_REG_VDD1_VAL_SR,
	54	TPS65910_REG_VDD2,
	55	TPS65910_REG_VDD2_VAL,
	56	TPS65910_REG_VDD2_VAL_SR,
	57	TPS65910_REG_VDD3,
	58	TPS65910_REG_VDIG1 = 0x30,
	59	TPS65910_REG_VDIG2,
	60	TPS65910_REG_VAUX1,
	61	TPS65910_REG_VAUX2,
	62	TPS65910_REG_VAUX33,
	63	TPS65910_REG_VMMC,
	64	TPS65910_REG_VPLL,
	65	TPS65910_REG_VDAC,
	66	TPS65910_REG_THERM,
	67	TPS65910_REG_BATTERY_BACKUP_CHARGE,
68	TPS65910_REG_DCDC_CTRL = 0x3e,
69	TPS65910_REG_DEVICE_CTRL,
70	TPS65910_REG_DEVICE_CTRL2,
71	TPS65910_REG_SLEEP_KEEP_LDO_ON,
72	TPS65910_REG_SLEEP_KEEP_RES_ON,
73	TPS65910_REG_SLEEP_SET_LDO_OFF,
74	TPS65910_REG_SLEEP_SET_RES_OFF,
75	TPS65910_REG_EN1_LDO_ASS,
76	TPS65910_REG_EM1_SMPS_ASS,
77	TPS65910_REG_EN2_LDO_ASS,
78	TPS65910_REG_EM2_SMPS_ASS,
79	TPS65910_REG_INT_STAT = 0x50,
80	TPS65910_REG_INT_MASK,
81	TPS65910_REG_INT_STAT2,
82	TPS65910_REG_INT_MASK2,
83	TPS65910_REG_GPIO = 0x60,
84	TPS65910_REG_JTAGREVNUM = 0x80,
85	TPS65910_NUM_REGS
86	};
87
88	/* chip supplies */
89	enum {
90	TPS65910_SUPPLY_VCCIO = 0x00,
91	TPS65910_SUPPLY_VCC1,
92	TPS65910_SUPPLY_VCC2,
93	TPS65910_SUPPLY_VCC3,
94	TPS65910_SUPPLY_VCC4,
95	TPS65910_SUPPLY_VCC5,
96	TPS65910_SUPPLY_VCC6,
97	TPS65910_SUPPLY_VCC7,
98	TPS65910_NUM_SUPPLIES
99	};
100
101	/* regulator unit numbers */
102	enum {
103	TPS65910_UNIT_VRTC = 0x00,
104	TPS65910_UNIT_VIO,
105	TPS65910_UNIT_VDD1,
106	TPS65910_UNIT_VDD2,
107	TPS65910_UNIT_VDD3,
108	TPS65910_UNIT_VDIG1,
109	TPS65910_UNIT_VDIG2,
110	TPS65910_UNIT_VPLL,
111	TPS65910_UNIT_VDAC,
112	TPS65910_UNIT_VAUX1,
113	TPS65910_UNIT_VAUX2,
114	TPS65910_UNIT_VAUX33,
115	TPS65910_UNIT_VMMC,
116	};
117
118	/* platform data */
119	struct tps65910_regulator_pdata {
120	u32 supply; /* regulator supply voltage in uV */
121	uint unit; /* unit-address according to DT */
122	};
123
124	/* driver names */
125	#define TPS65910_BUCK_DRIVER "tps65910_buck"
126	#define TPS65910_BOOST_DRIVER "tps65910_boost"
127	#define TPS65910_LDO_DRIVER "tps65910_ldo"
128
129	#endif /* __TPS65910_PMIC_H_ */