[J-u-boot.git] / drivers / net / fm / tgec.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright 2009-2011 Freescale Semiconductor, Inc.
 *	Dave Liu <[email protected]>
 */

/* MAXFRM - maximum frame length */
#define MAXFRM_MASK	0x0000ffff

#include <phy.h>
#include <asm/types.h>
#include <asm/io.h>
#include <fsl_tgec.h>
#include <linux/delay.h>

#include "fm.h"

#define TGEC_CMD_CFG_INIT	(TGEC_CMD_CFG_NO_LEN_CHK | \
				 TGEC_CMD_CFG_RX_ER_DISC | \
				 TGEC_CMD_CFG_STAT_CLR | \
				 TGEC_CMD_CFG_PAUSE_IGNORE | \
				 TGEC_CMD_CFG_CRC_FWD)
#define TGEC_CMD_CFG_FINAL	(TGEC_CMD_CFG_NO_LEN_CHK | \
				 TGEC_CMD_CFG_RX_ER_DISC | \
				 TGEC_CMD_CFG_PAUSE_IGNORE | \
				 TGEC_CMD_CFG_CRC_FWD)

static void tgec_init_mac(struct fsl_enet_mac *mac)
{
	struct tgec *regs = mac->base;

	/* mask all interrupt */
	out_be32(&regs->imask, IMASK_MASK_ALL);

	/* clear all events */
	out_be32(&regs->ievent, IEVENT_CLEAR_ALL);

	/* set the max receive length */
	out_be32(&regs->maxfrm, mac->max_rx_len & MAXFRM_MASK);

	/*
	 * 1588 disable, insert second mac disable payload length check
	 * disable, normal operation, any rx error frame is discarded, clear
	 * counters, pause frame ignore, no promiscuous, LAN mode Rx CRC no
	 * strip, Tx CRC append, Rx disable and Tx disable
	 */
	out_be32(&regs->command_config, TGEC_CMD_CFG_INIT);
	udelay(1000);
	out_be32(&regs->command_config, TGEC_CMD_CFG_FINAL);

	/* multicast frame reception for the hash entry disable */
	out_be32(&regs->hashtable_ctrl, 0);
}

static void tgec_enable_mac(struct fsl_enet_mac *mac)
{
	struct tgec *regs = mac->base;

	setbits_be32(&regs->command_config, TGEC_CMD_CFG_RXTX_EN);
}

static void tgec_disable_mac(struct fsl_enet_mac *mac)
{
	struct tgec *regs = mac->base;

	clrbits_be32(&regs->command_config, TGEC_CMD_CFG_RXTX_EN);
}

static void tgec_set_mac_addr(struct fsl_enet_mac *mac, u8 *mac_addr)
{
	struct tgec *regs = mac->base;
	u32 mac_addr0, mac_addr1;

	/*
	 * if a station address of 0x12345678ABCD, perform a write to
	 * MAC_ADDR0 of 0x78563412, MAC_ADDR1 of 0x0000CDAB
	 */
	mac_addr0 = (mac_addr[3] << 24) | (mac_addr[2] << 16) | \
			(mac_addr[1] << 8)  | (mac_addr[0]);
	out_be32(&regs->mac_addr_0, mac_addr0);

	mac_addr1 = ((mac_addr[5] << 8) | mac_addr[4]) & 0x0000ffff;
	out_be32(&regs->mac_addr_1, mac_addr1);
}

static void tgec_set_interface_mode(struct fsl_enet_mac *mac,
					phy_interface_t type, int speed)
{
	/* nothing right now */
	return;
}

void init_tgec(struct fsl_enet_mac *mac, void *base,
		void *phyregs, int max_rx_len)
{
	mac->base = base;
	mac->phyregs = phyregs;
	mac->max_rx_len = max_rx_len;
	mac->init_mac = tgec_init_mac;
	mac->enable_mac = tgec_enable_mac;
	mac->disable_mac = tgec_disable_mac;
	mac->set_mac_addr = tgec_set_mac_addr;
	mac->set_if_mode = tgec_set_interface_mode;
}
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
c916d7c9 KG	2	/*
	3	* Copyright 2009-2011 Freescale Semiconductor, Inc.
	4	* Dave Liu <[email protected]>
c916d7c9 KG	5	*/
	6
	7	/* MAXFRM - maximum frame length */
	8	#define MAXFRM_MASK 0x0000ffff
	9
c916d7c9 KG	10	#include <phy.h>
	11	#include <asm/types.h>
	12	#include <asm/io.h>
8225b2fd	13	#include <fsl_tgec.h>
c05ed00a	14	#include <linux/delay.h>
c916d7c9 KG	15
	16	#include "fm.h"
	17
	18	#define TGEC_CMD_CFG_INIT (TGEC_CMD_CFG_NO_LEN_CHK \| \
	19	TGEC_CMD_CFG_RX_ER_DISC \| \
	20	TGEC_CMD_CFG_STAT_CLR \| \
	21	TGEC_CMD_CFG_PAUSE_IGNORE \| \
	22	TGEC_CMD_CFG_CRC_FWD)
	23	#define TGEC_CMD_CFG_FINAL (TGEC_CMD_CFG_NO_LEN_CHK \| \
	24	TGEC_CMD_CFG_RX_ER_DISC \| \
	25	TGEC_CMD_CFG_PAUSE_IGNORE \| \
	26	TGEC_CMD_CFG_CRC_FWD)
	27
	28	static void tgec_init_mac(struct fsl_enet_mac *mac)
	29	{
	30	struct tgec *regs = mac->base;
	31
	32	/* mask all interrupt */
	33	out_be32(&regs->imask, IMASK_MASK_ALL);
	34
	35	/* clear all events */
	36	out_be32(&regs->ievent, IEVENT_CLEAR_ALL);
	37
	38	/* set the max receive length */
	39	out_be32(&regs->maxfrm, mac->max_rx_len & MAXFRM_MASK);
	40
	41	/*
	42	* 1588 disable, insert second mac disable payload length check
	43	* disable, normal operation, any rx error frame is discarded, clear
	44	* counters, pause frame ignore, no promiscuous, LAN mode Rx CRC no
	45	* strip, Tx CRC append, Rx disable and Tx disable
	46	*/
	47	out_be32(&regs->command_config, TGEC_CMD_CFG_INIT);
	48	udelay(1000);
	49	out_be32(&regs->command_config, TGEC_CMD_CFG_FINAL);
	50
	51	/* multicast frame reception for the hash entry disable */
	52	out_be32(&regs->hashtable_ctrl, 0);
	53	}
	54
	55	static void tgec_enable_mac(struct fsl_enet_mac *mac)
	56	{
	57	struct tgec *regs = mac->base;
	58
	59	setbits_be32(&regs->command_config, TGEC_CMD_CFG_RXTX_EN);
	60	}
	61
	62	static void tgec_disable_mac(struct fsl_enet_mac *mac)
	63	{
	64	struct tgec *regs = mac->base;
	65
	66	clrbits_be32(&regs->command_config, TGEC_CMD_CFG_RXTX_EN);
	67	}
	68
	69	static void tgec_set_mac_addr(struct fsl_enet_mac mac, u8 mac_addr)
	70	{
	71	struct tgec *regs = mac->base;
	72	u32 mac_addr0, mac_addr1;
	73
	74	/*
	75	* if a station address of 0x12345678ABCD, perform a write to
	76	* MAC_ADDR0 of 0x78563412, MAC_ADDR1 of 0x0000CDAB
	77	*/
	78	mac_addr0 = (mac_addr[3] << 24) \| (mac_addr[2] << 16) \| \
79	(mac_addr[1] << 8) \| (mac_addr[0]);
80	out_be32(&regs->mac_addr_0, mac_addr0);
81
82	mac_addr1 = ((mac_addr[5] << 8) \| mac_addr[4]) & 0x0000ffff;
83	out_be32(&regs->mac_addr_1, mac_addr1);
84	}
85
86	static void tgec_set_interface_mode(struct fsl_enet_mac *mac,
87	phy_interface_t type, int speed)
88	{
89	/* nothing right now */
90	return;
91	}
92
93	void init_tgec(struct fsl_enet_mac mac, void base,
94	void *phyregs, int max_rx_len)
95	{
96	mac->base = base;
97	mac->phyregs = phyregs;
98	mac->max_rx_len = max_rx_len;
99	mac->init_mac = tgec_init_mac;
100	mac->enable_mac = tgec_enable_mac;
101	mac->disable_mac = tgec_disable_mac;
102	mac->set_mac_addr = tgec_set_mac_addr;
103	mac->set_if_mode = tgec_set_interface_mode;
104	}