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c609719b 1/*
149dded2 2 * (C) Copyright 2002-2003
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3 * Gary Jennejohn <[email protected]>
4 *
5 * Configuation settings for the TRAB board.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
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29#ifdef CONFIG_OLD_VERSION /* Old configuration: */
30#define CONFIG_RAM_16MB /* 16 MB SDRAM */
b0639ca3 31#endif
8a42eac7 32#define CONFIG_FLASH_8MB /* 8 MB Flash */
b0639ca3 33
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34/*
35 * If we are developing, we might want to start armboot from ram
36 * so we MUST NOT initialize critical regs like mem-timing ...
37 */
38#define CONFIG_INIT_CRITICAL /* undef for developing */
39
40/*
41 * High Level Configuration Options
42 * (easy to change)
43 */
44#define CONFIG_ARM920T 1 /* This is an arm920t CPU */
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45#define CONFIG_S3C2400 1 /* in a SAMSUNG S3C2400 SoC */
46#define CONFIG_TRAB 1 /* on a TRAB Board */
47#undef CONFIG_TRAB_50MHZ /* run the CPU at 50 MHz */
149dded2 48#define LITTLEENDIAN 1 /* used by usb_ohci.c */
c609719b 49
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50/* automatic software updates (see board/trab/auto_update.c) */
51#define CONFIG_AUTO_UPDATE 1
52
c609719b 53/* input clock of PLL */
7f6c2cbc 54#define CONFIG_SYS_CLK_FREQ 12000000 /* TRAB has 12 MHz input clock */
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55
56#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
57
58#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
59#define CONFIG_SETUP_MEMORY_TAGS 1
60#define CONFIG_INITRD_TAG 1
61
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62#define CFG_DEVICE_NULLDEV 1 /* enble null device */
63#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
6dff5529 64
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65#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
66
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67/***********************************************************
68 * I2C stuff:
69 * the TRAB is equipped with an ATMEL 24C04 EEPROM at
70 * address 0x54 with 8bit addressing
71 ***********************************************************/
72#define CONFIG_HARD_I2C /* I2C with hardware support */
73#define CFG_I2C_SPEED 100000 /* I2C speed */
74#define CFG_I2C_SLAVE 0x7F /* I2C slave addr */
75
76#define CFG_I2C_EEPROM_ADDR 0x54 /* EEPROM address */
77#define CFG_I2C_EEPROM_ADDR_LEN 1 /* 1 address byte */
78
79#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x01
80#define CFG_EEPROM_PAGE_WRITE_BITS 3 /* 8 bytes page write mode on 24C04 */
81#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
82
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83/* USB stuff */
84#define CONFIG_USB_OHCI 1
85#define CONFIG_USB_STORAGE 1
86#define CONFIG_DOS_PARTITION 1
87
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88/*
89 * Size of malloc() pool
90 */
699b13a6 91#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
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92
93/*
94 * Hardware drivers
95 */
96#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
97#define CS8900_BASE 0x07000300 /* agrees with WIN CE PA */
98#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
99
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100#define CONFIG_DRIVER_S3C24X0_I2C 1 /* we use the buildin I2C controller */
101
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102#define CONFIG_VFD 1 /* VFD linear frame buffer driver */
103#define VFD_TEST_LOGO 1 /* output a test logo to the VFDs */
104
105/*
106 * select serial console configuration
107 */
6dff5529 108#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on TRAB */
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109
110#define CONFIG_HWFLOW /* include RTS/CTS flow control support */
111
112#define CONFIG_MODEM_SUPPORT 1 /* enable modem initialization stuff */
113
114#define CONFIG_MODEM_KEY_MAGIC "23" /* hold down these keys to enable modem */
115
116/*
117 * The following enables modem debugging stuff. The dbg() and
118 * 'char screen[1024]' are used for debug printfs. Unfortunately,
119 * it is usable only from BDI
120 */
121#undef CONFIG_MODEM_SUPPORT_DEBUG
122
123/* allow to overwrite serial and ethaddr */
124#define CONFIG_ENV_OVERWRITE
125
126#define CONFIG_BAUDRATE 115200
127
128#define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */
129
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130/* Use s3c2400's RTC */
131#define CONFIG_RTC_S3C24X0 1
132
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133#ifdef CONFIG_HWFLOW
134#define CONFIG_COMMANDS_ADD_HWFLOW CFG_CMD_HWFLOW
135#else
136#define CONFIG_COMMANDS_ADD_HWFLOW 0
137#endif
138
139#ifdef CONFIG_VFD
140#define CONFIG_COMMANDS_ADD_VFD CFG_CMD_VFD
141#else
142#define CONFIG_COMMANDS_ADD_VFD 0
143#endif
144
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145#ifdef CONFIG_DRIVER_S3C24X0_I2C
146#define CONFIG_COMMANDS_ADD_EEPROM CFG_CMD_EEPROM
147#define CONFIG_COMMANDS_I2C CFG_CMD_I2C
148#else
149#define CONFIG_COMMANDS_ADD_EEPROM 0
150#define CONFIG_COMMANDS_I2C 0
151#endif
152
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153#ifndef USE_920T_MMU
154#define CONFIG_COMMANDS ((CONFIG_CMD_DFL & ~CFG_CMD_CACHE) | \
155 CFG_CMD_BSP | \
48b42616 156 CFG_CMD_DATE | \
c609719b 157 CONFIG_COMMANDS_ADD_HWFLOW | \
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158 CONFIG_COMMANDS_ADD_VFD | \
159 CONFIG_COMMANDS_ADD_EEPROM | \
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160 CFG_CMD_USB | \
161 CFG_CMD_FAT | \
6dff5529 162 CONFIG_COMMANDS_I2C )
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163#else
164#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
165 CFG_CMD_BSP | \
48b42616 166 CFG_CMD_DATE | \
c609719b 167 CONFIG_COMMANDS_ADD_HWFLOW | \
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168 CONFIG_COMMANDS_ADD_VFD | \
169 CONFIG_COMMANDS_ADD_EEPROM | \
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170 CFG_CMD_USB | \
171 CFG_CMD_FAT | \
6dff5529 172 CONFIG_COMMANDS_I2C )
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173#endif
174
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175/* moved up */
176#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
177
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178/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
179#include <cmd_confdefs.h>
180
c609719b 181#define CONFIG_BOOTDELAY 5
c8c3a8be 182#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
c609719b 183#define CONFIG_PREBOOT "echo;echo *** booting ***;echo"
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184#define CONFIG_BOOTARGS "console=ttyS0"
185#define CONFIG_NETMASK 255.255.0.0
6069ff26 186#define CONFIG_IPADDR 192.168.3.68
43d9616c 187#define CONFIG_HOSTNAME trab
c609719b 188#define CONFIG_SERVERIP 192.168.3.1
a0ff7f2e 189#define CONFIG_BOOTCOMMAND "burn_in"
47cd00fa 190
b0639ca3 191#ifndef CONFIG_FLASH_8MB /* current config: 16 MB flash */
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192#ifdef CFG_HUSH_PARSER
193#define CONFIG_EXTRA_ENV_SETTINGS \
194 "nfs_args=setenv bootargs root=/dev/nfs rw " \
195 "nfsroot=$serverip:$rootpath\0" \
196 "rootpath=/opt/eldk/arm_920TDI\0" \
197 "ram_args=setenv bootargs root=/dev/ram rw\0" \
198 "add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
199 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
200 "add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
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201 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
202 "load=tftp C100000 ${u-boot}\0" \
203 "update=protect off 0 5FFFF;era 0 5FFFF;" \
204 "cp.b C100000 0 $filesize\0" \
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205 "loadfile=/tftpboot/TRAB/uImage\0" \
206 "loadaddr=c400000\0" \
207 "net_load=tftpboot $loadaddr $loadfile\0" \
208 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
4654af27 209 "kernel_addr=00060000\0" \
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210 "flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
211 "mdm_init1=ATZ\0" \
212 "mdm_init2=ATS0=1\0" \
213 "mdm_flow_control=rts/cts\0"
214#else /* !CFG_HUSH_PARSER */
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215#define CONFIG_EXTRA_ENV_SETTINGS \
216 "nfs_args=setenv bootargs root=/dev/nfs rw " \
217 "nfsroot=$(serverip):$(rootpath)\0" \
218 "rootpath=/opt/eldk/arm_920TDI\0" \
219 "ram_args=setenv bootargs root=/dev/ram rw\0" \
220 "add_net=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
221 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off\0" \
222 "add_misc=setenv bootargs $(bootargs) console=ttyS0 panic=1\0" \
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223 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
224 "load=tftp C100000 $(u-boot)\0" \
225 "update=protect off 0 5FFFF;era 0 5FFFF;" \
226 "cp.b C100000 0 $(filesize)\0" \
47cd00fa 227 "loadfile=/tftpboot/TRAB/uImage\0" \
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228 "loadaddr=c400000\0" \
229 "net_load=tftpboot $(loadaddr) $(loadfile)\0" \
230 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
f54ebdfa 231 "kernel_addr=000C0000\0" \
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232 "flash_nfs=run nfs_args add_net add_misc;bootm $(kernel_addr)\0" \
233 "mdm_init1=ATZ\0" \
234 "mdm_init2=ATS0=1\0" \
235 "mdm_flow_control=rts/cts\0"
f54ebdfa 236#endif /* CFG_HUSH_PARSER */
b0639ca3 237#else /* CONFIG_FLASH_8MB => 8 MB flash */
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238#ifdef CFG_HUSH_PARSER
239#define CONFIG_EXTRA_ENV_SETTINGS \
240 "nfs_args=setenv bootargs root=/dev/nfs rw " \
241 "nfsroot=$serverip:$rootpath\0" \
242 "rootpath=/opt/eldk/arm_920TDI\0" \
243 "ram_args=setenv bootargs root=/dev/ram rw\0" \
244 "add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
245 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
246 "add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
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247 "u-boot=/tftpboot/TRAB/u-boot.bin-old\0" \
248 "load=tftp C100000 ${u-boot}\0" \
249 "update=protect off 0 3FFFF;era 0 3FFFF;" \
250 "cp.b C100000 0 $filesize;" \
251 "setenv filesize;saveenv\0" \
149dded2 252 "loadfile=/tftpboot/TRAB/uImage\0" \
f54ebdfa 253 "loadaddr=C400000\0" \
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254 "net_load=tftpboot $loadaddr $loadfile\0" \
255 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
f54ebdfa 256 "kernel_addr=000C0000\0" \
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257 "flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
258 "mdm_init1=ATZ\0" \
259 "mdm_init2=ATS0=1\0" \
260 "mdm_flow_control=rts/cts\0"
261#else /* !CFG_HUSH_PARSER */
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262#define CONFIG_EXTRA_ENV_SETTINGS \
263 "nfs_args=setenv bootargs root=/dev/nfs rw " \
264 "nfsroot=$(serverip):$(rootpath)\0" \
265 "rootpath=/opt/eldk/arm_920TDI\0" \
266 "ram_args=setenv bootargs root=/dev/ram rw\0" \
267 "add_net=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
268 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off\0" \
269 "add_misc=setenv bootargs $(bootargs) console=ttyS0 panic=1\0" \
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270 "u-boot=/tftpboot/TRAB/u-boot.bin-old\0" \
271 "load=tftp C100000 $(u-boot)\0" \
272 "update=protect off 0 3FFFF;era 0 3FFFF;" \
273 "cp.b C100000 0 $(filesize);" \
274 "setenv filesize;saveenv\0" \
47cd00fa 275 "loadfile=/tftpboot/TRAB/uImage\0" \
f54ebdfa 276 "loadaddr=C400000\0" \
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277 "net_load=tftpboot $(loadaddr) $(loadfile)\0" \
278 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
f54ebdfa 279 "kernel_addr=000C0000\0" \
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280 "flash_nfs=run nfs_args add_net add_misc;bootm $(kernel_addr)\0" \
281 "mdm_init1=ATZ\0" \
282 "mdm_init2=ATS0=1\0" \
283 "mdm_flow_control=rts/cts\0"
149dded2 284#endif /* CFG_HUSH_PARSER */
b0639ca3 285#endif /* CONFIG_FLASH_8MB */
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286
287#if 0 /* disabled for development */
288#define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
289#define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n"
290#define CONFIG_AUTOBOOT_DELAY_STR "system" /* 1st password */
291#endif
292
293#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
294#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
295/* what's this ? it's not used anywhere */
296#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
297#endif
298
299/*
300 * Miscellaneous configurable options
301 */
302#define CFG_LONGHELP /* undef to save memory */
303#define CFG_PROMPT "TRAB # " /* Monitor Command Prompt */
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304#ifdef CFG_HUSH_PARSER
305#define CFG_PROMPT_HUSH_PS2 "> "
306#endif
307
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308#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
309#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
310#define CFG_MAXARGS 16 /* max number of command args */
311#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
312
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313#define CFG_MEMTEST_START 0x0C000000 /* memtest works on */
314#define CFG_MEMTEST_END 0x0D000000 /* 16 MB in DRAM */
c609719b 315
6dff5529 316#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
c609719b 317
f54ebdfa 318#define CFG_LOAD_ADDR 0x0CF00000 /* default load address */
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319
320#ifdef CONFIG_TRAB_50MHZ
321/* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
322/* it to wrap 100 times (total 1562500) to get 1 sec. */
323/* this should _really_ be calculated !! */
324#define CFG_HZ 1562500
325#else
326/* the PWM TImer 4 uses a counter of 10390 for 10 ms, so we need */
327/* it to wrap 100 times (total 1039000) to get 1 sec. */
328/* this should _really_ be calculated !! */
329#define CFG_HZ 1039000
330#endif
331
332/* valid baudrates */
333#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
334
335#define CONFIG_MISC_INIT_R /* have misc_init_r() function */
336
4f7cb08e 337/*-----------------------------------------------------------------------
a0ff7f2e 338 * burn-in test stuff.
42d1f039 339 *
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340 * BURN_IN_CYCLE_DELAY defines the seconds to wait between each burn-in cycle
341 * Because the burn-in test itself causes also an delay of about 4 seconds,
342 * this time must be subtracted from the desired overall burn-in cycle time.
4f7cb08e 343 */
a0ff7f2e 344#define BURN_IN_CYCLE_DELAY 296 /* seconds between burn-in cycles */
4f7cb08e 345
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346/*-----------------------------------------------------------------------
347 * Stack sizes
348 *
349 * The stack sizes are set up in start.S using the settings below
350 */
351#define CONFIG_STACKSIZE (128*1024) /* regular stack */
352#ifdef CONFIG_USE_IRQ
353#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
354#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
355#endif
356
357/*-----------------------------------------------------------------------
358 * Physical Memory Map
359 */
6dff5529 360#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
f54ebdfa 361#define PHYS_SDRAM_1 0x0C000000 /* SDRAM Bank #1 */
b0639ca3 362#ifndef CONFIG_RAM_16MB
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363#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
364#else
6dff5529 365#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
f54ebdfa 366#endif
c609719b 367
6dff5529 368#define CFG_FLASH_BASE 0x00000000 /* Flash Bank #1 */
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369
370/* The following #defines are needed to get flash environment right */
6069ff26 371#define CFG_MONITOR_BASE CFG_FLASH_BASE
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372#define CFG_MONITOR_LEN (256 << 10)
373
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374/*-----------------------------------------------------------------------
375 * FLASH and environment organization
376 */
377#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
b0639ca3 378#ifndef CONFIG_FLASH_8MB
6069ff26 379#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
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380#else
381#define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
43d9616c 382#endif
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383
384/* timeout values are in ticks */
385#define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* Timeout for Flash Erase */
386#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
387
388#define CFG_ENV_IS_IN_FLASH 1
389
390/* Address and size of Primary Environment Sector */
b0639ca3 391#ifndef CONFIG_FLASH_8MB
f54ebdfa 392#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x60000)
c609719b 393#define CFG_ENV_SIZE 0x4000
f54ebdfa 394#define CFG_ENV_SECT_SIZE 0x20000
43d9616c 395#else
f54ebdfa 396#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000)
43d9616c 397#define CFG_ENV_SIZE 0x4000
f54ebdfa 398#define CFG_ENV_SECT_SIZE 0x4000
43d9616c 399#endif
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400
401/* Address and size of Redundant Environment Sector */
43d9616c 402#define CFG_ENV_OFFSET_REDUND (CFG_ENV_ADDR+CFG_ENV_SECT_SIZE)
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403#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
404
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405/* Initial value of the on-board touch screen brightness */
406#define CFG_BRIGHTNESS 0x20
407
c609719b 408#endif /* __CONFIG_H */
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