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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
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2 | /* |
3 | * (C) Copyright 2015 Mateusz Kulikowski <[email protected]> | |
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4 | */ |
5 | ||
6 | #include <common.h> | |
7 | #include <fdtdec.h> | |
8 | #include <dm.h> | |
336d4615 | 9 | #include <malloc.h> |
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10 | #include <dm/device.h> |
11 | #include <dm/root.h> | |
12 | #include <dm/test.h> | |
13 | #include <dm/util.h> | |
14 | #include <power/pmic.h> | |
15 | #include <spmi/spmi.h> | |
16 | #include <asm/gpio.h> | |
0e1fad43 | 17 | #include <test/test.h> |
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18 | #include <test/ut.h> |
19 | ||
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20 | /* Test if bus childs got probed propperly*/ |
21 | static int dm_test_spmi_probe(struct unit_test_state *uts) | |
22 | { | |
23 | const char *name = "spmi@0"; | |
24 | struct udevice *bus, *dev; | |
25 | ||
26 | ut_assertok(uclass_get_device(UCLASS_SPMI, 0, &bus)); | |
27 | ||
28 | /* Check bus name */ | |
29 | ut_asserteq_str(name, bus->name); | |
30 | ||
31 | /* Check that it has some devices */ | |
32 | ut_asserteq(device_has_children(bus), true); | |
33 | ||
34 | ut_assertok(device_find_first_child(bus, &dev)); | |
35 | ||
36 | /* There should be at least one child */ | |
37 | ut_assertnonnull(dev); | |
38 | ||
39 | /* Check that only PMICs are connected to the bus */ | |
40 | while (dev) { | |
41 | ut_asserteq(device_get_uclass_id(dev), UCLASS_PMIC); | |
42 | device_find_next_child(&dev); | |
43 | } | |
44 | ||
45 | return 0; | |
46 | } | |
e180c2b1 | 47 | DM_TEST(dm_test_spmi_probe, UT_TESTF_SCAN_FDT); |
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48 | |
49 | /* Test if it's possible to read bus directly and indirectly */ | |
50 | static int dm_test_spmi_access(struct unit_test_state *uts) | |
51 | { | |
52 | const char *pmic_name = "pm8916@0"; | |
53 | struct udevice *bus, *pmic; | |
54 | ||
55 | ut_assertok(uclass_get_device(UCLASS_SPMI, 0, &bus)); | |
56 | ||
57 | ut_assertok(device_get_child(bus, 0, &pmic)); | |
58 | ||
59 | /* Sanity check if it's proper PMIC */ | |
60 | ut_asserteq_str(pmic_name, pmic->name); | |
61 | ||
62 | /* Read PMIC ID reg using SPMI bus - it assumes it has slaveID == 0*/ | |
63 | ut_asserteq(spmi_reg_read(bus, 0, 0xC0, 0x4), 0x10); | |
64 | ut_asserteq(spmi_reg_read(bus, 0, 0xC0, 0x5), 0x5); | |
65 | ||
66 | /* Read ID reg via pmic interface */ | |
67 | ut_asserteq(pmic_reg_read(pmic, 0xC004), 0x10); | |
68 | ut_asserteq(pmic_reg_read(pmic, 0xC005), 0x5); | |
69 | ||
70 | return 0; | |
71 | } | |
e180c2b1 | 72 | DM_TEST(dm_test_spmi_access, UT_TESTF_SCAN_FDT); |
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73 | |
74 | ||
75 | /* Test if it's possible to access GPIO that should be in pmic */ | |
76 | static int dm_test_spmi_access_peripheral(struct unit_test_state *uts) | |
77 | { | |
78 | struct udevice *dev; | |
79 | unsigned int offset, gpio; | |
80 | const char *name; | |
81 | int offset_count; | |
82 | ||
83 | /* Get second pin of PMIC GPIO */ | |
84 | ut_assertok(gpio_lookup_name("spmi1", &dev, &offset, &gpio)); | |
85 | ||
86 | /* Check if PMIC is parent */ | |
87 | ut_asserteq(device_get_uclass_id(dev->parent), UCLASS_PMIC); | |
88 | ||
89 | /* This should be second gpio */ | |
90 | ut_asserteq(1, offset); | |
91 | ||
92 | name = gpio_get_bank_info(dev, &offset_count); | |
93 | ||
94 | /* Check bank name */ | |
95 | ut_asserteq_str("spmi", name); | |
96 | /* Check pin count */ | |
97 | ut_asserteq(4, offset_count); | |
98 | ||
99 | ut_assertok(gpio_request(gpio, "testing")); | |
100 | ||
101 | /* Try to set/clear gpio */ | |
102 | ut_assertok(gpio_direction_output(gpio, 0)); | |
103 | ut_asserteq(gpio_get_value(gpio), 0); | |
104 | ut_assertok(gpio_direction_output(gpio, 1)); | |
105 | ut_asserteq(gpio_get_value(gpio), 1); | |
106 | ut_assertok(gpio_direction_input(gpio)); | |
107 | ut_asserteq(gpio_get_value(gpio), 1); | |
108 | ||
109 | ut_assertok(gpio_free(gpio)); | |
110 | ||
111 | return 0; | |
112 | } | |
e180c2b1 | 113 | DM_TEST(dm_test_spmi_access_peripheral, UT_TESTF_SCAN_FDT); |