[J-u-boot.git] / include / configs / phycore_imx8mm.h

/* SPDX-License-Identifier: GPL-2.0-or-later
 *
 * Copyright (C) 2019-2020 PHYTEC Messtechnik GmbH
 * Author: Teresa Remmet <[email protected]>
 */

#ifndef __PHYCORE_IMX8MM_H
#define __PHYCORE_IMX8MM_H

#include <linux/sizes.h>
#include <linux/stringify.h>
#include <asm/arch/imx-regs.h>

#define CONFIG_SYS_BOOTM_LEN		SZ_64M
#define CONFIG_SPL_MAX_SIZE		(148 * SZ_1K)
#define CONFIG_SYS_MONITOR_LEN		SZ_512K
#define CONFIG_SYS_UBOOT_BASE \
		(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)

#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_STACK		0x920000
#define CONFIG_SPL_BSS_START_ADDR	0x910000
#define CONFIG_SPL_BSS_MAX_SIZE		SZ_8K
#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K

/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
#define CONFIG_MALLOC_F_ADDR		0x930000
/* For RAW image gives a error info not panic */
#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
#endif

#define CONFIG_EXTRA_ENV_SETTINGS \
	"image=Image\0" \
	"console=ttymxc2,115200\0" \
	"fdt_addr=0x48000000\0" \
	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
	"ip_dyn=yes\0" \
	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
	"mmcroot=2\0" \
	"mmcautodetect=yes\0" \
	"mmcargs=setenv bootargs console=${console} " \
		"root=/dev/mmcblk${mmcdev}p${mmcroot} rootwait rw\0" \
	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"if run loadfdt; then " \
			"booti ${loadaddr} - ${fdt_addr}; " \
		"else " \
			"echo WARN: Cannot load the DT; " \
		"fi;\0 " \
	"nfsroot=/nfs\0" \
	"netargs=setenv bootargs console=${console} root=/dev/nfs ip=dhcp " \
		"nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
	"netboot=echo Booting from net ...; " \
		"run netargs; " \
		"if test ${ip_dyn} = yes; then " \
			"setenv get_cmd dhcp; " \
		"else " \
			"setenv get_cmd tftp; " \
		"fi; " \
		"${get_cmd} ${loadaddr} ${image}; " \
		"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
			"booti ${loadaddr} - ${fdt_addr}; " \
		"else " \
			"echo WARN: Cannot load the DT; " \
		"fi;\0" \

/* Link Definitions */

#define CONFIG_SYS_INIT_RAM_ADDR	0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE	SZ_512K
#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

#define CONFIG_MMCROOT			"/dev/mmcblk2p2"  /* USDHC3 */

#define CONFIG_SYS_SDRAM_BASE		0x40000000

#define PHYS_SDRAM			0x40000000
#define PHYS_SDRAM_SIZE                 SZ_2G /* 2GB DDR */

/* UART */
#define CONFIG_MXC_UART_BASE		UART3_BASE_ADDR

/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE		SZ_2K
#define CONFIG_SYS_MAXARGS		64
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE

/* USDHC */
#define CONFIG_SYS_FSL_USDHC_NUM	2
#define CONFIG_SYS_FSL_ESDHC_ADDR       0
#define CONFIG_SYS_MMC_IMG_LOAD_PART	1

#endif /* __PHYCORE_IMX8MM_H */
Commit	Line	Data
0cc2a078 TR	1	/* SPDX-License-Identifier: GPL-2.0-or-later
	2	*
	3	* Copyright (C) 2019-2020 PHYTEC Messtechnik GmbH
	4	* Author: Teresa Remmet <[email protected]>
	5	*/
	6
	7	#ifndef __PHYCORE_IMX8MM_H
	8	#define __PHYCORE_IMX8MM_H
	9
	10	#include <linux/sizes.h>
	11	#include <linux/stringify.h>
	12	#include <asm/arch/imx-regs.h>
	13
	14	#define CONFIG_SYS_BOOTM_LEN SZ_64M
	15	#define CONFIG_SPL_MAX_SIZE (148 * SZ_1K)
	16	#define CONFIG_SYS_MONITOR_LEN SZ_512K
0cc2a078 TR	17	#define CONFIG_SYS_UBOOT_BASE \
	18	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
	19
	20	#ifdef CONFIG_SPL_BUILD
	21	#define CONFIG_SPL_STACK 0x920000
	22	#define CONFIG_SPL_BSS_START_ADDR 0x910000
	23	#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K
	24	#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
	25	#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K
	26
	27	/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
	28	#define CONFIG_MALLOC_F_ADDR 0x930000
	29	/* For RAW image gives a error info not panic */
	30	#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
	31	#endif
	32
	33	#define CONFIG_EXTRA_ENV_SETTINGS \
	34	"image=Image\0" \
	35	"console=ttymxc2,115200\0" \
	36	"fdt_addr=0x48000000\0" \
	37	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
10b317fd	38	"ip_dyn=yes\0" \
0cc2a078 TR	39	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
	40	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
	41	"mmcroot=2\0" \
	42	"mmcautodetect=yes\0" \
	43	"mmcargs=setenv bootargs console=${console} " \
	44	"root=/dev/mmcblk${mmcdev}p${mmcroot} rootwait rw\0" \
	45	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	46	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	47	"mmcboot=echo Booting from mmc ...; " \
	48	"run mmcargs; " \
	49	"if run loadfdt; then " \
	50	"booti ${loadaddr} - ${fdt_addr}; " \
	51	"else " \
	52	"echo WARN: Cannot load the DT; " \
	53	"fi;\0 " \
	54	"nfsroot=/nfs\0" \
	55	"netargs=setenv bootargs console=${console} root=/dev/nfs ip=dhcp " \
	56	"nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
	57	"netboot=echo Booting from net ...; " \
	58	"run netargs; " \
	59	"if test ${ip_dyn} = yes; then " \
	60	"setenv get_cmd dhcp; " \
	61	"else " \
	62	"setenv get_cmd tftp; " \
	63	"fi; " \
	64	"${get_cmd} ${loadaddr} ${image}; " \
	65	"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
	66	"booti ${loadaddr} - ${fdt_addr}; " \
	67	"else " \
	68	"echo WARN: Cannot load the DT; " \
	69	"fi;\0" \
	70
0cc2a078	71	/* Link Definitions */
0cc2a078 TR	72
	73	#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
	74	#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
	75	#define CONFIG_SYS_INIT_SP_OFFSET \
	76	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	77	#define CONFIG_SYS_INIT_SP_ADDR \
	78	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	79
	80	#define CONFIG_MMCROOT "/dev/mmcblk2p2" /* USDHC3 */
	81
0cc2a078 TR	82	#define CONFIG_SYS_SDRAM_BASE 0x40000000
0cc2a078 TR	83
0caa81fb	84	#define PHYS_SDRAM 0x40000000
0cc2a078 TR	85	#define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */
	86
	87	/* UART */
	88	#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
	89
	90	/* Monitor Command Prompt */
0cc2a078 TR	91	#define CONFIG_SYS_CBSIZE SZ_2K
	92	#define CONFIG_SYS_MAXARGS 64
	93	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
34a8128e	94
0cc2a078	95	/* USDHC */
0cc2a078 TR	96	#define CONFIG_SYS_FSL_USDHC_NUM 2
	97	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	98	#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
	99
0cc2a078	100	#endif /* __PHYCORE_IMX8MM_H */