projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| fcfdb6d5 | 1 | CONFIG_ARM=y |
| b11dc33e | 2 | CONFIG_GIC_V3_ITS=y |
| fcfdb6d5 | 3 | CONFIG_TARGET_LS2080ARDB=y |
| 278b90ce | 4 | CONFIG_SYS_TEXT_BASE=0x30100000 |
| 9802154a | 5 | CONFIG_SYS_MALLOC_LEN=0x202000 |
| 554e5514 | 6 | CONFIG_NR_DRAM_BANKS=3 |
| a09fea1d | 7 | CONFIG_ENV_SIZE=0x2000 |
| 556fd590 | 8 | CONFIG_NXP_ESBC=y |
| f7d0ae9c | 9 | CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" |
| df59b7d2 | 10 | CONFIG_FSL_USE_PCA9547_MUX=y |
| 2bba7807 | 11 | CONFIG_FSL_LS_PPA=y |
| d168bcb6 | 12 | CONFIG_AHCI=y |
| aca5cd27 | 13 | # CONFIG_SYS_MALLOC_F is not set |
| fcfdb6d5 SJ |
14 | CONFIG_FIT_VERBOSE=y |
| 15 | CONFIG_OF_BOARD_SETUP=y | |
| 16 | CONFIG_OF_STDOUT_VIA_ALIAS=y | |
| bb597c0e | 17 | CONFIG_BOOTDELAY=10 |
| 5abc1a45 SP |
18 | CONFIG_USE_BOOTARGS=y |
| 19 | CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" | |
| 970bf860 | 20 | CONFIG_BOOTCOMMAND="env exists mcinitcmd && env exists secureboot && esbc_validate 0x5806C0000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x580d00000;run distro_bootcmd;run nor_bootcmd; env exists secureboot && esbc_halt;" |
| 8ccf98b1 | 21 | CONFIG_MISC_INIT_R=y |
| ad12dc18 | 22 | CONFIG_CMD_IMLS=y |
| 89cb2b5f | 23 | CONFIG_CMD_GREPENV=y |
| a1dc980d | 24 | CONFIG_CMD_EEPROM=y |
| 88cd7d0e TR |
25 | CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 |
| 26 | CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 | |
| b331cd62 | 27 | CONFIG_CMD_GPT=y |
| 88663126 | 28 | CONFIG_CMD_I2C=y |
| 89cb2b5f | 29 | CONFIG_CMD_MMC=y |
| 8f1a80e9 | 30 | CONFIG_CMD_NAND=y |
| 88663126 | 31 | CONFIG_CMD_PCI=y |
| 78d1e1d0 | 32 | CONFIG_CMD_USB=y |
| fcfdb6d5 | 33 | # CONFIG_CMD_SETEXPR is not set |
| 89cb2b5f | 34 | CONFIG_CMD_CACHE=y |
| c9032ce1 | 35 | CONFIG_CMD_DATE=y |
| 0fd2290c | 36 | CONFIG_MP=y |
| fcfdb6d5 | 37 | CONFIG_OF_CONTROL=y |
| e91907a1 | 38 | CONFIG_ENV_OVERWRITE=y |
| fcfdb6d5 SJ |
39 | CONFIG_NET_RANDOM_ETHADDR=y |
| 40 | CONFIG_DM=y | |
| a4707dda | 41 | CONFIG_SATA_CEVA=y |
| efb5dab7 | 42 | CONFIG_DDR_CLK_FREQ=133333333 |
| 95372165 TR |
43 | CONFIG_DDR_ECC=y |
| 44 | CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y | |
| 55dabcc8 | 45 | CONFIG_SYS_I2C_LEGACY=y |
| 88cd7d0e | 46 | CONFIG_SYS_I2C_EEPROM_ADDR=0x57 |
| 07dea2e7 | 47 | CONFIG_FSL_ESDHC=y |
| 0cfccb54 | 48 | CONFIG_MTD=y |
| e856bdcf | 49 | CONFIG_MTD_NOR_FLASH=y |
| 2fe88d45 AF |
50 | CONFIG_FLASH_CFI_DRIVER=y |
| 51 | CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y | |
| 52 | CONFIG_SYS_FLASH_CFI=y | |
| 0cfccb54 | 53 | CONFIG_MTD_RAW_NAND=y |
| 53f06134 | 54 | CONFIG_NAND_FSL_IFC=y |
| c0ad62c5 | 55 | CONFIG_SYS_NAND_ONFI_DETECTION=y |
| aca5cd27 | 56 | CONFIG_DM_SPI_FLASH=y |
| f76750d1 | 57 | CONFIG_SPI_FLASH_STMICRO=y |
| 3146f0c0 | 58 | CONFIG_PHYLIB=y |
| 1c650108 | 59 | CONFIG_PHY_AQUANTIA=y |
| 60f3c015 | 60 | CONFIG_PHY_CORTINA=y |
| e99b1dfc | 61 | CONFIG_CORTINA_FW_ADDR=0x580980000 |
| fcfdb6d5 | 62 | CONFIG_E1000=y |
| d7869b21 | 63 | CONFIG_MII=y |
| cdeb7b8f | 64 | CONFIG_NVME=y |
| b331cd62 | 65 | CONFIG_PCI=y |
| b331cd62 | 66 | CONFIG_DM_PCI_COMPAT=y |
| ed188aa8 | 67 | CONFIG_PCIE_LAYERSCAPE_RC=y |
| a4707dda | 68 | CONFIG_DM_SCSI=y |
| 6f6b7cfa | 69 | CONFIG_CONS_INDEX=2 |
| fcfdb6d5 | 70 | CONFIG_SYS_NS16550=y |
| f1b1f770 | 71 | CONFIG_SPI=y |
| aca5cd27 | 72 | CONFIG_DM_SPI=y |
| fcfdb6d5 | 73 | CONFIG_FSL_DSPI=y |
| 0a8cc1a3 MY |
74 | CONFIG_USB=y |
| 75 | CONFIG_USB_XHCI_HCD=y | |
| 10db7500 | 76 | CONFIG_USB_XHCI_DWC3=y |
| fcfdb6d5 | 77 | CONFIG_RSA=y |
| 28522678 | 78 | CONFIG_RSA_SOFTWARE_EXP=y |