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Commit | Line | Data |
---|---|---|
f36f8bc6 AF |
1 | CONFIG_ARM=y |
2 | CONFIG_ARCH_IMX8M=y | |
3 | CONFIG_SYS_TEXT_BASE=0x40200000 | |
9802154a TR |
4 | CONFIG_SYS_MALLOC_LEN=0x2000000 |
5 | CONFIG_SYS_MALLOC_F_LEN=0x10000 | |
83061dbd | 6 | CONFIG_SPL_GPIO=y |
f36f8bc6 AF |
7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | |
f36f8bc6 AF |
9 | CONFIG_ENV_SIZE=0x1000 |
10 | CONFIG_ENV_OFFSET=0x400000 | |
f36f8bc6 | 11 | CONFIG_DM_GPIO=y |
2bba7807 | 12 | CONFIG_DEFAULT_DEVICE_TREE="imx8mm-beacon-kit" |
c5a6e9f8 | 13 | CONFIG_SPL_TEXT_BASE=0x7E1000 |
f36f8bc6 | 14 | CONFIG_TARGET_IMX8MM_BEACON=y |
103c5f18 | 15 | CONFIG_SPL_MMC=y |
2a736066 | 16 | CONFIG_SPL_SERIAL=y |
9ca00684 | 17 | CONFIG_SPL_DRIVERS_MISC=y |
f36f8bc6 | 18 | CONFIG_SPL=y |
f4b2786b | 19 | CONFIG_LTO=y |
49c8ef0e | 20 | CONFIG_SYS_LOAD_ADDR=0x40480000 |
f36f8bc6 AF |
21 | CONFIG_FIT=y |
22 | CONFIG_FIT_EXTERNAL_OFFSET=0x3000 | |
23 | CONFIG_SPL_LOAD_FIT=y | |
24 | CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" | |
25 | CONFIG_OF_SYSTEM_SETUP=y | |
970bf860 TR |
26 | CONFIG_USE_BOOTCOMMAND=y |
27 | CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; fi;" | |
f36f8bc6 AF |
28 | CONFIG_DEFAULT_FDT_FILE="imx8mm-beacon-kit.dtb" |
29 | CONFIG_SPL_BOARD_INIT=y | |
30 | CONFIG_SPL_SEPARATE_BSS=y | |
f76750d1 TR |
31 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y |
32 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 | |
975e7cf3 | 33 | CONFIG_SPL_I2C=y |
933b2f09 | 34 | CONFIG_SPL_POWER=y |
078111b9 | 35 | CONFIG_SPL_WATCHDOG=y |
f36f8bc6 AF |
36 | CONFIG_HUSH_PARSER=y |
37 | CONFIG_SYS_PROMPT="u-boot=> " | |
38 | # CONFIG_CMD_EXPORTENV is not set | |
39 | # CONFIG_CMD_IMPORTENV is not set | |
40 | # CONFIG_CMD_CRC32 is not set | |
41 | CONFIG_CMD_CLK=y | |
42 | CONFIG_CMD_FUSE=y | |
43 | CONFIG_CMD_GPIO=y | |
44 | CONFIG_CMD_I2C=y | |
45 | CONFIG_CMD_MMC=y | |
46 | CONFIG_CMD_PART=y | |
415bb865 | 47 | CONFIG_CMD_SPI=y |
f36f8bc6 AF |
48 | CONFIG_CMD_DHCP=y |
49 | CONFIG_CMD_MII=y | |
50 | CONFIG_CMD_PING=y | |
51 | CONFIG_CMD_CACHE=y | |
52 | CONFIG_CMD_PMIC=y | |
53 | CONFIG_CMD_REGULATOR=y | |
54 | CONFIG_CMD_EXT2=y | |
55 | CONFIG_CMD_EXT4=y | |
56 | CONFIG_CMD_EXT4_WRITE=y | |
57 | CONFIG_CMD_FAT=y | |
58 | CONFIG_OF_CONTROL=y | |
59 | CONFIG_SPL_OF_CONTROL=y | |
e91907a1 | 60 | CONFIG_ENV_OVERWRITE=y |
f36f8bc6 AF |
61 | CONFIG_ENV_IS_IN_MMC=y |
62 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y | |
7d080773 | 63 | CONFIG_SYS_MMC_ENV_DEV=1 |
f36f8bc6 AF |
64 | CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y |
65 | CONFIG_NET_RANDOM_ETHADDR=y | |
66 | CONFIG_SPL_DM=y | |
67 | CONFIG_SPL_CLK_COMPOSITE_CCF=y | |
68 | CONFIG_CLK_COMPOSITE_CCF=y | |
69 | CONFIG_SPL_CLK_IMX8MM=y | |
70 | CONFIG_CLK_IMX8MM=y | |
71 | CONFIG_MXC_GPIO=y | |
72 | CONFIG_DM_PCA953X=y | |
73 | CONFIG_DM_I2C=y | |
f36f8bc6 | 74 | CONFIG_SUPPORT_EMMC_BOOT=y |
1a5d9c84 AF |
75 | CONFIG_MMC_IO_VOLTAGE=y |
76 | CONFIG_SPL_MMC_IO_VOLTAGE=y | |
77 | CONFIG_MMC_UHS_SUPPORT=y | |
78 | CONFIG_SPL_MMC_UHS_SUPPORT=y | |
79 | CONFIG_MMC_HS400_ES_SUPPORT=y | |
80 | CONFIG_MMC_HS400_SUPPORT=y | |
81 | CONFIG_SPL_MMC_HS400_SUPPORT=y | |
f36f8bc6 | 82 | CONFIG_FSL_USDHC=y |
415bb865 AF |
83 | CONFIG_MTD=y |
84 | CONFIG_DM_MTD=y | |
85 | CONFIG_DM_SPI_FLASH=y | |
415bb865 AF |
86 | CONFIG_SF_DEFAULT_SPEED=10000000 |
87 | CONFIG_SPI_FLASH_BAR=y | |
88 | CONFIG_SPI_FLASH_STMICRO=y | |
89 | CONFIG_SPI_FLASH_MTD=y | |
f36f8bc6 AF |
90 | CONFIG_PHYLIB=y |
91 | CONFIG_PHY_ATHEROS=y | |
92 | CONFIG_DM_ETH=y | |
93 | CONFIG_PHY_GIGE=y | |
94 | CONFIG_FEC_MXC=y | |
95 | CONFIG_MII=y | |
96 | CONFIG_PINCTRL=y | |
97 | CONFIG_SPL_PINCTRL=y | |
98 | CONFIG_PINCTRL_IMX8M=y | |
99 | CONFIG_DM_PMIC=y | |
100 | CONFIG_DM_PMIC_BD71837=y | |
101 | CONFIG_SPL_DM_PMIC_BD71837=y | |
102 | CONFIG_DM_REGULATOR=y | |
103 | CONFIG_SPL_DM_REGULATOR=y | |
104 | CONFIG_DM_REGULATOR_BD71837=y | |
105 | CONFIG_SPL_DM_REGULATOR_BD71837=y | |
106 | CONFIG_DM_REGULATOR_FIXED=y | |
018f7eaf | 107 | CONFIG_SPL_DM_REGULATOR_FIXED=y |
f36f8bc6 AF |
108 | CONFIG_DM_REGULATOR_GPIO=y |
109 | CONFIG_CONS_INDEX=2 | |
110 | CONFIG_DM_SERIAL=y | |
111 | # CONFIG_SPL_DM_SERIAL is not set | |
112 | CONFIG_MXC_UART=y | |
113 | CONFIG_SPI=y | |
114 | CONFIG_DM_SPI=y | |
f36f8bc6 AF |
115 | CONFIG_NXP_FSPI=y |
116 | CONFIG_SYSRESET=y | |
117 | CONFIG_SPL_SYSRESET=y | |
118 | CONFIG_SYSRESET_PSCI=y | |
119 | CONFIG_SYSRESET_WATCHDOG=y | |
120 | CONFIG_DM_THERMAL=y | |
f36f8bc6 | 121 | CONFIG_IMX_WATCHDOG=y |