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fe8c2806 | 1 | /* |
4707fb50 | 2 | * (C) Copyright 2000-2006 |
fe8c2806 WD |
3 | * Wolfgang Denk, DENX Software Engineering, [email protected]. |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #include <common.h> | |
25 | #include <watchdog.h> | |
26 | #include <command.h> | |
27 | #include <malloc.h> | |
28 | #include <devices.h> | |
fe8c2806 WD |
29 | #ifdef CONFIG_8xx |
30 | #include <mpc8xx.h> | |
31 | #endif | |
0db5bca8 WD |
32 | #ifdef CONFIG_5xx |
33 | #include <mpc5xx.h> | |
34 | #endif | |
cbd8a35c | 35 | #ifdef CONFIG_MPC5xxx |
945af8d7 WD |
36 | #include <mpc5xxx.h> |
37 | #endif | |
7def6b34 | 38 | #if defined(CONFIG_CMD_IDE) |
fe8c2806 WD |
39 | #include <ide.h> |
40 | #endif | |
7def6b34 | 41 | #if defined(CONFIG_CMD_SCSI) |
fe8c2806 WD |
42 | #include <scsi.h> |
43 | #endif | |
7def6b34 | 44 | #if defined(CONFIG_CMD_KGDB) |
fe8c2806 WD |
45 | #include <kgdb.h> |
46 | #endif | |
47 | #ifdef CONFIG_STATUS_LED | |
48 | #include <status_led.h> | |
49 | #endif | |
50 | #include <net.h> | |
272cc70b AF |
51 | #ifdef CONFIG_GENERIC_MMC |
52 | #include <mmc.h> | |
53 | #endif | |
281e00a3 | 54 | #include <serial.h> |
6d0f6bcf | 55 | #ifdef CONFIG_SYS_ALLOC_DPRAM |
9c4c5ae3 | 56 | #if !defined(CONFIG_CPM2) |
fe8c2806 WD |
57 | #include <commproc.h> |
58 | #endif | |
7aa78614 | 59 | #endif |
fe8c2806 WD |
60 | #include <version.h> |
61 | #if defined(CONFIG_BAB7xx) | |
62 | #include <w83c553f.h> | |
63 | #endif | |
64 | #include <dtt.h> | |
65 | #if defined(CONFIG_POST) | |
66 | #include <post.h> | |
67 | #endif | |
56f94be3 WD |
68 | #if defined(CONFIG_LOGBUFFER) |
69 | #include <logbuff.h> | |
70 | #endif | |
6d0f6bcf | 71 | #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500) |
42d1f039 WD |
72 | #include <asm/cache.h> |
73 | #endif | |
1c43771b WD |
74 | #ifdef CONFIG_PS2KBD |
75 | #include <keyboard.h> | |
76 | #endif | |
fe8c2806 | 77 | |
ecf5b98c KG |
78 | #ifdef CONFIG_ADDR_MAP |
79 | #include <asm/mmu.h> | |
80 | #endif | |
81 | ||
fc39c2fd KG |
82 | #ifdef CONFIG_MP |
83 | #include <asm/mp.h> | |
84 | #endif | |
85 | ||
6d0f6bcf | 86 | #ifdef CONFIG_SYS_UPDATE_FLASH_SIZE |
fa230445 HS |
87 | extern int update_flash_size (int flash_size); |
88 | #endif | |
89 | ||
9045f33c | 90 | #if defined(CONFIG_SC3) |
ca43ba18 HS |
91 | extern void sc3_read_eeprom(void); |
92 | #endif | |
93 | ||
7def6b34 | 94 | #if defined(CONFIG_CMD_DOC) |
fe8c2806 WD |
95 | void doc_init (void); |
96 | #endif | |
97 | #if defined(CONFIG_HARD_I2C) || \ | |
98 | defined(CONFIG_SOFT_I2C) | |
99 | #include <i2c.h> | |
100 | #endif | |
04a9e118 | 101 | #include <spi.h> |
d6ac2ed8 | 102 | #include <nand.h> |
fe8c2806 WD |
103 | |
104 | static char *failed = "*** failed ***\n"; | |
105 | ||
17d704eb | 106 | #if defined(CONFIG_OXC) || defined(CONFIG_PCU_E) || defined(CONFIG_RMU) |
fe8c2806 | 107 | extern flash_info_t flash_info[]; |
17d704eb | 108 | #endif |
fe8c2806 | 109 | |
ca43ba18 HS |
110 | #if defined(CONFIG_START_IDE) |
111 | extern int board_start_ide(void); | |
112 | #endif | |
fe8c2806 | 113 | #include <environment.h> |
d87080b7 | 114 | |
bce84c4d | 115 | DECLARE_GLOBAL_DATA_PTR; |
fe8c2806 | 116 | |
0e8d1586 | 117 | #if defined(CONFIG_ENV_IS_EMBEDDED) |
6d0f6bcf JCPV |
118 | #define TOTAL_MALLOC_LEN CONFIG_SYS_MALLOC_LEN |
119 | #elif ( ((CONFIG_ENV_ADDR+CONFIG_ENV_SIZE) < CONFIG_SYS_MONITOR_BASE) || \ | |
120 | (CONFIG_ENV_ADDR >= (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)) ) || \ | |
9314cee6 | 121 | defined(CONFIG_ENV_IS_IN_NVRAM) |
6d0f6bcf | 122 | #define TOTAL_MALLOC_LEN (CONFIG_SYS_MALLOC_LEN + CONFIG_ENV_SIZE) |
fe8c2806 | 123 | #else |
6d0f6bcf | 124 | #define TOTAL_MALLOC_LEN CONFIG_SYS_MALLOC_LEN |
fe8c2806 WD |
125 | #endif |
126 | ||
6d0f6bcf JCPV |
127 | #if !defined(CONFIG_SYS_MEM_TOP_HIDE) |
128 | #define CONFIG_SYS_MEM_TOP_HIDE 0 | |
6fb4b640 SR |
129 | #endif |
130 | ||
3b57fe0a WD |
131 | extern ulong __init_end; |
132 | extern ulong _end; | |
3b57fe0a WD |
133 | ulong monitor_flash_len; |
134 | ||
7def6b34 | 135 | #if defined(CONFIG_CMD_BEDBUG) |
8bde7f77 WD |
136 | #include <bedbug/type.h> |
137 | #endif | |
138 | ||
fe8c2806 WD |
139 | /* |
140 | * Begin and End of memory area for malloc(), and current "brk" | |
141 | */ | |
142 | static ulong mem_malloc_start = 0; | |
143 | static ulong mem_malloc_end = 0; | |
144 | static ulong mem_malloc_brk = 0; | |
145 | ||
146 | /************************************************************************ | |
147 | * Utilities * | |
148 | ************************************************************************ | |
149 | */ | |
150 | ||
151 | /* | |
152 | * The Malloc area is immediately below the monitor copy in DRAM | |
153 | */ | |
154 | static void mem_malloc_init (void) | |
155 | { | |
e9514751 | 156 | #if !defined(CONFIG_RELOC_FIXUP_WORKS) |
6d0f6bcf | 157 | mem_malloc_end = CONFIG_SYS_MONITOR_BASE + gd->reloc_off; |
e9514751 SR |
158 | #endif |
159 | mem_malloc_start = mem_malloc_end - TOTAL_MALLOC_LEN; | |
fe8c2806 WD |
160 | mem_malloc_brk = mem_malloc_start; |
161 | ||
162 | memset ((void *) mem_malloc_start, | |
163 | 0, | |
164 | mem_malloc_end - mem_malloc_start); | |
165 | } | |
166 | ||
167 | void *sbrk (ptrdiff_t increment) | |
168 | { | |
169 | ulong old = mem_malloc_brk; | |
170 | ulong new = old + increment; | |
171 | ||
172 | if ((new < mem_malloc_start) || (new > mem_malloc_end)) { | |
173 | return (NULL); | |
174 | } | |
175 | mem_malloc_brk = new; | |
176 | return ((void *) old); | |
177 | } | |
178 | ||
fe8c2806 WD |
179 | /* |
180 | * All attempts to come up with a "common" initialization sequence | |
181 | * that works for all boards and architectures failed: some of the | |
182 | * requirements are just _too_ different. To get rid of the resulting | |
183 | * mess of board dependend #ifdef'ed code we now make the whole | |
184 | * initialization sequence configurable to the user. | |
185 | * | |
186 | * The requirements for any new initalization function is simple: it | |
187 | * receives a pointer to the "global data" structure as it's only | |
188 | * argument, and returns an integer return code, where 0 means | |
189 | * "continue" and != 0 means "fatal error, hang the system". | |
190 | */ | |
191 | typedef int (init_fnc_t) (void); | |
192 | ||
193 | /************************************************************************ | |
194 | * Init Utilities * | |
195 | ************************************************************************ | |
196 | * Some of this code should be moved into the core functions, | |
197 | * but let's get it working (again) first... | |
198 | */ | |
199 | ||
200 | static int init_baudrate (void) | |
201 | { | |
77ddac94 | 202 | char tmp[64]; /* long enough for environment variables */ |
fe8c2806 WD |
203 | int i = getenv_r ("baudrate", tmp, sizeof (tmp)); |
204 | ||
205 | gd->baudrate = (i > 0) | |
206 | ? (int) simple_strtoul (tmp, NULL, 10) | |
207 | : CONFIG_BAUDRATE; | |
fe8c2806 WD |
208 | return (0); |
209 | } | |
210 | ||
211 | /***********************************************************************/ | |
212 | ||
79f240f7 KP |
213 | void __board_add_ram_info(int use_default) |
214 | { | |
215 | /* please define platform specific board_add_ram_info() */ | |
216 | } | |
217 | void board_add_ram_info(int) __attribute__((weak, alias("__board_add_ram_info"))); | |
218 | ||
d96f41e0 | 219 | |
fe8c2806 WD |
220 | static int init_func_ram (void) |
221 | { | |
fe8c2806 WD |
222 | #ifdef CONFIG_BOARD_TYPES |
223 | int board_type = gd->board_type; | |
224 | #else | |
225 | int board_type = 0; /* use dummy arg */ | |
226 | #endif | |
227 | puts ("DRAM: "); | |
228 | ||
229 | if ((gd->ram_size = initdram (board_type)) > 0) { | |
d96f41e0 | 230 | print_size (gd->ram_size, ""); |
d96f41e0 | 231 | board_add_ram_info(0); |
d96f41e0 | 232 | putc('\n'); |
fe8c2806 WD |
233 | return (0); |
234 | } | |
235 | puts (failed); | |
236 | return (1); | |
237 | } | |
238 | ||
239 | /***********************************************************************/ | |
240 | ||
241 | #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) | |
242 | static int init_func_i2c (void) | |
243 | { | |
244 | puts ("I2C: "); | |
6d0f6bcf | 245 | i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); |
fe8c2806 WD |
246 | puts ("ready\n"); |
247 | return (0); | |
248 | } | |
249 | #endif | |
250 | ||
04a9e118 BW |
251 | #if defined(CONFIG_HARD_SPI) |
252 | static int init_func_spi (void) | |
253 | { | |
254 | puts ("SPI: "); | |
255 | spi_init (); | |
256 | puts ("ready\n"); | |
257 | return (0); | |
258 | } | |
259 | #endif | |
260 | ||
fe8c2806 WD |
261 | /***********************************************************************/ |
262 | ||
263 | #if defined(CONFIG_WATCHDOG) | |
264 | static int init_func_watchdog_init (void) | |
265 | { | |
266 | puts (" Watchdog enabled\n"); | |
267 | WATCHDOG_RESET (); | |
268 | return (0); | |
269 | } | |
270 | # define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init, | |
271 | ||
272 | static int init_func_watchdog_reset (void) | |
273 | { | |
274 | WATCHDOG_RESET (); | |
275 | return (0); | |
276 | } | |
277 | # define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset, | |
278 | #else | |
279 | # define INIT_FUNC_WATCHDOG_INIT /* undef */ | |
280 | # define INIT_FUNC_WATCHDOG_RESET /* undef */ | |
281 | #endif /* CONFIG_WATCHDOG */ | |
282 | ||
283 | /************************************************************************ | |
284 | * Initialization sequence * | |
285 | ************************************************************************ | |
286 | */ | |
287 | ||
288 | init_fnc_t *init_sequence[] = { | |
289 | ||
c837dcb1 WD |
290 | #if defined(CONFIG_BOARD_EARLY_INIT_F) |
291 | board_early_init_f, | |
fe8c2806 | 292 | #endif |
c178d3da | 293 | |
66ca92a5 | 294 | #if !defined(CONFIG_8xx_CPUCLK_DEFAULT) |
fe8c2806 | 295 | get_clocks, /* get CPU and bus clocks (etc.) */ |
090eb735 MK |
296 | #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ |
297 | && !defined(CONFIG_TQM885D) | |
e9132ea9 WD |
298 | adjust_sdram_tbs_8xx, |
299 | #endif | |
fe8c2806 | 300 | init_timebase, |
c178d3da | 301 | #endif |
6d0f6bcf | 302 | #ifdef CONFIG_SYS_ALLOC_DPRAM |
9c4c5ae3 | 303 | #if !defined(CONFIG_CPM2) |
fe8c2806 WD |
304 | dpram_init, |
305 | #endif | |
7aa78614 | 306 | #endif |
fe8c2806 WD |
307 | #if defined(CONFIG_BOARD_POSTCLK_INIT) |
308 | board_postclk_init, | |
309 | #endif | |
310 | env_init, | |
66ca92a5 | 311 | #if defined(CONFIG_8xx_CPUCLK_DEFAULT) |
c178d3da WD |
312 | get_clocks_866, /* get CPU and bus clocks according to the environment variable */ |
313 | sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */ | |
314 | init_timebase, | |
315 | #endif | |
fe8c2806 WD |
316 | init_baudrate, |
317 | serial_init, | |
318 | console_init_f, | |
319 | display_options, | |
320 | #if defined(CONFIG_8260) | |
321 | prt_8260_rsr, | |
322 | prt_8260_clks, | |
323 | #endif /* CONFIG_8260 */ | |
0f898604 | 324 | #if defined(CONFIG_MPC83xx) |
9be39a67 DL |
325 | prt_83xx_rsr, |
326 | #endif | |
fe8c2806 | 327 | checkcpu, |
cbd8a35c | 328 | #if defined(CONFIG_MPC5xxx) |
945af8d7 | 329 | prt_mpc5xxx_clks, |
cbd8a35c | 330 | #endif /* CONFIG_MPC5xxx */ |
983fda83 WD |
331 | #if defined(CONFIG_MPC8220) |
332 | prt_mpc8220_clks, | |
333 | #endif | |
fe8c2806 WD |
334 | checkboard, |
335 | INIT_FUNC_WATCHDOG_INIT | |
c837dcb1 | 336 | #if defined(CONFIG_MISC_INIT_F) |
fe8c2806 WD |
337 | misc_init_f, |
338 | #endif | |
339 | INIT_FUNC_WATCHDOG_RESET | |
340 | #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) | |
341 | init_func_i2c, | |
342 | #endif | |
04a9e118 BW |
343 | #if defined(CONFIG_HARD_SPI) |
344 | init_func_spi, | |
345 | #endif | |
4532cb69 WD |
346 | #ifdef CONFIG_POST |
347 | post_init_f, | |
fe8c2806 WD |
348 | #endif |
349 | INIT_FUNC_WATCHDOG_RESET | |
350 | init_func_ram, | |
6d0f6bcf | 351 | #if defined(CONFIG_SYS_DRAM_TEST) |
fe8c2806 | 352 | testdram, |
6d0f6bcf | 353 | #endif /* CONFIG_SYS_DRAM_TEST */ |
fe8c2806 WD |
354 | INIT_FUNC_WATCHDOG_RESET |
355 | ||
356 | NULL, /* Terminate this list */ | |
357 | }; | |
358 | ||
81d93e5c KG |
359 | ulong get_effective_memsize(void) |
360 | { | |
361 | #ifndef CONFIG_VERY_BIG_RAM | |
362 | return gd->ram_size; | |
363 | #else | |
364 | /* limit stack to what we can reasonable map */ | |
365 | return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ? | |
366 | CONFIG_MAX_MEM_MAPPED : gd->ram_size); | |
367 | #endif | |
368 | } | |
369 | ||
fe8c2806 WD |
370 | /************************************************************************ |
371 | * | |
372 | * This is the first part of the initialization sequence that is | |
373 | * implemented in C, but still running from ROM. | |
374 | * | |
375 | * The main purpose is to provide a (serial) console interface as | |
376 | * soon as possible (so we can see any error messages), and to | |
377 | * initialize the RAM so that we can relocate the monitor code to | |
378 | * RAM. | |
379 | * | |
380 | * Be aware of the restrictions: global data is read-only, BSS is not | |
381 | * initialized, and stack space is limited to a few kB. | |
382 | * | |
383 | ************************************************************************ | |
384 | */ | |
385 | ||
95d449ad MB |
386 | #ifdef CONFIG_LOGBUFFER |
387 | unsigned long logbuffer_base(void) | |
388 | { | |
6d0f6bcf | 389 | return CONFIG_SYS_SDRAM_BASE + get_effective_memsize() - LOGBUFF_LEN; |
95d449ad MB |
390 | } |
391 | #endif | |
392 | ||
fe8c2806 WD |
393 | void board_init_f (ulong bootflag) |
394 | { | |
fe8c2806 WD |
395 | bd_t *bd; |
396 | ulong len, addr, addr_sp; | |
7bc5ee07 | 397 | ulong *s; |
fe8c2806 WD |
398 | gd_t *id; |
399 | init_fnc_t **init_fnc_ptr; | |
400 | #ifdef CONFIG_PRAM | |
401 | int i; | |
402 | ulong reg; | |
403 | uchar tmp[64]; /* long enough for environment variables */ | |
404 | #endif | |
405 | ||
406 | /* Pointer is writable since we allocated a register for it */ | |
6d0f6bcf | 407 | gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); |
93f6a677 WD |
408 | /* compiler optimization barrier needed for GCC >= 3.4 */ |
409 | __asm__ __volatile__("": : :"memory"); | |
fe8c2806 | 410 | |
0f898604 | 411 | #if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC83xx) && \ |
f060054d | 412 | !defined(CONFIG_MPC85xx) && !defined(CONFIG_MPC86xx) |
fe8c2806 WD |
413 | /* Clear initial global data */ |
414 | memset ((void *) gd, 0, sizeof (gd_t)); | |
415 | #endif | |
416 | ||
417 | for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { | |
418 | if ((*init_fnc_ptr) () != 0) { | |
419 | hang (); | |
420 | } | |
421 | } | |
422 | ||
423 | /* | |
424 | * Now that we have DRAM mapped and working, we can | |
425 | * relocate the code and continue running from DRAM. | |
426 | * | |
427 | * Reserve memory at end of RAM for (top down in that order): | |
14f73ca6 | 428 | * - area that won't get touched by U-Boot and Linux (optional) |
8bde7f77 | 429 | * - kernel log buffer |
fe8c2806 WD |
430 | * - protected RAM |
431 | * - LCD framebuffer | |
432 | * - monitor code | |
433 | * - board info struct | |
434 | */ | |
6d0f6bcf | 435 | len = (ulong)&_end - CONFIG_SYS_MONITOR_BASE; |
fe8c2806 | 436 | |
14f73ca6 SR |
437 | /* |
438 | * Subtract specified amount of memory to hide so that it won't | |
439 | * get "touched" at all by U-Boot. By fixing up gd->ram_size | |
440 | * the Linux kernel should now get passed the now "corrected" | |
441 | * memory size and won't touch it either. This should work | |
442 | * for arch/ppc and arch/powerpc. Only Linux board ports in | |
443 | * arch/powerpc with bootwrapper support, that recalculate the | |
444 | * memory size from the SDRAM controller setup will have to | |
445 | * get fixed. | |
446 | */ | |
6d0f6bcf | 447 | gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE; |
14f73ca6 | 448 | |
6d0f6bcf | 449 | addr = CONFIG_SYS_SDRAM_BASE + get_effective_memsize(); |
fe8c2806 | 450 | |
fc39c2fd KG |
451 | #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) |
452 | /* | |
453 | * We need to make sure the location we intend to put secondary core | |
454 | * boot code is reserved and not used by any part of u-boot | |
c0a14aed | 455 | */ |
fc39c2fd KG |
456 | if (addr > determine_mp_bootpg()) { |
457 | addr = determine_mp_bootpg(); | |
458 | debug ("Reserving MP boot page to %08lx\n", addr); | |
459 | } | |
460 | #endif | |
461 | ||
228f29ac | 462 | #ifdef CONFIG_LOGBUFFER |
3d610186 | 463 | #ifndef CONFIG_ALT_LB_ADDR |
228f29ac WD |
464 | /* reserve kernel log buffer */ |
465 | addr -= (LOGBUFF_RESERVE); | |
9d2b18a0 | 466 | debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr); |
228f29ac | 467 | #endif |
3d610186 | 468 | #endif |
228f29ac | 469 | |
fe8c2806 WD |
470 | #ifdef CONFIG_PRAM |
471 | /* | |
472 | * reserve protected RAM | |
473 | */ | |
77ddac94 WD |
474 | i = getenv_r ("pram", (char *)tmp, sizeof (tmp)); |
475 | reg = (i > 0) ? simple_strtoul ((const char *)tmp, NULL, 10) : CONFIG_PRAM; | |
fe8c2806 | 476 | addr -= (reg << 10); /* size is in kB */ |
9d2b18a0 | 477 | debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr); |
fe8c2806 WD |
478 | #endif /* CONFIG_PRAM */ |
479 | ||
480 | /* round down to next 4 kB limit */ | |
481 | addr &= ~(4096 - 1); | |
9d2b18a0 | 482 | debug ("Top of RAM usable for U-Boot at: %08lx\n", addr); |
fe8c2806 WD |
483 | |
484 | #ifdef CONFIG_LCD | |
485 | /* reserve memory for LCD display (always full pages) */ | |
486 | addr = lcd_setmem (addr); | |
487 | gd->fb_base = addr; | |
488 | #endif /* CONFIG_LCD */ | |
489 | ||
490 | #if defined(CONFIG_VIDEO) && defined(CONFIG_8xx) | |
491 | /* reserve memory for video display (always full pages) */ | |
492 | addr = video_setmem (addr); | |
493 | gd->fb_base = addr; | |
494 | #endif /* CONFIG_VIDEO */ | |
495 | ||
496 | /* | |
497 | * reserve memory for U-Boot code, data & bss | |
682011ff | 498 | * round down to next 4 kB limit |
fe8c2806 WD |
499 | */ |
500 | addr -= len; | |
682011ff | 501 | addr &= ~(4096 - 1); |
7d314992 WD |
502 | #ifdef CONFIG_E500 |
503 | /* round down to next 64 kB limit so that IVPR stays aligned */ | |
504 | addr &= ~(65536 - 1); | |
505 | #endif | |
fe8c2806 | 506 | |
9d2b18a0 | 507 | debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr); |
fe8c2806 | 508 | |
c7de829c WD |
509 | #ifdef CONFIG_AMIGAONEG3SE |
510 | gd->relocaddr = addr; | |
511 | #endif | |
512 | ||
fe8c2806 WD |
513 | /* |
514 | * reserve memory for malloc() arena | |
515 | */ | |
516 | addr_sp = addr - TOTAL_MALLOC_LEN; | |
9d2b18a0 | 517 | debug ("Reserving %dk for malloc() at: %08lx\n", |
fe8c2806 | 518 | TOTAL_MALLOC_LEN >> 10, addr_sp); |
fe8c2806 WD |
519 | |
520 | /* | |
521 | * (permanently) allocate a Board Info struct | |
522 | * and a permanent copy of the "global" data | |
523 | */ | |
524 | addr_sp -= sizeof (bd_t); | |
525 | bd = (bd_t *) addr_sp; | |
526 | gd->bd = bd; | |
b64f190b | 527 | debug ("Reserving %zu Bytes for Board Info at: %08lx\n", |
fe8c2806 | 528 | sizeof (bd_t), addr_sp); |
fe8c2806 WD |
529 | addr_sp -= sizeof (gd_t); |
530 | id = (gd_t *) addr_sp; | |
b64f190b | 531 | debug ("Reserving %zu Bytes for Global Data at: %08lx\n", |
fe8c2806 | 532 | sizeof (gd_t), addr_sp); |
fe8c2806 WD |
533 | |
534 | /* | |
535 | * Finally, we set up a new (bigger) stack. | |
536 | * | |
537 | * Leave some safety gap for SP, force alignment on 16 byte boundary | |
538 | * Clear initial stack frame | |
539 | */ | |
540 | addr_sp -= 16; | |
541 | addr_sp &= ~0xF; | |
7bc5ee07 WD |
542 | s = (ulong *)addr_sp; |
543 | *s-- = 0; | |
544 | *s-- = 0; | |
545 | addr_sp = (ulong)s; | |
9d2b18a0 | 546 | debug ("Stack Pointer at: %08lx\n", addr_sp); |
fe8c2806 WD |
547 | |
548 | /* | |
549 | * Save local variables to board info struct | |
550 | */ | |
551 | ||
6d0f6bcf | 552 | bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of DRAM memory */ |
fe8c2806 WD |
553 | bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */ |
554 | ||
555 | #ifdef CONFIG_IP860 | |
c837dcb1 WD |
556 | bd->bi_sramstart = SRAM_BASE; /* start of SRAM memory */ |
557 | bd->bi_sramsize = SRAM_SIZE; /* size of SRAM memory */ | |
983fda83 | 558 | #elif defined CONFIG_MPC8220 |
6d0f6bcf JCPV |
559 | bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM memory */ |
560 | bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM memory */ | |
fe8c2806 | 561 | #else |
c837dcb1 WD |
562 | bd->bi_sramstart = 0; /* FIXME */ /* start of SRAM memory */ |
563 | bd->bi_sramsize = 0; /* FIXME */ /* size of SRAM memory */ | |
fe8c2806 WD |
564 | #endif |
565 | ||
42d1f039 | 566 | #if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \ |
debb7354 | 567 | defined(CONFIG_E500) || defined(CONFIG_MPC86xx) |
6d0f6bcf | 568 | bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ |
fe8c2806 | 569 | #endif |
cbd8a35c | 570 | #if defined(CONFIG_MPC5xxx) |
6d0f6bcf | 571 | bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ |
945af8d7 | 572 | #endif |
0f898604 | 573 | #if defined(CONFIG_MPC83xx) |
6d0f6bcf | 574 | bd->bi_immrbar = CONFIG_SYS_IMMR; |
f046ccd1 | 575 | #endif |
983fda83 | 576 | #if defined(CONFIG_MPC8220) |
6d0f6bcf | 577 | bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ |
983fda83 WD |
578 | bd->bi_inpfreq = gd->inp_clk; |
579 | bd->bi_pcifreq = gd->pci_clk; | |
580 | bd->bi_vcofreq = gd->vco_clk; | |
581 | bd->bi_pevfreq = gd->pev_clk; | |
582 | bd->bi_flbfreq = gd->flb_clk; | |
583 | ||
dd520bf3 WD |
584 | /* store bootparam to sram (backward compatible), here? */ |
585 | { | |
6d0f6bcf | 586 | u32 *sram = (u32 *)CONFIG_SYS_SRAM_BASE; |
dd520bf3 WD |
587 | *sram++ = gd->ram_size; |
588 | *sram++ = gd->bus_clk; | |
589 | *sram++ = gd->inp_clk; | |
590 | *sram++ = gd->cpu_clk; | |
591 | *sram++ = gd->vco_clk; | |
592 | *sram++ = gd->flb_clk; | |
593 | *sram++ = 0xb8c3ba11; /* boot signature */ | |
594 | } | |
983fda83 | 595 | #endif |
fe8c2806 WD |
596 | |
597 | bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */ | |
598 | ||
599 | WATCHDOG_RESET (); | |
600 | bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ | |
601 | bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ | |
9c4c5ae3 | 602 | #if defined(CONFIG_CPM2) |
fe8c2806 WD |
603 | bd->bi_cpmfreq = gd->cpm_clk; |
604 | bd->bi_brgfreq = gd->brg_clk; | |
605 | bd->bi_sccfreq = gd->scc_clk; | |
606 | bd->bi_vco = gd->vco_out; | |
9c4c5ae3 | 607 | #endif /* CONFIG_CPM2 */ |
281ff9a4 | 608 | #if defined(CONFIG_MPC512X) |
5d49e0e1 | 609 | bd->bi_ipsfreq = gd->ips_clk; |
281ff9a4 | 610 | #endif /* CONFIG_MPC512X */ |
cbd8a35c | 611 | #if defined(CONFIG_MPC5xxx) |
945af8d7 WD |
612 | bd->bi_ipbfreq = gd->ipb_clk; |
613 | bd->bi_pcifreq = gd->pci_clk; | |
cbd8a35c | 614 | #endif /* CONFIG_MPC5xxx */ |
fe8c2806 WD |
615 | bd->bi_baudrate = gd->baudrate; /* Console Baudrate */ |
616 | ||
6d0f6bcf | 617 | #ifdef CONFIG_SYS_EXTBDINFO |
77ddac94 WD |
618 | strncpy ((char *)bd->bi_s_version, "1.2", sizeof (bd->bi_s_version)); |
619 | strncpy ((char *)bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version)); | |
fe8c2806 WD |
620 | |
621 | bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */ | |
622 | bd->bi_plb_busfreq = gd->bus_clk; | |
343c48bd SR |
623 | #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \ |
624 | defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ | |
625 | defined(CONFIG_440EPX) || defined(CONFIG_440GRX) | |
fe8c2806 | 626 | bd->bi_pci_busfreq = get_PCI_freq (); |
109c0e3a | 627 | bd->bi_opbfreq = get_OPB_freq (); |
9fea65a6 | 628 | #elif defined(CONFIG_XILINX_405) |
028ab6b5 | 629 | bd->bi_pci_busfreq = get_PCI_freq (); |
fe8c2806 WD |
630 | #endif |
631 | #endif | |
632 | ||
9d2b18a0 | 633 | debug ("New Stack Pointer is: %08lx\n", addr_sp); |
fe8c2806 WD |
634 | |
635 | WATCHDOG_RESET (); | |
636 | ||
637 | #ifdef CONFIG_POST | |
638 | post_bootmode_init(); | |
6dff5529 | 639 | post_run (NULL, POST_ROM | post_bootmode_get(0)); |
fe8c2806 WD |
640 | #endif |
641 | ||
642 | WATCHDOG_RESET(); | |
643 | ||
27b207fd | 644 | memcpy (id, (void *)gd, sizeof (gd_t)); |
fe8c2806 WD |
645 | |
646 | relocate_code (addr_sp, id, addr); | |
647 | ||
648 | /* NOTREACHED - relocate_code() does not return */ | |
649 | } | |
650 | ||
fe8c2806 WD |
651 | /************************************************************************ |
652 | * | |
653 | * This is the next part if the initialization sequence: we are now | |
654 | * running from RAM and have a "normal" C environment, i. e. global | |
655 | * data can be written, BSS has been cleared, the stack size in not | |
656 | * that critical any more, etc. | |
657 | * | |
658 | ************************************************************************ | |
659 | */ | |
fe8c2806 WD |
660 | void board_init_r (gd_t *id, ulong dest_addr) |
661 | { | |
fe8c2806 | 662 | cmd_tbl_t *cmdtp; |
ff7dc067 | 663 | char *s; |
fe8c2806 | 664 | bd_t *bd; |
fe8c2806 | 665 | extern void malloc_bin_reloc (void); |
93f6d725 | 666 | #ifndef CONFIG_ENV_IS_NOWHERE |
fe8c2806 WD |
667 | extern char * env_name_spec; |
668 | #endif | |
669 | ||
6d0f6bcf | 670 | #ifndef CONFIG_SYS_NO_FLASH |
fe8c2806 WD |
671 | ulong flash_size; |
672 | #endif | |
673 | ||
674 | gd = id; /* initialize RAM version of global data */ | |
675 | bd = gd->bd; | |
676 | ||
677 | gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */ | |
f82b3b63 GL |
678 | |
679 | #if defined(CONFIG_RELOC_FIXUP_WORKS) | |
680 | gd->reloc_off = 0; | |
e9514751 | 681 | mem_malloc_end = dest_addr; |
f82b3b63 | 682 | #else |
6d0f6bcf | 683 | gd->reloc_off = dest_addr - CONFIG_SYS_MONITOR_BASE; |
f82b3b63 | 684 | #endif |
bb105f24 MB |
685 | |
686 | #ifdef CONFIG_SERIAL_MULTI | |
687 | serial_initialize(); | |
688 | #endif | |
fe8c2806 | 689 | |
9d2b18a0 | 690 | debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr); |
fe8c2806 WD |
691 | |
692 | WATCHDOG_RESET (); | |
693 | ||
d025aa4b BB |
694 | /* |
695 | * Setup trap handlers | |
696 | */ | |
697 | trap_init (dest_addr); | |
698 | ||
c9315e6b | 699 | #ifdef CONFIG_ADDR_MAP |
ecf5b98c KG |
700 | init_addr_map(); |
701 | #endif | |
702 | ||
c837dcb1 WD |
703 | #if defined(CONFIG_BOARD_EARLY_INIT_R) |
704 | board_early_init_r (); | |
705 | #endif | |
706 | ||
3b57fe0a | 707 | monitor_flash_len = (ulong)&__init_end - dest_addr; |
fe8c2806 WD |
708 | |
709 | /* | |
710 | * We have to relocate the command table manually | |
711 | */ | |
8bde7f77 | 712 | for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) { |
fe8c2806 | 713 | ulong addr; |
fe8c2806 WD |
714 | addr = (ulong) (cmdtp->cmd) + gd->reloc_off; |
715 | #if 0 | |
716 | printf ("Command \"%s\": 0x%08lx => 0x%08lx\n", | |
717 | cmdtp->name, (ulong) (cmdtp->cmd), addr); | |
718 | #endif | |
719 | cmdtp->cmd = | |
720 | (int (*)(struct cmd_tbl_s *, int, int, char *[]))addr; | |
721 | ||
722 | addr = (ulong)(cmdtp->name) + gd->reloc_off; | |
723 | cmdtp->name = (char *)addr; | |
724 | ||
725 | if (cmdtp->usage) { | |
726 | addr = (ulong)(cmdtp->usage) + gd->reloc_off; | |
727 | cmdtp->usage = (char *)addr; | |
728 | } | |
6d0f6bcf | 729 | #ifdef CONFIG_SYS_LONGHELP |
fe8c2806 WD |
730 | if (cmdtp->help) { |
731 | addr = (ulong)(cmdtp->help) + gd->reloc_off; | |
732 | cmdtp->help = (char *)addr; | |
733 | } | |
734 | #endif | |
735 | } | |
736 | /* there are some other pointer constants we must deal with */ | |
93f6d725 | 737 | #ifndef CONFIG_ENV_IS_NOWHERE |
fe8c2806 WD |
738 | env_name_spec += gd->reloc_off; |
739 | #endif | |
740 | ||
741 | WATCHDOG_RESET (); | |
742 | ||
56f94be3 | 743 | #ifdef CONFIG_LOGBUFFER |
228f29ac | 744 | logbuff_init_ptrs (); |
56f94be3 | 745 | #endif |
fe8c2806 | 746 | #ifdef CONFIG_POST |
228f29ac | 747 | post_output_backlog (); |
fe8c2806 WD |
748 | post_reloc (); |
749 | #endif | |
750 | ||
751 | WATCHDOG_RESET(); | |
752 | ||
0f898604 | 753 | #if defined(CONFIG_SYS_DELAYED_ICACHE) || defined(CONFIG_MPC83xx) |
fe8c2806 WD |
754 | icache_enable (); /* it's time to enable the instruction cache */ |
755 | #endif | |
756 | ||
6d0f6bcf | 757 | #if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500) |
c837dcb1 | 758 | unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */ |
42d1f039 WD |
759 | #endif |
760 | ||
3bac3513 | 761 | #if defined(CONFIG_BAB7xx) || defined(CONFIG_CPC45) |
fe8c2806 | 762 | /* |
3bac3513 WD |
763 | * Do PCI configuration on BAB7xx and CPC45 _before_ the flash |
764 | * gets initialised, because we need the ISA resp. PCI_to_LOCAL bus | |
765 | * bridge there. | |
fe8c2806 WD |
766 | */ |
767 | pci_init (); | |
3bac3513 WD |
768 | #endif |
769 | #if defined(CONFIG_BAB7xx) | |
fe8c2806 WD |
770 | /* |
771 | * Initialise the ISA bridge | |
772 | */ | |
773 | initialise_w83c553f (); | |
774 | #endif | |
775 | ||
776 | asm ("sync ; isync"); | |
777 | ||
c790b04d SR |
778 | /* initialize malloc() area */ |
779 | mem_malloc_init (); | |
780 | malloc_bin_reloc (); | |
781 | ||
6d0f6bcf | 782 | #if !defined(CONFIG_SYS_NO_FLASH) |
fe8c2806 WD |
783 | puts ("FLASH: "); |
784 | ||
785 | if ((flash_size = flash_init ()) > 0) { | |
6d0f6bcf | 786 | # ifdef CONFIG_SYS_FLASH_CHECKSUM |
fe8c2806 WD |
787 | print_size (flash_size, ""); |
788 | /* | |
789 | * Compute and print flash CRC if flashchecksum is set to 'y' | |
790 | * | |
791 | * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX | |
792 | */ | |
793 | s = getenv ("flashchecksum"); | |
794 | if (s && (*s == 'y')) { | |
06c53bea | 795 | printf (" CRC: %08X", |
6d0f6bcf | 796 | crc32 (0, (const unsigned char *) CONFIG_SYS_FLASH_BASE, flash_size) |
7e780369 | 797 | ); |
fe8c2806 WD |
798 | } |
799 | putc ('\n'); | |
6d0f6bcf | 800 | # else /* !CONFIG_SYS_FLASH_CHECKSUM */ |
fe8c2806 | 801 | print_size (flash_size, "\n"); |
6d0f6bcf | 802 | # endif /* CONFIG_SYS_FLASH_CHECKSUM */ |
fe8c2806 WD |
803 | } else { |
804 | puts (failed); | |
805 | hang (); | |
806 | } | |
807 | ||
6d0f6bcf | 808 | bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; /* update start of FLASH memory */ |
fe8c2806 | 809 | bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */ |
fa230445 | 810 | |
6d0f6bcf | 811 | #if defined(CONFIG_SYS_UPDATE_FLASH_SIZE) |
fa230445 HS |
812 | /* Make a update of the Memctrl. */ |
813 | update_flash_size (flash_size); | |
814 | #endif | |
815 | ||
816 | ||
7e780369 WD |
817 | # if defined(CONFIG_PCU_E) || defined(CONFIG_OXC) || defined(CONFIG_RMU) |
818 | /* flash mapped at end of memory map */ | |
819 | bd->bi_flashoffset = TEXT_BASE + flash_size; | |
6d0f6bcf | 820 | # elif CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE |
3b57fe0a | 821 | bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */ |
0cb61d7d | 822 | # else |
fe8c2806 | 823 | bd->bi_flashoffset = 0; |
0cb61d7d | 824 | # endif |
6d0f6bcf | 825 | #else /* CONFIG_SYS_NO_FLASH */ |
fe8c2806 WD |
826 | |
827 | bd->bi_flashsize = 0; | |
828 | bd->bi_flashstart = 0; | |
829 | bd->bi_flashoffset = 0; | |
6d0f6bcf | 830 | #endif /* !CONFIG_SYS_NO_FLASH */ |
fe8c2806 WD |
831 | |
832 | WATCHDOG_RESET (); | |
833 | ||
834 | /* initialize higher level parts of CPU like time base and timers */ | |
835 | cpu_init_r (); | |
836 | ||
837 | WATCHDOG_RESET (); | |
838 | ||
fe8c2806 | 839 | #ifdef CONFIG_SPI |
bb1f8b4f | 840 | # if !defined(CONFIG_ENV_IS_IN_EEPROM) |
fe8c2806 WD |
841 | spi_init_f (); |
842 | # endif | |
843 | spi_init_r (); | |
844 | #endif | |
845 | ||
7def6b34 | 846 | #if defined(CONFIG_CMD_NAND) |
887e2ec9 SR |
847 | WATCHDOG_RESET (); |
848 | puts ("NAND: "); | |
849 | nand_init(); /* go init the NAND */ | |
850 | #endif | |
851 | ||
fe8c2806 WD |
852 | /* relocate environment function pointers etc. */ |
853 | env_relocate (); | |
854 | ||
855 | /* | |
856 | * Fill in missing fields of bd_info. | |
8bde7f77 WD |
857 | * We do this here, where we have "normal" access to the |
858 | * environment; we used to do this still running from ROM, | |
859 | * where had to use getenv_r(), which can be pretty slow when | |
860 | * the environment is in EEPROM. | |
fe8c2806 | 861 | */ |
7abf0c58 | 862 | |
6d0f6bcf | 863 | #if defined(CONFIG_SYS_EXTBDINFO) |
7abf0c58 WD |
864 | #if defined(CONFIG_405GP) || defined(CONFIG_405EP) |
865 | #if defined(CONFIG_I2CFAST) | |
866 | /* | |
867 | * set bi_iic_fast for linux taking environment variable | |
868 | * "i2cfast" into account | |
869 | */ | |
870 | { | |
871 | char *s = getenv ("i2cfast"); | |
872 | if (s && ((*s == 'y') || (*s == 'Y'))) { | |
873 | bd->bi_iic_fast[0] = 1; | |
874 | bd->bi_iic_fast[1] = 1; | |
875 | } else { | |
876 | bd->bi_iic_fast[0] = 0; | |
877 | bd->bi_iic_fast[1] = 0; | |
878 | } | |
879 | } | |
880 | #else | |
881 | bd->bi_iic_fast[0] = 0; | |
882 | bd->bi_iic_fast[1] = 0; | |
883 | #endif /* CONFIG_I2CFAST */ | |
884 | #endif /* CONFIG_405GP, CONFIG_405EP */ | |
6d0f6bcf | 885 | #endif /* CONFIG_SYS_EXTBDINFO */ |
7abf0c58 | 886 | |
9045f33c | 887 | #if defined(CONFIG_SC3) |
ca43ba18 HS |
888 | sc3_read_eeprom(); |
889 | #endif | |
d59feffb | 890 | |
6d0f6bcf | 891 | #if defined (CONFIG_ID_EEPROM) || defined (CONFIG_SYS_I2C_MAC_OFFSET) |
d59feffb HW |
892 | mac_read_from_eeprom(); |
893 | #endif | |
894 | ||
fe8c2806 WD |
895 | #ifdef CONFIG_HERMES |
896 | if ((gd->board_type >> 16) == 2) | |
897 | bd->bi_ethspeed = gd->board_type & 0xFFFF; | |
898 | else | |
899 | bd->bi_ethspeed = 0xFFFF; | |
900 | #endif | |
901 | ||
02a301cd | 902 | #ifdef CONFIG_CMD_NET |
eb85aa59 MF |
903 | /* kept around for legacy kernels only ... ignore the next section */ |
904 | eth_getenv_enetaddr("ethaddr", bd->bi_enetaddr); | |
e2ffd59b | 905 | #ifdef CONFIG_HAS_ETH1 |
eb85aa59 | 906 | eth_getenv_enetaddr("eth1addr", bd->bi_enet1addr); |
fe8c2806 | 907 | #endif |
e2ffd59b | 908 | #ifdef CONFIG_HAS_ETH2 |
eb85aa59 | 909 | eth_getenv_enetaddr("eth2addr", bd->bi_enet2addr); |
fe8c2806 | 910 | #endif |
e2ffd59b | 911 | #ifdef CONFIG_HAS_ETH3 |
eb85aa59 | 912 | eth_getenv_enetaddr("eth3addr", bd->bi_enet3addr); |
ba56f625 | 913 | #endif |
c68a05fe | 914 | #ifdef CONFIG_HAS_ETH4 |
eb85aa59 | 915 | eth_getenv_enetaddr("eth4addr", bd->bi_enet4addr); |
c68a05fe | 916 | #endif |
c68a05fe | 917 | #ifdef CONFIG_HAS_ETH5 |
eb85aa59 | 918 | eth_getenv_enetaddr("eth5addr", bd->bi_enet5addr); |
c68a05fe | 919 | #endif |
02a301cd | 920 | #endif /* CONFIG_CMD_NET */ |
c68a05fe | 921 | |
fe8c2806 WD |
922 | /* IP Address */ |
923 | bd->bi_ip_addr = getenv_IPaddr ("ipaddr"); | |
924 | ||
925 | WATCHDOG_RESET (); | |
926 | ||
979bdbc7 | 927 | #if defined(CONFIG_PCI) && !defined(CONFIG_BAB7xx) && !defined(CONFIG_CPC45) |
fe8c2806 WD |
928 | /* |
929 | * Do pci configuration | |
930 | */ | |
931 | pci_init (); | |
932 | #endif | |
933 | ||
934 | /** leave this here (after malloc(), environment and PCI are working) **/ | |
935 | /* Initialize devices */ | |
936 | devices_init (); | |
937 | ||
27b207fd WD |
938 | /* Initialize the jump table for applications */ |
939 | jumptable_init (); | |
fe8c2806 | 940 | |
500856eb RJ |
941 | #if defined(CONFIG_API) |
942 | /* Initialize API */ | |
943 | api_init (); | |
944 | #endif | |
945 | ||
fe8c2806 WD |
946 | /* Initialize the console (after the relocation and devices init) */ |
947 | console_init_r (); | |
fe8c2806 WD |
948 | |
949 | #if defined(CONFIG_CCM) || \ | |
950 | defined(CONFIG_COGENT) || \ | |
951 | defined(CONFIG_CPCI405) || \ | |
952 | defined(CONFIG_EVB64260) || \ | |
56f94be3 | 953 | defined(CONFIG_KUP4K) || \ |
0608e04d | 954 | defined(CONFIG_KUP4X) || \ |
fe8c2806 WD |
955 | defined(CONFIG_LWMON) || \ |
956 | defined(CONFIG_PCU_E) || \ | |
9045f33c | 957 | defined(CONFIG_SC3) || \ |
fe8c2806 WD |
958 | defined(CONFIG_W7O) || \ |
959 | defined(CONFIG_MISC_INIT_R) | |
960 | /* miscellaneous platform dependent initialisations */ | |
961 | misc_init_r (); | |
962 | #endif | |
963 | ||
964 | #ifdef CONFIG_HERMES | |
965 | if (bd->bi_ethspeed != 0xFFFF) | |
966 | hermes_start_lxt980 ((int) bd->bi_ethspeed); | |
967 | #endif | |
968 | ||
7def6b34 | 969 | #if defined(CONFIG_CMD_KGDB) |
fe8c2806 WD |
970 | WATCHDOG_RESET (); |
971 | puts ("KGDB: "); | |
972 | kgdb_init (); | |
973 | #endif | |
974 | ||
9d2b18a0 | 975 | debug ("U-Boot relocated to %08lx\n", dest_addr); |
fe8c2806 WD |
976 | |
977 | /* | |
978 | * Enable Interrupts | |
979 | */ | |
980 | interrupt_init (); | |
981 | ||
982 | /* Must happen after interrupts are initialized since | |
983 | * an irq handler gets installed | |
984 | */ | |
42dfe7a1 | 985 | #ifdef CONFIG_SERIAL_SOFTWARE_FIFO |
fe8c2806 WD |
986 | serial_buffered_init(); |
987 | #endif | |
988 | ||
566a494f | 989 | #if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT) |
fe8c2806 WD |
990 | status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING); |
991 | #endif | |
992 | ||
993 | udelay (20); | |
994 | ||
995 | set_timer (0); | |
996 | ||
fe8c2806 WD |
997 | /* Initialize from environment */ |
998 | if ((s = getenv ("loadaddr")) != NULL) { | |
999 | load_addr = simple_strtoul (s, NULL, 16); | |
1000 | } | |
7def6b34 | 1001 | #if defined(CONFIG_CMD_NET) |
fe8c2806 WD |
1002 | if ((s = getenv ("bootfile")) != NULL) { |
1003 | copy_filename (BootFile, s, sizeof (BootFile)); | |
1004 | } | |
b3aff0cb | 1005 | #endif |
fe8c2806 WD |
1006 | |
1007 | WATCHDOG_RESET (); | |
1008 | ||
9c2d63ec HS |
1009 | #if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */ |
1010 | dtt_init (); | |
1011 | #endif | |
7def6b34 | 1012 | #if defined(CONFIG_CMD_SCSI) |
fe8c2806 WD |
1013 | WATCHDOG_RESET (); |
1014 | puts ("SCSI: "); | |
1015 | scsi_init (); | |
1016 | #endif | |
1017 | ||
272cc70b AF |
1018 | #ifdef CONFIG_GENERIC_MMC |
1019 | WATCHDOG_RESET (); | |
1020 | puts ("MMC: "); | |
1021 | mmc_initialize (bd); | |
1022 | #endif | |
1023 | ||
7def6b34 | 1024 | #if defined(CONFIG_CMD_DOC) |
fe8c2806 WD |
1025 | WATCHDOG_RESET (); |
1026 | puts ("DOC: "); | |
1027 | doc_init (); | |
1028 | #endif | |
1029 | ||
7def6b34 | 1030 | #if defined(CONFIG_CMD_NET) |
63ff004c | 1031 | #if defined(CONFIG_NET_MULTI) |
fe8c2806 WD |
1032 | WATCHDOG_RESET (); |
1033 | puts ("Net: "); | |
63ff004c | 1034 | #endif |
fe8c2806 WD |
1035 | eth_initialize (bd); |
1036 | #endif | |
1037 | ||
7def6b34 | 1038 | #if defined(CONFIG_CMD_NET) && ( \ |
63ff004c MB |
1039 | defined(CONFIG_CCM) || \ |
1040 | defined(CONFIG_ELPT860) || \ | |
1041 | defined(CONFIG_EP8260) || \ | |
1042 | defined(CONFIG_IP860) || \ | |
1043 | defined(CONFIG_IVML24) || \ | |
1044 | defined(CONFIG_IVMS8) || \ | |
1045 | defined(CONFIG_MPC8260ADS) || \ | |
1046 | defined(CONFIG_MPC8266ADS) || \ | |
1047 | defined(CONFIG_MPC8560ADS) || \ | |
1048 | defined(CONFIG_PCU_E) || \ | |
1049 | defined(CONFIG_RPXSUPER) || \ | |
1050 | defined(CONFIG_STXGP3) || \ | |
1051 | defined(CONFIG_SPD823TS) || \ | |
1052 | defined(CONFIG_RESET_PHY_R) ) | |
1053 | ||
1054 | WATCHDOG_RESET (); | |
1055 | debug ("Reset Ethernet PHY\n"); | |
1056 | reset_phy (); | |
1057 | #endif | |
1058 | ||
fe8c2806 | 1059 | #ifdef CONFIG_POST |
6dff5529 | 1060 | post_run (NULL, POST_RAM | post_bootmode_get(0)); |
fe8c2806 WD |
1061 | #endif |
1062 | ||
7def6b34 JL |
1063 | #if defined(CONFIG_CMD_PCMCIA) \ |
1064 | && !defined(CONFIG_CMD_IDE) | |
fe8c2806 WD |
1065 | WATCHDOG_RESET (); |
1066 | puts ("PCMCIA:"); | |
1067 | pcmcia_init (); | |
1068 | #endif | |
1069 | ||
7def6b34 | 1070 | #if defined(CONFIG_CMD_IDE) |
fe8c2806 WD |
1071 | WATCHDOG_RESET (); |
1072 | # ifdef CONFIG_IDE_8xx_PCCARD | |
1073 | puts ("PCMCIA:"); | |
1074 | # else | |
1075 | puts ("IDE: "); | |
1076 | #endif | |
ca43ba18 HS |
1077 | #if defined(CONFIG_START_IDE) |
1078 | if (board_start_ide()) | |
1079 | ide_init (); | |
1080 | #else | |
fe8c2806 | 1081 | ide_init (); |
ca43ba18 | 1082 | #endif |
b3aff0cb | 1083 | #endif |
fe8c2806 WD |
1084 | |
1085 | #ifdef CONFIG_LAST_STAGE_INIT | |
1086 | WATCHDOG_RESET (); | |
1087 | /* | |
1088 | * Some parts can be only initialized if all others (like | |
1089 | * Interrupts) are up and running (i.e. the PC-style ISA | |
1090 | * keyboard). | |
1091 | */ | |
1092 | last_stage_init (); | |
1093 | #endif | |
1094 | ||
7def6b34 | 1095 | #if defined(CONFIG_CMD_BEDBUG) |
fe8c2806 WD |
1096 | WATCHDOG_RESET (); |
1097 | bedbug_init (); | |
1098 | #endif | |
1099 | ||
228f29ac | 1100 | #if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER) |
fe8c2806 WD |
1101 | /* |
1102 | * Export available size of memory for Linux, | |
1103 | * taking into account the protected RAM at top of memory | |
1104 | */ | |
1105 | { | |
1106 | ulong pram; | |
fe8c2806 | 1107 | uchar memsz[32]; |
228f29ac WD |
1108 | #ifdef CONFIG_PRAM |
1109 | char *s; | |
fe8c2806 WD |
1110 | |
1111 | if ((s = getenv ("pram")) != NULL) { | |
1112 | pram = simple_strtoul (s, NULL, 10); | |
1113 | } else { | |
1114 | pram = CONFIG_PRAM; | |
1115 | } | |
228f29ac WD |
1116 | #else |
1117 | pram=0; | |
1118 | #endif | |
1119 | #ifdef CONFIG_LOGBUFFER | |
3d610186 | 1120 | #ifndef CONFIG_ALT_LB_ADDR |
228f29ac WD |
1121 | /* Also take the logbuffer into account (pram is in kB) */ |
1122 | pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024; | |
3d610186 | 1123 | #endif |
228f29ac | 1124 | #endif |
77ddac94 WD |
1125 | sprintf ((char *)memsz, "%ldk", (bd->bi_memsize / 1024) - pram); |
1126 | setenv ("mem", (char *)memsz); | |
fe8c2806 WD |
1127 | } |
1128 | #endif | |
1129 | ||
1c43771b WD |
1130 | #ifdef CONFIG_PS2KBD |
1131 | puts ("PS/2: "); | |
1132 | kbd_init(); | |
1133 | #endif | |
1134 | ||
4532cb69 WD |
1135 | #ifdef CONFIG_MODEM_SUPPORT |
1136 | { | |
1137 | extern int do_mdm_init; | |
1138 | do_mdm_init = gd->do_mdm_init; | |
1139 | } | |
1140 | #endif | |
1141 | ||
fe8c2806 WD |
1142 | /* Initialization complete - start the monitor */ |
1143 | ||
1144 | /* main_loop() can return to retry autoboot, if so just run it again. */ | |
1145 | for (;;) { | |
1146 | WATCHDOG_RESET (); | |
1147 | main_loop (); | |
1148 | } | |
1149 | ||
1150 | /* NOTREACHED - no way out of command loop except booting */ | |
1151 | } | |
1152 | ||
1153 | void hang (void) | |
1154 | { | |
1155 | puts ("### ERROR ### Please RESET the board ###\n"); | |
63e73c9a | 1156 | show_boot_progress(-30); |
fe8c2806 WD |
1157 | for (;;); |
1158 | } | |
1159 | ||
4532cb69 | 1160 | |
fe8c2806 WD |
1161 | #if 0 /* We could use plain global data, but the resulting code is bigger */ |
1162 | /* | |
1163 | * Pointer to initial global data area | |
1164 | * | |
1165 | * Here we initialize it. | |
1166 | */ | |
1167 | #undef XTRN_DECLARE_GLOBAL_DATA_PTR | |
1168 | #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */ | |
6d0f6bcf | 1169 | DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); |
fe8c2806 WD |
1170 | #endif /* 0 */ |
1171 | ||
1172 | /************************************************************************/ |