[J-u-boot.git] / rtc / ds1306.c

/*
 * (C) Copyright 2002 SIXNET, [email protected].
 *
 * (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
 * Stephan Linz <[email protected]>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/*
 * Date & Time support for DS1306 RTC using SPI:
 *
 *    - SXNI855T:    it uses its own soft SPI here in this file
 *    - all other:   use the external spi_xfer() function
 *                   (see include/spi.h)
 */

#include <common.h>
#include <command.h>
#include <rtc.h>
#include <spi.h>

#if defined(CONFIG_RTC_DS1306) && (CONFIG_COMMANDS & CFG_CMD_DATE)

#define	RTC_SECONDS		0x00
#define	RTC_MINUTES		0x01
#define	RTC_HOURS		0x02
#define	RTC_DAY_OF_WEEK		0x03
#define	RTC_DATE_OF_MONTH	0x04
#define	RTC_MONTH		0x05
#define	RTC_YEAR		0x06

#define	RTC_SECONDS_ALARM0	0x07
#define	RTC_MINUTES_ALARM0	0x08
#define	RTC_HOURS_ALARM0	0x09
#define	RTC_DAY_OF_WEEK_ALARM0	0x0a

#define	RTC_SECONDS_ALARM1	0x0b
#define	RTC_MINUTES_ALARM1	0x0c
#define	RTC_HOURS_ALARM1	0x0d
#define	RTC_DAY_OF_WEEK_ALARM1	0x0e

#define	RTC_CONTROL		0x0f
#define	RTC_STATUS		0x10
#define	RTC_TRICKLE_CHARGER	0x11

#define	RTC_USER_RAM_BASE	0x20

/*
 * External table of chip select functions (see the appropriate board
 * support for the actual definition of the table).
 */
extern spi_chipsel_type spi_chipsel[];
extern int spi_chipsel_cnt;

static unsigned int bin2bcd (unsigned int n);
static unsigned char bcd2bin (unsigned char c);

/* ************************************************************************* */
#ifdef CONFIG_SXNI855T		/* !!! SHOULD BE CHANGED TO NEW CODE !!! */

static void soft_spi_send (unsigned char n);
static unsigned char soft_spi_read (void);
static void init_spi (void);

/*-----------------------------------------------------------------------
 * Definitions
 */

#define	PB_SPISCK	0x00000002	/* PB 30 */
#define PB_SPIMOSI	0x00000004	/* PB 29 */
#define PB_SPIMISO	0x00000008	/* PB 28 */
#define PB_SPI_CE	0x00010000	/* PB 15 */

/* ------------------------------------------------------------------------- */

/* read clock time from DS1306 and return it in *tmp */
void rtc_get (struct rtc_time *tmp)
{
	volatile immap_t *immap = (immap_t *) CFG_IMMR;
	unsigned char spi_byte;	/* Data Byte */

	init_spi ();		/* set port B for software SPI */

	/* Now we can enable the DS1306 RTC */
	immap->im_cpm.cp_pbdat |= PB_SPI_CE;
	udelay (10);

	/* Shift out the address (0) of the time in the Clock Chip */
	soft_spi_send (0);

	/* Put the clock readings into the rtc_time structure */
	tmp->tm_sec = bcd2bin (soft_spi_read ());	/* Read seconds */
	tmp->tm_min = bcd2bin (soft_spi_read ());	/* Read minutes */

	/* Hours are trickier */
	spi_byte = soft_spi_read ();	/* Read Hours into temporary value */
	if (spi_byte & 0x40) {
		/* 12 hour mode bit is set (time is in 1-12 format) */
		if (spi_byte & 0x20) {
			/* since PM we add 11 to get 0-23 for hours */
			tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) + 11;
		} else {
			/* since AM we subtract 1 to get 0-23 for hours */
			tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) - 1;
		}
	} else {
		/* Otherwise, 0-23 hour format */
		tmp->tm_hour = (bcd2bin (spi_byte & 0x3F));
	}

	soft_spi_read ();	/* Read and discard Day of week */
	tmp->tm_mday = bcd2bin (soft_spi_read ());	/* Read Day of the Month */
	tmp->tm_mon = bcd2bin (soft_spi_read ());	/* Read Month */

	/* Read Year and convert to this century */
	tmp->tm_year = bcd2bin (soft_spi_read ()) + 2000;

	/* Now we can disable the DS1306 RTC */
	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;	/* Disable DS1306 Chip */
	udelay (10);

	GregorianDay (tmp);	/* Determine the day of week */

	debug ("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
}

/* ------------------------------------------------------------------------- */

/* set clock time in DS1306 RTC and in MPC8xx RTC */
void rtc_set (struct rtc_time *tmp)
{
	volatile immap_t *immap = (immap_t *) CFG_IMMR;

	init_spi ();		/* set port B for software SPI */

	/* Now we can enable the DS1306 RTC */
	immap->im_cpm.cp_pbdat |= PB_SPI_CE;	/* Enable DS1306 Chip */
	udelay (10);

	/* First disable write protect in the clock chip control register */
	soft_spi_send (0x8F);	/* send address of the control register */
	soft_spi_send (0x00);	/* send control register contents */

	/* Now disable the DS1306 to terminate the write */
	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;
	udelay (10);

	/* Now enable the DS1306 to initiate a new write */
	immap->im_cpm.cp_pbdat |= PB_SPI_CE;
	udelay (10);

	/* Next, send the address of the clock time write registers */
	soft_spi_send (0x80);	/* send address of the first time register */

	/* Use Burst Mode to send all of the time data to the clock */
	bin2bcd (tmp->tm_sec);
	soft_spi_send (bin2bcd (tmp->tm_sec));	/* Send Seconds */
	soft_spi_send (bin2bcd (tmp->tm_min));	/* Send Minutes */
	soft_spi_send (bin2bcd (tmp->tm_hour));	/* Send Hour */
	soft_spi_send (bin2bcd (tmp->tm_wday));	/* Send Day of the Week */
	soft_spi_send (bin2bcd (tmp->tm_mday));	/* Send Day of Month */
	soft_spi_send (bin2bcd (tmp->tm_mon));	/* Send Month */
	soft_spi_send (bin2bcd (tmp->tm_year - 2000));	/* Send Year */

	/* Now we can disable the Clock chip to terminate the burst write */
	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;	/* Disable DS1306 Chip */
	udelay (10);

	/* Now we can enable the Clock chip to initiate a new write */
	immap->im_cpm.cp_pbdat |= PB_SPI_CE;	/* Enable DS1306 Chip */
	udelay (10);

	/* First we Enable write protect in the clock chip control register */
	soft_spi_send (0x8F);	/* send address of the control register */
	soft_spi_send (0x40);	/* send out Control Register contents */

	/* Now disable the DS1306 */
	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;	/*  Disable DS1306 Chip */
	udelay (10);

	/* Set standard MPC8xx clock to the same time so Linux will
	 * see the time even if it doesn't have a DS1306 clock driver.
	 * This helps with experimenting with standard kernels.
	 */
	{
		ulong tim;

		tim = mktime (tmp->tm_year, tmp->tm_mon, tmp->tm_mday,
			      tmp->tm_hour, tmp->tm_min, tmp->tm_sec);

		immap->im_sitk.sitk_rtck = KAPWR_KEY;
		immap->im_sit.sit_rtc = tim;
	}

	debug ("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
}

/* ------------------------------------------------------------------------- */

/* Initialize Port B for software SPI */
static void init_spi (void)
{
	volatile immap_t *immap = (immap_t *) CFG_IMMR;

	/* Force output pins to begin at logic 0 */
	immap->im_cpm.cp_pbdat &= ~(PB_SPI_CE | PB_SPIMOSI | PB_SPISCK);

	/* Set these 3 signals as outputs */
	immap->im_cpm.cp_pbdir |= (PB_SPIMOSI | PB_SPI_CE | PB_SPISCK);

	immap->im_cpm.cp_pbdir &= ~PB_SPIMISO;	/* Make MISO pin an input */
	udelay (10);
}

/* ------------------------------------------------------------------------- */

/* NOTE: soft_spi_send() assumes that the I/O lines are configured already */
static void soft_spi_send (unsigned char n)
{
	volatile immap_t *immap = (immap_t *) CFG_IMMR;
	unsigned char bitpos;	/* bit position to receive */
	unsigned char i;	/* Loop Control */

	/* bit position to send, start with most significant bit */
	bitpos = 0x80;

	/* Send 8 bits to software SPI */
	for (i = 0; i < 8; i++) {	/* Loop for 8 bits */
		immap->im_cpm.cp_pbdat |= PB_SPISCK;	/* Raise SCK */

		if (n & bitpos)
			immap->im_cpm.cp_pbdat |= PB_SPIMOSI;	/* Set MOSI to 1 */
		else
			immap->im_cpm.cp_pbdat &= ~PB_SPIMOSI;	/* Set MOSI to 0 */
		udelay (10);

		immap->im_cpm.cp_pbdat &= ~PB_SPISCK;	/* Lower SCK */
		udelay (10);

		bitpos >>= 1;	/* Shift for next bit position */
	}
}

/* ------------------------------------------------------------------------- */

/* NOTE: soft_spi_read() assumes that the I/O lines are configured already */
static unsigned char soft_spi_read (void)
{
	volatile immap_t *immap = (immap_t *) CFG_IMMR;

	unsigned char spi_byte = 0;	/* Return value, assume success */
	unsigned char bitpos;	/* bit position to receive */
	unsigned char i;	/* Loop Control */

	/* bit position to receive, start with most significant bit */
	bitpos = 0x80;

	/* Read 8 bits here */
	for (i = 0; i < 8; i++) {	/* Do 8 bits in loop */
		immap->im_cpm.cp_pbdat |= PB_SPISCK;	/* Raise SCK */
		udelay (10);
		if (immap->im_cpm.cp_pbdat & PB_SPIMISO)	/* Get a bit of data */
			spi_byte |= bitpos;	/* Set data accordingly */
		immap->im_cpm.cp_pbdat &= ~PB_SPISCK;	/* Lower SCK */
		udelay (10);
		bitpos >>= 1;	/* Shift for next bit position */
	}

	return spi_byte;	/* Return the byte read */
}

/* ------------------------------------------------------------------------- */

void rtc_reset (void)
{
	return;			/* nothing to do */
}

#else  /* not CONFIG_SXNI855T */
/* ************************************************************************* */

static unsigned char rtc_read (unsigned char reg);
static void rtc_write (unsigned char reg, unsigned char val);

/* read clock time from DS1306 and return it in *tmp */
void rtc_get (struct rtc_time *tmp)
{
	unsigned char sec, min, hour, mday, wday, mon, year;

	sec = rtc_read (RTC_SECONDS);
	min = rtc_read (RTC_MINUTES);
	hour = rtc_read (RTC_HOURS);
	mday = rtc_read (RTC_DATE_OF_MONTH);
	wday = rtc_read (RTC_DAY_OF_WEEK);
	mon = rtc_read (RTC_MONTH);
	year = rtc_read (RTC_YEAR);

	debug ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
	       "hr: %02x min: %02x sec: %02x\n",
	       year, mon, mday, wday, hour, min, sec);
	debug ("Alarms[0]: wday: %02x hour: %02x min: %02x sec: %02x\n",
	       rtc_read (RTC_DAY_OF_WEEK_ALARM0),
	       rtc_read (RTC_HOURS_ALARM0),
	       rtc_read (RTC_MINUTES_ALARM0), rtc_read (RTC_SECONDS_ALARM0));
	debug ("Alarms[1]: wday: %02x hour: %02x min: %02x sec: %02x\n",
	       rtc_read (RTC_DAY_OF_WEEK_ALARM1),
	       rtc_read (RTC_HOURS_ALARM1),
	       rtc_read (RTC_MINUTES_ALARM1), rtc_read (RTC_SECONDS_ALARM1));

	tmp->tm_sec = bcd2bin (sec & 0x7F);	/* convert Seconds */
	tmp->tm_min = bcd2bin (min & 0x7F);	/* convert Minutes */

	/* convert Hours */
	tmp->tm_hour = (hour & 0x40)
		? ((hour & 0x20)	/* 12 hour mode */
		   ? bcd2bin (hour & 0x1F) + 11	/* PM */
		   : bcd2bin (hour & 0x1F) - 1	/* AM */
		)
		: bcd2bin (hour & 0x3F);	/* 24 hour mode */

	tmp->tm_mday = bcd2bin (mday & 0x3F);	/* convert Day of the Month */
	tmp->tm_mon = bcd2bin (mon & 0x1F);	/* convert Month */
	tmp->tm_year = bcd2bin (year) + 2000;	/* convert Year */
	tmp->tm_wday = bcd2bin (wday & 0x07) - 1;	/* convert Day of the Week */
	tmp->tm_yday = 0;
	tmp->tm_isdst = 0;

	debug ("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
}

/* ------------------------------------------------------------------------- */

/* set clock time from *tmp in DS1306 RTC */
void rtc_set (struct rtc_time *tmp)
{
	debug ("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
	       tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	       tmp->tm_hour, tmp->tm_min, tmp->tm_sec);

	rtc_write (RTC_SECONDS, bin2bcd (tmp->tm_sec));
	rtc_write (RTC_MINUTES, bin2bcd (tmp->tm_min));
	rtc_write (RTC_HOURS, bin2bcd (tmp->tm_hour));
	rtc_write (RTC_DAY_OF_WEEK, bin2bcd (tmp->tm_wday + 1));
	rtc_write (RTC_DATE_OF_MONTH, bin2bcd (tmp->tm_mday));
	rtc_write (RTC_MONTH, bin2bcd (tmp->tm_mon));
	rtc_write (RTC_YEAR, bin2bcd (tmp->tm_year - 2000));
}

/* ------------------------------------------------------------------------- */

/* reset the DS1306 */
void rtc_reset (void)
{
	/* clear the control register */
	rtc_write (RTC_CONTROL, 0x00);	/* 1st step: reset WP */
	rtc_write (RTC_CONTROL, 0x00);	/* 2nd step: reset 1Hz, AIE1, AIE0 */

	/* reset all alarms */
	rtc_write (RTC_SECONDS_ALARM0, 0x00);
	rtc_write (RTC_SECONDS_ALARM1, 0x00);
	rtc_write (RTC_MINUTES_ALARM0, 0x00);
	rtc_write (RTC_MINUTES_ALARM1, 0x00);
	rtc_write (RTC_HOURS_ALARM0, 0x00);
	rtc_write (RTC_HOURS_ALARM1, 0x00);
	rtc_write (RTC_DAY_OF_WEEK_ALARM0, 0x00);
	rtc_write (RTC_DAY_OF_WEEK_ALARM1, 0x00);
}

/* ------------------------------------------------------------------------- */

static unsigned char rtc_read (unsigned char reg)
{
	unsigned char dout[2];	/* SPI Output Data Bytes */
	unsigned char din[2];	/* SPI Input Data Bytes */

	dout[0] = reg;

	if (spi_xfer (spi_chipsel[CFG_SPI_RTC_DEVID], 16, dout, din) != 0) {
		return 0;
	} else {
		return din[1];
	}
}

/* ------------------------------------------------------------------------- */

static void rtc_write (unsigned char reg, unsigned char val)
{
	unsigned char dout[2];	/* SPI Output Data Bytes */
	unsigned char din[2];	/* SPI Input Data Bytes */

	dout[0] = 0x80 | reg;
	dout[1] = val;

	spi_xfer (spi_chipsel[CFG_SPI_RTC_DEVID], 16, dout, din);
}

#endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */

/* ------------------------------------------------------------------------- */

static unsigned char bcd2bin (unsigned char n)
{
	return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
}

/* ------------------------------------------------------------------------- */

static unsigned int bin2bcd (unsigned int n)
{
	return (((n / 10) << 4) | (n % 10));
}
/* ------------------------------------------------------------------------- */

#endif
Commit	Line	Data
affae2bf WD	1	/*
	2	* (C) Copyright 2002 SIXNET, [email protected].
	3	*
ec4c544b WD	4	* (C) Copyright 2004, Li-Pro.Net <www.li-pro.net>
	5	* Stephan Linz <[email protected]>
	6	*
affae2bf WD	7	* See file CREDITS for list of people who contributed to this
	8	* project.
	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License as
	12	* published by the Free Software Foundation; either version 2 of
	13	* the License, or (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	23	* MA 02111-1307 USA
	24	*/
	25
	26	/*
ec4c544b WD	27	* Date & Time support for DS1306 RTC using SPI:
	28	*
	29	* - SXNI855T: it uses its own soft SPI here in this file
	30	* - all other: use the external spi_xfer() function
	31	* (see include/spi.h)
affae2bf WD	32	*/
	33
	34	#include <common.h>
	35	#include <command.h>
	36	#include <rtc.h>
ec4c544b	37	#include <spi.h>
affae2bf WD	38
	39	#if defined(CONFIG_RTC_DS1306) && (CONFIG_COMMANDS & CFG_CMD_DATE)
	40
ec4c544b WD	41	#define RTC_SECONDS 0x00
	42	#define RTC_MINUTES 0x01
	43	#define RTC_HOURS 0x02
	44	#define RTC_DAY_OF_WEEK 0x03
	45	#define RTC_DATE_OF_MONTH 0x04
	46	#define RTC_MONTH 0x05
	47	#define RTC_YEAR 0x06
	48
	49	#define RTC_SECONDS_ALARM0 0x07
	50	#define RTC_MINUTES_ALARM0 0x08
	51	#define RTC_HOURS_ALARM0 0x09
	52	#define RTC_DAY_OF_WEEK_ALARM0 0x0a
	53
	54	#define RTC_SECONDS_ALARM1 0x0b
	55	#define RTC_MINUTES_ALARM1 0x0c
	56	#define RTC_HOURS_ALARM1 0x0d
	57	#define RTC_DAY_OF_WEEK_ALARM1 0x0e
	58
	59	#define RTC_CONTROL 0x0f
	60	#define RTC_STATUS 0x10
	61	#define RTC_TRICKLE_CHARGER 0x11
	62
	63	#define RTC_USER_RAM_BASE 0x20
	64
	65	/*
	66	* External table of chip select functions (see the appropriate board
	67	* support for the actual definition of the table).
	68	*/
	69	extern spi_chipsel_type spi_chipsel[];
	70	extern int spi_chipsel_cnt;
	71
	72	static unsigned int bin2bcd (unsigned int n);
	73	static unsigned char bcd2bin (unsigned char c);
ec4c544b	74
ec4c544b WD	75	/* ************************************************************************* */
	76	#ifdef CONFIG_SXNI855T /* !!! SHOULD BE CHANGED TO NEW CODE !!! */
	77
	78	static void soft_spi_send (unsigned char n);
	79	static unsigned char soft_spi_read (void);
	80	static void init_spi (void);
affae2bf WD	81
	82	/*-----------------------------------------------------------------------
	83	* Definitions
	84	*/
	85
	86	#define PB_SPISCK 0x00000002 /* PB 30 */
	87	#define PB_SPIMOSI 0x00000004 /* PB 29 */
	88	#define PB_SPIMISO 0x00000008 /* PB 28 */
	89	#define PB_SPI_CE 0x00010000 /* PB 15 */
	90
	91	/* ------------------------------------------------------------------------- */
	92
	93	/* read clock time from DS1306 and return it in tmp /
ec4c544b	94	void rtc_get (struct rtc_time *tmp)
affae2bf	95	{
ec4c544b WD	96	volatile immap_t immap = (immap_t ) CFG_IMMR;
	97	unsigned char spi_byte; /* Data Byte */
	98
	99	init_spi (); /* set port B for software SPI */
	100
	101	/* Now we can enable the DS1306 RTC */
	102	immap->im_cpm.cp_pbdat \|= PB_SPI_CE;
	103	udelay (10);
	104
	105	/* Shift out the address (0) of the time in the Clock Chip */
	106	soft_spi_send (0);
	107
	108	/* Put the clock readings into the rtc_time structure */
	109	tmp->tm_sec = bcd2bin (soft_spi_read ()); /* Read seconds */
	110	tmp->tm_min = bcd2bin (soft_spi_read ()); /* Read minutes */
	111
	112	/* Hours are trickier */
	113	spi_byte = soft_spi_read (); /* Read Hours into temporary value */
	114	if (spi_byte & 0x40) {
	115	/* 12 hour mode bit is set (time is in 1-12 format) */
	116	if (spi_byte & 0x20) {
	117	/* since PM we add 11 to get 0-23 for hours */
	118	tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) + 11;
	119	} else {
	120	/* since AM we subtract 1 to get 0-23 for hours */
	121	tmp->tm_hour = (bcd2bin (spi_byte & 0x1F)) - 1;
	122	}
	123	} else {
	124	/* Otherwise, 0-23 hour format */
	125	tmp->tm_hour = (bcd2bin (spi_byte & 0x3F));
	126	}
affae2bf	127
ec4c544b WD	128	soft_spi_read (); /* Read and discard Day of week */
	129	tmp->tm_mday = bcd2bin (soft_spi_read ()); /* Read Day of the Month */
	130	tmp->tm_mon = bcd2bin (soft_spi_read ()); /* Read Month */
affae2bf	131
ec4c544b WD	132	/* Read Year and convert to this century */
ec4c544b WD	133	tmp->tm_year = bcd2bin (soft_spi_read ()) + 2000;
affae2bf	134
ec4c544b WD	135	/* Now we can disable the DS1306 RTC */
	136	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
	137	udelay (10);
affae2bf	138
ec4c544b	139	GregorianDay (tmp); /* Determine the day of week */
affae2bf	140
ec4c544b WD	141	debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	142	tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	143	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
	144	}
	145
	146	/* ------------------------------------------------------------------------- */
	147
	148	/* set clock time in DS1306 RTC and in MPC8xx RTC */
	149	void rtc_set (struct rtc_time *tmp)
	150	{
	151	volatile immap_t immap = (immap_t ) CFG_IMMR;
	152
	153	init_spi (); /* set port B for software SPI */
	154
	155	/* Now we can enable the DS1306 RTC */
	156	immap->im_cpm.cp_pbdat \|= PB_SPI_CE; /* Enable DS1306 Chip */
	157	udelay (10);
	158
	159	/* First disable write protect in the clock chip control register */
	160	soft_spi_send (0x8F); /* send address of the control register */
	161	soft_spi_send (0x00); /* send control register contents */
	162
	163	/* Now disable the DS1306 to terminate the write */
	164	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;
	165	udelay (10);
	166
	167	/* Now enable the DS1306 to initiate a new write */
	168	immap->im_cpm.cp_pbdat \|= PB_SPI_CE;
	169	udelay (10);
	170
	171	/* Next, send the address of the clock time write registers */
	172	soft_spi_send (0x80); /* send address of the first time register */
	173
	174	/* Use Burst Mode to send all of the time data to the clock */
	175	bin2bcd (tmp->tm_sec);
	176	soft_spi_send (bin2bcd (tmp->tm_sec)); /* Send Seconds */
	177	soft_spi_send (bin2bcd (tmp->tm_min)); /* Send Minutes */
	178	soft_spi_send (bin2bcd (tmp->tm_hour)); /* Send Hour */
	179	soft_spi_send (bin2bcd (tmp->tm_wday)); /* Send Day of the Week */
	180	soft_spi_send (bin2bcd (tmp->tm_mday)); /* Send Day of Month */
	181	soft_spi_send (bin2bcd (tmp->tm_mon)); /* Send Month */
	182	soft_spi_send (bin2bcd (tmp->tm_year - 2000)); /* Send Year */
	183
	184	/* Now we can disable the Clock chip to terminate the burst write */
	185	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
	186	udelay (10);
	187
	188	/* Now we can enable the Clock chip to initiate a new write */
	189	immap->im_cpm.cp_pbdat \|= PB_SPI_CE; /* Enable DS1306 Chip */
	190	udelay (10);
	191
	192	/* First we Enable write protect in the clock chip control register */
	193	soft_spi_send (0x8F); /* send address of the control register */
	194	soft_spi_send (0x40); /* send out Control Register contents */
	195
	196	/* Now disable the DS1306 */
	197	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE; /* Disable DS1306 Chip */
	198	udelay (10);
	199
	200	/* Set standard MPC8xx clock to the same time so Linux will
	201	* see the time even if it doesn't have a DS1306 clock driver.
	202	* This helps with experimenting with standard kernels.
	203	*/
	204	{
205	ulong tim;
206
207	tim = mktime (tmp->tm_year, tmp->tm_mon, tmp->tm_mday,
208	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
209
210	immap->im_sitk.sitk_rtck = KAPWR_KEY;
211	immap->im_sit.sit_rtc = tim;
affae2bf	212	}
affae2bf	213
ec4c544b WD	214	debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	215	tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	216	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
	217	}
affae2bf	218
ec4c544b	219	/* ------------------------------------------------------------------------- */
affae2bf	220
ec4c544b WD	221	/* Initialize Port B for software SPI */
	222	static void init_spi (void)
	223	{
	224	volatile immap_t immap = (immap_t ) CFG_IMMR;
affae2bf	225
ec4c544b WD	226	/* Force output pins to begin at logic 0 */
ec4c544b WD	227	immap->im_cpm.cp_pbdat &= ~(PB_SPI_CE \| PB_SPIMOSI \| PB_SPISCK);
affae2bf	228
ec4c544b WD	229	/* Set these 3 signals as outputs */
	230	immap->im_cpm.cp_pbdir \|= (PB_SPIMOSI \| PB_SPI_CE \| PB_SPISCK);
	231
	232	immap->im_cpm.cp_pbdir &= ~PB_SPIMISO; /* Make MISO pin an input */
	233	udelay (10);
affae2bf WD	234	}
	235
	236	/* ------------------------------------------------------------------------- */
	237
ec4c544b WD	238	/* NOTE: soft_spi_send() assumes that the I/O lines are configured already */
ec4c544b WD	239	static void soft_spi_send (unsigned char n)
affae2bf	240	{
ec4c544b WD	241	volatile immap_t immap = (immap_t ) CFG_IMMR;
	242	unsigned char bitpos; /* bit position to receive */
	243	unsigned char i; /* Loop Control */
	244
	245	/* bit position to send, start with most significant bit */
	246	bitpos = 0x80;
	247
	248	/* Send 8 bits to software SPI */
	249	for (i = 0; i < 8; i++) { /* Loop for 8 bits */
	250	immap->im_cpm.cp_pbdat \|= PB_SPISCK; /* Raise SCK */
	251
	252	if (n & bitpos)
	253	immap->im_cpm.cp_pbdat \|= PB_SPIMOSI; /* Set MOSI to 1 */
	254	else
	255	immap->im_cpm.cp_pbdat &= ~PB_SPIMOSI; /* Set MOSI to 0 */
	256	udelay (10);
	257
	258	immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */
	259	udelay (10);
	260
	261	bitpos >>= 1; /* Shift for next bit position */
	262	}
affae2bf WD	263	}
	264
	265	/* ------------------------------------------------------------------------- */
	266
ec4c544b WD	267	/* NOTE: soft_spi_read() assumes that the I/O lines are configured already */
ec4c544b WD	268	static unsigned char soft_spi_read (void)
affae2bf	269	{
ec4c544b WD	270	volatile immap_t immap = (immap_t ) CFG_IMMR;
	271
	272	unsigned char spi_byte = 0; /* Return value, assume success */
	273	unsigned char bitpos; /* bit position to receive */
	274	unsigned char i; /* Loop Control */
	275
	276	/* bit position to receive, start with most significant bit */
	277	bitpos = 0x80;
	278
	279	/* Read 8 bits here */
	280	for (i = 0; i < 8; i++) { /* Do 8 bits in loop */
	281	immap->im_cpm.cp_pbdat \|= PB_SPISCK; /* Raise SCK */
	282	udelay (10);
	283	if (immap->im_cpm.cp_pbdat & PB_SPIMISO) /* Get a bit of data */
	284	spi_byte \|= bitpos; /* Set data accordingly */
	285	immap->im_cpm.cp_pbdat &= ~PB_SPISCK; /* Lower SCK */
	286	udelay (10);
	287	bitpos >>= 1; /* Shift for next bit position */
	288	}
	289
	290	return spi_byte; /* Return the byte read */
affae2bf WD	291	}
	292
	293	/* ------------------------------------------------------------------------- */
	294
ec4c544b	295	void rtc_reset (void)
affae2bf	296	{
ec4c544b WD	297	return; /* nothing to do */
	298	}
	299
	300	#else /* not CONFIG_SXNI855T */
	301	/* ************************************************************************* */
	302
3f85ce27 WD	303	static unsigned char rtc_read (unsigned char reg);
	304	static void rtc_write (unsigned char reg, unsigned char val);
	305
ec4c544b WD	306	/* read clock time from DS1306 and return it in tmp /
	307	void rtc_get (struct rtc_time *tmp)
	308	{
	309	unsigned char sec, min, hour, mday, wday, mon, year;
	310
	311	sec = rtc_read (RTC_SECONDS);
	312	min = rtc_read (RTC_MINUTES);
	313	hour = rtc_read (RTC_HOURS);
	314	mday = rtc_read (RTC_DATE_OF_MONTH);
	315	wday = rtc_read (RTC_DAY_OF_WEEK);
	316	mon = rtc_read (RTC_MONTH);
	317	year = rtc_read (RTC_YEAR);
	318
	319	debug ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
	320	"hr: %02x min: %02x sec: %02x\n",
	321	year, mon, mday, wday, hour, min, sec);
	322	debug ("Alarms[0]: wday: %02x hour: %02x min: %02x sec: %02x\n",
	323	rtc_read (RTC_DAY_OF_WEEK_ALARM0),
	324	rtc_read (RTC_HOURS_ALARM0),
	325	rtc_read (RTC_MINUTES_ALARM0), rtc_read (RTC_SECONDS_ALARM0));
	326	debug ("Alarms[1]: wday: %02x hour: %02x min: %02x sec: %02x\n",
	327	rtc_read (RTC_DAY_OF_WEEK_ALARM1),
	328	rtc_read (RTC_HOURS_ALARM1),
	329	rtc_read (RTC_MINUTES_ALARM1), rtc_read (RTC_SECONDS_ALARM1));
	330
	331	tmp->tm_sec = bcd2bin (sec & 0x7F); /* convert Seconds */
	332	tmp->tm_min = bcd2bin (min & 0x7F); /* convert Minutes */
	333
	334	/* convert Hours */
	335	tmp->tm_hour = (hour & 0x40)
	336	? ((hour & 0x20) /* 12 hour mode */
	337	? bcd2bin (hour & 0x1F) + 11 /* PM */
	338	: bcd2bin (hour & 0x1F) - 1 /* AM */
	339	)
	340	: bcd2bin (hour & 0x3F); /* 24 hour mode */
	341
	342	tmp->tm_mday = bcd2bin (mday & 0x3F); /* convert Day of the Month */
	343	tmp->tm_mon = bcd2bin (mon & 0x1F); /* convert Month */
	344	tmp->tm_year = bcd2bin (year) + 2000; /* convert Year */
	345	tmp->tm_wday = bcd2bin (wday & 0x07) - 1; /* convert Day of the Week */
	346	tmp->tm_yday = 0;
	347	tmp->tm_isdst = 0;
	348
	349	debug ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	350	tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	351	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
affae2bf WD	352	}
	353
	354	/* ------------------------------------------------------------------------- */
	355
ec4c544b WD	356	/* set clock time from tmp in DS1306 RTC /
ec4c544b WD	357	void rtc_set (struct rtc_time *tmp)
affae2bf	358	{
ec4c544b WD	359	debug ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
	360	tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
	361	tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
	362
ec4c544b	363	rtc_write (RTC_SECONDS, bin2bcd (tmp->tm_sec));
da4849fb WD	364	rtc_write (RTC_MINUTES, bin2bcd (tmp->tm_min));
	365	rtc_write (RTC_HOURS, bin2bcd (tmp->tm_hour));
	366	rtc_write (RTC_DAY_OF_WEEK, bin2bcd (tmp->tm_wday + 1));
	367	rtc_write (RTC_DATE_OF_MONTH, bin2bcd (tmp->tm_mday));
	368	rtc_write (RTC_MONTH, bin2bcd (tmp->tm_mon));
	369	rtc_write (RTC_YEAR, bin2bcd (tmp->tm_year - 2000));
affae2bf WD	370	}
	371
	372	/* ------------------------------------------------------------------------- */
	373
ec4c544b WD	374	/* reset the DS1306 */
	375	void rtc_reset (void)
	376	{
	377	/* clear the control register */
	378	rtc_write (RTC_CONTROL, 0x00); /* 1st step: reset WP */
	379	rtc_write (RTC_CONTROL, 0x00); /* 2nd step: reset 1Hz, AIE1, AIE0 */
	380
	381	/* reset all alarms */
	382	rtc_write (RTC_SECONDS_ALARM0, 0x00);
	383	rtc_write (RTC_SECONDS_ALARM1, 0x00);
	384	rtc_write (RTC_MINUTES_ALARM0, 0x00);
	385	rtc_write (RTC_MINUTES_ALARM1, 0x00);
	386	rtc_write (RTC_HOURS_ALARM0, 0x00);
	387	rtc_write (RTC_HOURS_ALARM1, 0x00);
	388	rtc_write (RTC_DAY_OF_WEEK_ALARM0, 0x00);
	389	rtc_write (RTC_DAY_OF_WEEK_ALARM1, 0x00);
	390	}
	391
	392	/* ------------------------------------------------------------------------- */
affae2bf	393
ec4c544b WD	394	static unsigned char rtc_read (unsigned char reg)
	395	{
	396	unsigned char dout[2]; /* SPI Output Data Bytes */
	397	unsigned char din[2]; /* SPI Input Data Bytes */
affae2bf	398
ec4c544b	399	dout[0] = reg;
affae2bf	400
ec4c544b WD	401	if (spi_xfer (spi_chipsel[CFG_SPI_RTC_DEVID], 16, dout, din) != 0) {
	402	return 0;
	403	} else {
	404	return din[1];
	405	}
affae2bf WD	406	}
	407
	408	/* ------------------------------------------------------------------------- */
	409
ec4c544b	410	static void rtc_write (unsigned char reg, unsigned char val)
affae2bf	411	{
ec4c544b WD	412	unsigned char dout[2]; /* SPI Output Data Bytes */
ec4c544b WD	413	unsigned char din[2]; /* SPI Input Data Bytes */
affae2bf	414
ec4c544b WD	415	dout[0] = 0x80 \| reg;
ec4c544b WD	416	dout[1] = val;
affae2bf	417
ec4c544b WD	418	spi_xfer (spi_chipsel[CFG_SPI_RTC_DEVID], 16, dout, din);
ec4c544b WD	419	}
affae2bf	420
ec4c544b	421	#endif /* end of code exclusion (see #ifdef CONFIG_SXNI855T above) */
affae2bf	422
ec4c544b	423	/* ------------------------------------------------------------------------- */
affae2bf	424
ec4c544b WD	425	static unsigned char bcd2bin (unsigned char n)
	426	{
	427	return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
affae2bf WD	428	}
	429
	430	/* ------------------------------------------------------------------------- */
	431
ec4c544b	432	static unsigned int bin2bcd (unsigned int n)
affae2bf	433	{
ec4c544b	434	return (((n / 10) << 4) \| (n % 10));
affae2bf	435	}
affae2bf WD	436	/* ------------------------------------------------------------------------- */
	437
	438	#endif