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Commit | Line | Data |
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4549e789 | 1 | /* SPDX-License-Identifier: GPL-2.0 OR IBM-pibs */ |
46263f2d | 2 | /* |
46263f2d WD |
3 | * Additions (C) Copyright 2009 Industrie Dial Face S.p.A. |
4 | */ | |
214ec6bb WD |
5 | /*----------------------------------------------------------------------------+ |
6 | | | |
65bd0e28 | 7 | | File Name: miiphy.h |
214ec6bb | 8 | | |
65bd0e28 | 9 | | Function: Include file defining PHY registers. |
214ec6bb | 10 | | |
65bd0e28 | 11 | | Author: Mark Wisner |
214ec6bb | 12 | | |
214ec6bb WD |
13 | +----------------------------------------------------------------------------*/ |
14 | #ifndef _miiphy_h_ | |
15 | #define _miiphy_h_ | |
16 | ||
5f184715 | 17 | #include <common.h> |
8ef583a0 | 18 | #include <linux/mii.h> |
5f184715 | 19 | #include <linux/list.h> |
63ff004c | 20 | #include <net.h> |
5f184715 AF |
21 | #include <phy.h> |
22 | ||
f915c931 | 23 | int miiphy_read(const char *devname, unsigned char addr, unsigned char reg, |
298035df | 24 | unsigned short *value); |
f915c931 | 25 | int miiphy_write(const char *devname, unsigned char addr, unsigned char reg, |
298035df | 26 | unsigned short value); |
16a53238 | 27 | int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui, |
298035df | 28 | unsigned char *model, unsigned char *rev); |
16a53238 AF |
29 | int miiphy_reset(const char *devname, unsigned char addr); |
30 | int miiphy_speed(const char *devname, unsigned char addr); | |
31 | int miiphy_duplex(const char *devname, unsigned char addr); | |
32 | int miiphy_is_1000base_x(const char *devname, unsigned char addr); | |
6d0f6bcf | 33 | #ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN |
16a53238 | 34 | int miiphy_link(const char *devname, unsigned char addr); |
fc3e2165 | 35 | #endif |
214ec6bb | 36 | |
16a53238 | 37 | void miiphy_init(void); |
d9785c14 | 38 | |
16a53238 AF |
39 | int miiphy_set_current_dev(const char *devname); |
40 | const char *miiphy_get_current_dev(void); | |
5f184715 | 41 | struct mii_dev *mdio_get_current_dev(void); |
9215bb1f | 42 | struct list_head *mdio_get_list_head(void); |
5f184715 AF |
43 | struct mii_dev *miiphy_get_dev_by_name(const char *devname); |
44 | struct phy_device *mdio_phydev_for_ethname(const char *devname); | |
63ff004c | 45 | |
16a53238 | 46 | void miiphy_listdev(void); |
63ff004c | 47 | |
5f184715 | 48 | struct mii_dev *mdio_alloc(void); |
cb6baca7 | 49 | void mdio_free(struct mii_dev *bus); |
5f184715 | 50 | int mdio_register(struct mii_dev *bus); |
79e2a6a0 MS |
51 | |
52 | /** | |
53 | * mdio_register_seq - Register mdio bus with sequence number | |
54 | * @bus: mii device structure | |
55 | * @seq: sequence number | |
56 | * | |
57 | * Return: 0 if success, negative value if error | |
58 | */ | |
59 | int mdio_register_seq(struct mii_dev *bus, int seq); | |
cb6baca7 | 60 | int mdio_unregister(struct mii_dev *bus); |
5f184715 AF |
61 | void mdio_list_devices(void); |
62 | ||
4ba31ab3 LCM |
63 | #ifdef CONFIG_BITBANGMII |
64 | ||
65 | #define BB_MII_DEVNAME "bb_miiphy" | |
66 | ||
67 | struct bb_miiphy_bus { | |
f6add132 | 68 | char name[16]; |
4ba31ab3 LCM |
69 | int (*init)(struct bb_miiphy_bus *bus); |
70 | int (*mdio_active)(struct bb_miiphy_bus *bus); | |
71 | int (*mdio_tristate)(struct bb_miiphy_bus *bus); | |
72 | int (*set_mdio)(struct bb_miiphy_bus *bus, int v); | |
73 | int (*get_mdio)(struct bb_miiphy_bus *bus, int *v); | |
74 | int (*set_mdc)(struct bb_miiphy_bus *bus, int v); | |
75 | int (*delay)(struct bb_miiphy_bus *bus); | |
76 | #ifdef CONFIG_BITBANGMII_MULTI | |
77 | void *priv; | |
78 | #endif | |
79 | }; | |
80 | ||
81 | extern struct bb_miiphy_bus bb_miiphy_buses[]; | |
82 | extern int bb_miiphy_buses_num; | |
63ff004c | 83 | |
c65abc70 OP |
84 | /** |
85 | * bb_miiphy_init() - Initialize bit-banged MII bus driver | |
86 | * | |
87 | * It is called during the generic post-relocation init sequence. | |
88 | * | |
89 | * Return: 0 if OK | |
90 | */ | |
91 | int bb_miiphy_init(void); | |
92 | ||
dfcc496e JH |
93 | int bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg); |
94 | int bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg, | |
95 | u16 value); | |
4ba31ab3 | 96 | #endif |
214ec6bb WD |
97 | |
98 | /* phy seed setup */ | |
65bd0e28 | 99 | #define AUTO 99 |
298035df | 100 | #define _1000BASET 1000 |
65bd0e28 WD |
101 | #define _100BASET 100 |
102 | #define _10BASET 10 | |
103 | #define HALF 22 | |
104 | #define FULL 44 | |
214ec6bb WD |
105 | |
106 | /* phy register offsets */ | |
8ef583a0 MF |
107 | #define MII_MIPSCR 0x11 |
108 | ||
109 | /* MII_LPA */ | |
298035df LJ |
110 | #define PHY_ANLPAR_PSB_802_3 0x0001 |
111 | #define PHY_ANLPAR_PSB_802_9 0x0002 | |
112 | ||
8ef583a0 | 113 | /* MII_CTRL1000 masks */ |
71bc6e64 LJ |
114 | #define PHY_1000BTCR_1000FD 0x0200 |
115 | #define PHY_1000BTCR_1000HD 0x0100 | |
116 | ||
8ef583a0 | 117 | /* MII_STAT1000 masks */ |
298035df LJ |
118 | #define PHY_1000BTSR_MSCF 0x8000 |
119 | #define PHY_1000BTSR_MSCR 0x4000 | |
120 | #define PHY_1000BTSR_LRS 0x2000 | |
121 | #define PHY_1000BTSR_RRS 0x1000 | |
122 | #define PHY_1000BTSR_1000FD 0x0800 | |
123 | #define PHY_1000BTSR_1000HD 0x0400 | |
855a496f | 124 | |
71bc6e64 | 125 | /* phy EXSR */ |
8ef583a0 MF |
126 | #define ESTATUS_1000XF 0x8000 |
127 | #define ESTATUS_1000XH 0x4000 | |
71bc6e64 | 128 | |
c3452b50 AM |
129 | /** |
130 | * struct mdio_perdev_priv - Per-device class data for MDIO DM | |
131 | * | |
132 | * @mii_bus: Supporting MII legacy bus | |
133 | */ | |
134 | struct mdio_perdev_priv { | |
135 | struct mii_dev *mii_bus; | |
136 | }; | |
137 | ||
138 | /** | |
139 | * struct mdio_ops - MDIO bus operations | |
140 | * | |
141 | * @read: Read from a PHY register | |
142 | * @write: Write to a PHY register | |
143 | * @reset: Reset the MDIO bus, NULL if not supported | |
144 | */ | |
145 | struct mdio_ops { | |
146 | int (*read)(struct udevice *mdio_dev, int addr, int devad, int reg); | |
147 | int (*write)(struct udevice *mdio_dev, int addr, int devad, int reg, | |
148 | u16 val); | |
149 | int (*reset)(struct udevice *mdio_dev); | |
150 | }; | |
151 | ||
152 | #define mdio_get_ops(dev) ((struct mdio_ops *)(dev)->driver->ops) | |
153 | ||
154 | /** | |
155 | * dm_mdio_probe_devices - Call probe on all MII devices, currently used for | |
156 | * MDIO console commands. | |
157 | */ | |
158 | void dm_mdio_probe_devices(void); | |
159 | ||
160 | /** | |
161 | * dm_mdio_phy_connect - Wrapper over phy_connect for DM MDIO | |
162 | * | |
a5d32c37 AM |
163 | * @mdiodev: mdio device the PHY is accesible on |
164 | * @phyaddr: PHY address on MDIO bus | |
c3452b50 AM |
165 | * @ethdev: ethernet device to connect to the PHY |
166 | * @interface: MAC-PHY protocol | |
167 | * | |
185f812c | 168 | * Return: pointer to phy_device, or 0 on error |
c3452b50 | 169 | */ |
a5d32c37 | 170 | struct phy_device *dm_mdio_phy_connect(struct udevice *mdiodev, int phyaddr, |
c3452b50 AM |
171 | struct udevice *ethdev, |
172 | phy_interface_t interface); | |
173 | ||
2f624559 AM |
174 | /** |
175 | * dm_eth_phy_connect - Connect an Eth device to a PHY based on device tree | |
176 | * | |
177 | * Picks up the DT phy-handle and phy-mode from ethernet device node and | |
178 | * connects the ethernet device to the linked PHY. | |
179 | * | |
180 | * @ethdev: ethernet device | |
181 | * | |
185f812c | 182 | * Return: pointer to phy_device, or 0 on error |
2f624559 AM |
183 | */ |
184 | struct phy_device *dm_eth_phy_connect(struct udevice *ethdev); | |
185 | ||
8880edba AM |
186 | /* indicates none of the child buses is selected */ |
187 | #define MDIO_MUX_SELECT_NONE -1 | |
188 | ||
189 | /** | |
190 | * struct mdio_mux_ops - MDIO MUX operations | |
191 | * | |
192 | * @select: Selects a child bus | |
193 | * @deselect: Clean up selection. Optional, can be NULL | |
194 | */ | |
195 | struct mdio_mux_ops { | |
196 | int (*select)(struct udevice *mux, int cur, int sel); | |
197 | int (*deselect)(struct udevice *mux, int sel); | |
198 | }; | |
199 | ||
200 | #define mdio_mux_get_ops(dev) ((struct mdio_mux_ops *)(dev)->driver->ops) | |
201 | ||
202 | #endif |