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serial: bcm6858: add serial support
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dd84058d
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1menu "ARM architecture"
2 depends on ARM
3
4config SYS_ARCH
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5 default "arm"
6
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7config ARM64
8 bool
bb6b142f 9 select PHYS_64BIT
067716ba 10 select SYS_CACHE_SHIFT_6
016a954e 11
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SW
12if ARM64
13config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
15 help
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed
19 from almost any address. This logic relies on the relocation
20 information that is embedded into the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
e6c90448
SW
22
23config SYS_INIT_SP_BSS_OFFSET
24 int
25 help
26 U-Boot typically uses a hard-coded value for the stack pointer
27 before relocation. Define this option to instead calculate the
28 initial SP at run-time. This is useful to avoid hard-coding addresses
29 into U-Boot, so that can be loaded and executed at arbitrary
30 addresses and thus avoid using arbitrary addresses at runtime. This
31 option's value is the offset added to &_bss_start in order to
32 calculate the stack pointer. This offset should be large enough so
33 that the early malloc region, global data (gd), and early stack usage
34 do not overlap any appended DTB.
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35
36config LINUX_KERNEL_IMAGE_HEADER
37 bool
38 help
39 Place a Linux kernel image header at the start of the U-Boot binary.
40 The format of the header is described in the Linux kernel source at
41 Documentation/arm64/booting.txt. This feature is useful since the
42 image header reports the amount of memory (BSS and similar) that
43 U-Boot needs to use, but which isn't part of the binary.
44
45if LINUX_KERNEL_IMAGE_HEADER
46config LNX_KRNL_IMG_TEXT_OFFSET_BASE
47 hex
48 help
49 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
50 TEXT_OFFSET value written in to the Linux kernel image header.
51endif
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52endif
53
54config STATIC_RELA
55 bool
56 default y if ARM64 && !POSITION_INDEPENDENT
57
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58config DMA_ADDR_T_64BIT
59 bool
60 default y if ARM64
61
2e07c249 62config HAS_VBAR
e009bfa4 63 bool
2e07c249 64
62e92077 65config HAS_THUMB2
e009bfa4 66 bool
62e92077 67
111a6af9
PE
68# Used for compatibility with asm files copied from the kernel
69config ARM_ASM_UNIFIED
70 bool
71 default y
72
73# Used for compatibility with asm files copied from the kernel
74config THUMB2_KERNEL
75 bool
76
f4bcd767
LV
77config SYS_ARM_CACHE_CP15
78 bool "CP15 based cache enabling support"
79 help
80 Select this if your processor suports enabling caches by using
81 CP15 registers.
82
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83config SYS_ARM_MMU
84 bool "MMU-based Paged Memory Management Support"
f4bcd767 85 select SYS_ARM_CACHE_CP15
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86 help
87 Select if you want MMU-based virtualised addressing space
88 support by paged memory management.
89
f2ef2043
LV
90config SYS_ARM_MPU
91 bool 'Use the ARM v7 PMSA Compliant MPU'
92 help
93 Some ARM systems without an MMU have instead a Memory Protection
94 Unit (MPU) that defines the type and permissions for regions of
95 memory.
96 If your CPU has an MPU then you should choose 'y' here unless you
97 know that you do not want to use the MPU.
98
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99# If set, the workarounds for these ARM errata are applied early during U-Boot
100# startup. Note that in general these options force the workarounds to be
101# applied; no CPU-type/version detection exists, unlike the similar options in
102# the Linux kernel. Do not set these options unless they apply! Also note that
103# the following can be machine specific errata. These do have ability to
104# provide rudimentary version and machine specific checks, but expect no
105# product checks:
106# CONFIG_ARM_ERRATA_430973
107# CONFIG_ARM_ERRATA_454179
108# CONFIG_ARM_ERRATA_621766
109# CONFIG_ARM_ERRATA_798870
110# CONFIG_ARM_ERRATA_801819
7b37a9c7 111# CONFIG_ARM_CORTEX_A8_CVE_2017_5715
c2ca3fdf 112# CONFIG_ARM_CORTEX_A15_CVE_2017_5715
7b37a9c7 113
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114config ARM_ERRATA_430973
115 bool
116
117config ARM_ERRATA_454179
118 bool
119
120config ARM_ERRATA_621766
121 bool
122
123config ARM_ERRATA_716044
124 bool
125
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126config ARM_ERRATA_725233
127 bool
128
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129config ARM_ERRATA_742230
130 bool
131
132config ARM_ERRATA_743622
133 bool
134
135config ARM_ERRATA_751472
136 bool
137
138config ARM_ERRATA_761320
139 bool
140
141config ARM_ERRATA_773022
142 bool
143
144config ARM_ERRATA_774769
145 bool
146
147config ARM_ERRATA_794072
148 bool
149
150config ARM_ERRATA_798870
151 bool
152
153config ARM_ERRATA_801819
154 bool
155
156config ARM_ERRATA_826974
157 bool
158
159config ARM_ERRATA_828024
160 bool
161
162config ARM_ERRATA_829520
163 bool
164
165config ARM_ERRATA_833069
166 bool
167
168config ARM_ERRATA_833471
169 bool
170
11d94319 171config ARM_ERRATA_845369
6e7bdde4 172 bool
11d94319 173
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NM
174config ARM_ERRATA_852421
175 bool
176
177config ARM_ERRATA_852423
178 bool
179
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180config ARM_ERRATA_855873
181 bool
182
7b37a9c7
NM
183config ARM_CORTEX_A8_CVE_2017_5715
184 bool
185
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NM
186config ARM_CORTEX_A15_CVE_2017_5715
187 bool
188
2e07c249 189config CPU_ARM720T
e009bfa4 190 bool
067716ba 191 select SYS_CACHE_SHIFT_5
7240b80e 192 imply SYS_ARM_MMU
2e07c249
GS
193
194config CPU_ARM920T
e009bfa4 195 bool
067716ba 196 select SYS_CACHE_SHIFT_5
7240b80e 197 imply SYS_ARM_MMU
2e07c249
GS
198
199config CPU_ARM926EJS
e009bfa4 200 bool
067716ba 201 select SYS_CACHE_SHIFT_5
7240b80e 202 imply SYS_ARM_MMU
2e07c249
GS
203
204config CPU_ARM946ES
e009bfa4 205 bool
067716ba 206 select SYS_CACHE_SHIFT_5
7240b80e 207 imply SYS_ARM_MMU
2e07c249
GS
208
209config CPU_ARM1136
e009bfa4 210 bool
067716ba 211 select SYS_CACHE_SHIFT_5
7240b80e 212 imply SYS_ARM_MMU
2e07c249
GS
213
214config CPU_ARM1176
e009bfa4
TR
215 bool
216 select HAS_VBAR
067716ba 217 select SYS_CACHE_SHIFT_5
7240b80e 218 imply SYS_ARM_MMU
2e07c249 219
acf15001 220config CPU_V7A
e009bfa4 221 bool
e009bfa4 222 select HAS_THUMB2
5ed063d1 223 select HAS_VBAR
067716ba 224 select SYS_CACHE_SHIFT_6
7240b80e 225 imply SYS_ARM_MMU
2e07c249 226
12d8a729 227config CPU_V7M
228 bool
e009bfa4 229 select HAS_THUMB2
f2ef2043 230 select SYS_ARM_MPU
5ed063d1 231 select SYS_CACHE_SHIFT_5
ea37f0b3 232 select SYS_THUMB_BUILD
5ed063d1 233 select THUMB2_KERNEL
12d8a729 234
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235config CPU_V7R
236 bool
237 select HAS_THUMB2
f2ef2043 238 select SYS_ARM_CACHE_CP15
5ed063d1
MS
239 select SYS_ARM_MPU
240 select SYS_CACHE_SHIFT_6
4bbd6b1d 241
2e07c249 242config CPU_PXA
e009bfa4 243 bool
067716ba 244 select SYS_CACHE_SHIFT_5
7240b80e 245 imply SYS_ARM_MMU
2e07c249
GS
246
247config CPU_SA1100
e009bfa4 248 bool
067716ba 249 select SYS_CACHE_SHIFT_5
7240b80e 250 imply SYS_ARM_MMU
2e07c249
GS
251
252config SYS_CPU
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253 default "arm720t" if CPU_ARM720T
254 default "arm920t" if CPU_ARM920T
255 default "arm926ejs" if CPU_ARM926EJS
256 default "arm946es" if CPU_ARM946ES
257 default "arm1136" if CPU_ARM1136
258 default "arm1176" if CPU_ARM1176
acf15001 259 default "armv7" if CPU_V7A
4bbd6b1d 260 default "armv7" if CPU_V7R
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261 default "armv7m" if CPU_V7M
262 default "pxa" if CPU_PXA
263 default "sa1100" if CPU_SA1100
01541eec 264 default "armv8" if ARM64
2e07c249 265
66020a67
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266config SYS_ARM_ARCH
267 int
268 default 4 if CPU_ARM720T
269 default 4 if CPU_ARM920T
270 default 5 if CPU_ARM926EJS
271 default 5 if CPU_ARM946ES
272 default 6 if CPU_ARM1136
273 default 6 if CPU_ARM1176
acf15001 274 default 7 if CPU_V7A
66020a67 275 default 7 if CPU_V7M
4bbd6b1d 276 default 7 if CPU_V7R
66020a67
MV
277 default 5 if CPU_PXA
278 default 4 if CPU_SA1100
279 default 8 if ARM64
280
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281config SYS_CACHE_SHIFT_5
282 bool
283
284config SYS_CACHE_SHIFT_6
285 bool
286
287config SYS_CACHE_SHIFT_7
288 bool
289
290config SYS_CACHELINE_SIZE
291 int
292 default 128 if SYS_CACHE_SHIFT_7
293 default 64 if SYS_CACHE_SHIFT_6
294 default 32 if SYS_CACHE_SHIFT_5
295
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296config SYS_ARCH_TIMER
297 bool "ARM Generic Timer support"
acf15001 298 depends on CPU_V7A || ARM64
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AP
299 default y if ARM64
300 help
301 The ARM Generic Timer (aka arch-timer) provides an architected
302 interface to a timer source on an SoC.
303 It is mandantory for ARMv8 implementation and widely available
304 on ARMv7 systems.
305
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MY
306config ARM_SMCCC
307 bool "Support for ARM SMC Calling Convention (SMCCC)"
acf15001 308 depends on CPU_V7A || ARM64
573a3811 309 select ARM_PSCI_FW
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310 help
311 Say Y here if you want to enable ARM SMC Calling Convention.
312 This should be enabled if U-Boot needs to communicate with system
313 firmware (for example, PSCI) according to SMCCC.
314
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315config SEMIHOSTING
316 bool "support boot from semihosting"
317 help
318 In emulated environments, semihosting is a way for
319 the hosted environment to call out to the emulator to
320 retrieve files from the host machine.
321
3a649407
TR
322config SYS_THUMB_BUILD
323 bool "Build U-Boot using the Thumb instruction set"
324 depends on !ARM64
325 help
326 Use this flag to build U-Boot using the Thumb instruction set for
327 ARM architectures. Thumb instruction set provides better code
328 density. For ARM architectures that support Thumb2 this flag will
329 result in Thumb2 code generated by GCC.
330
331config SPL_SYS_THUMB_BUILD
332 bool "Build SPL using the Thumb instruction set"
333 default y if SYS_THUMB_BUILD
334 depends on !ARM64
335 help
336 Use this flag to build SPL using the Thumb instruction set for
337 ARM architectures. Thumb instruction set provides better code
338 density. For ARM architectures that support Thumb2 this flag will
339 result in Thumb2 code generated by GCC.
340
f3e9bec8
PF
341config SYS_L2CACHE_OFF
342 bool "L2cache off"
343 help
344 If SoC does not support L2CACHE or one do not want to enable
345 L2CACHE, choose this option.
346
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AP
347config ENABLE_ARM_SOC_BOOT0_HOOK
348 bool "prepare BOOT0 header"
349 help
350 If the SoC's BOOT0 requires a header area filled with (magic)
7d531e8a
SG
351 values, then choose this option, and create a file included as
352 <asm/arch/boot0.h> which contains the required assembler code.
cdaa633f 353
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AP
354config ARM_CORTEX_CPU_IS_UP
355 bool
356 default n
357
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FE
358config USE_ARCH_MEMCPY
359 bool "Use an assembly optimized implementation of memcpy"
40d5534c
TR
360 default y
361 depends on !ARM64
362 help
363 Enable the generation of an optimized version of memcpy.
364 Such implementation may be faster under some conditions
365 but may increase the binary size.
366
367config SPL_USE_ARCH_MEMCPY
f8136e68 368 bool "Use an assembly optimized implementation of memcpy for SPL"
40d5534c 369 default y if USE_ARCH_MEMCPY
085be482 370 depends on !ARM64
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FE
371 help
372 Enable the generation of an optimized version of memcpy.
373 Such implementation may be faster under some conditions
374 but may increase the binary size.
375
376config USE_ARCH_MEMSET
377 bool "Use an assembly optimized implementation of memset"
40d5534c
TR
378 default y
379 depends on !ARM64
380 help
381 Enable the generation of an optimized version of memset.
382 Such implementation may be faster under some conditions
383 but may increase the binary size.
384
385config SPL_USE_ARCH_MEMSET
f8136e68 386 bool "Use an assembly optimized implementation of memset for SPL"
40d5534c 387 default y if USE_ARCH_MEMSET
085be482 388 depends on !ARM64
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FE
389 help
390 Enable the generation of an optimized version of memset.
391 Such implementation may be faster under some conditions
392 but may increase the binary size.
393
ec6617c3
AW
394config ARM64_SUPPORT_AARCH32
395 bool "ARM64 system support AArch32 execution state"
396 default y if ARM64 && !TARGET_THUNDERX_88XX
397 help
398 This ARM64 system supports AArch32 execution state.
399
dd84058d
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400choice
401 prompt "Target select"
b928e658 402 default TARGET_HIKEY
dd84058d 403
4614b891
MY
404config ARCH_AT91
405 bool "Atmel AT91"
f58e9460 406 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
dd84058d
MY
407
408config TARGET_EDB93XX
409 bool "Support edb93xx"
2e07c249 410 select CPU_ARM920T
884f9013 411 select PL010_SERIAL
dd84058d 412
dd84058d
MY
413config TARGET_ASPENITE
414 bool "Support aspenite"
2e07c249 415 select CPU_ARM926EJS
dd84058d
MY
416
417config TARGET_GPLUGD
418 bool "Support gplugd"
2e07c249 419 select CPU_ARM926EJS
dd84058d 420
3491ba63
MY
421config ARCH_DAVINCI
422 bool "TI DaVinci"
2e07c249 423 select CPU_ARM926EJS
15dc63d6 424 imply CMD_SAVES
3491ba63
MY
425 help
426 Support for TI's DaVinci platform.
dd84058d 427
47539e23
MY
428config KIRKWOOD
429 bool "Marvell Kirkwood"
4585601a 430 select ARCH_MISC_INIT
5ed063d1
MS
431 select BOARD_EARLY_INIT_F
432 select CPU_ARM926EJS
dd84058d 433
c3d89140 434config ARCH_MVEBU
21b29fc6 435 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
9cffb233 436 select DM
e3b9c98a 437 select DM_ETH
1d51ea19 438 select DM_SERIAL
09a54c00
SR
439 select DM_SPI
440 select DM_SPI_FLASH
5ed063d1
MS
441 select OF_CONTROL
442 select OF_SEPARATE
f1b1f770 443 select SPI
08a00cba 444 imply CMD_DM
a4884831 445
dd84058d
MY
446config TARGET_APF27
447 bool "Support apf27"
2e07c249 448 select CPU_ARM926EJS
02627356 449 select SUPPORT_SPL
dd84058d 450
22f2be7a
MY
451config ORION5X
452 bool "Marvell Orion"
2e07c249 453 select CPU_ARM926EJS
dd84058d 454
dd84058d
MY
455config TARGET_SPEAR300
456 bool "Support spear300"
a5d67547 457 select BOARD_EARLY_INIT_F
5ed063d1 458 select CPU_ARM926EJS
d10fc50f 459 select PL011_SERIAL
5ed063d1 460 imply CMD_SAVES
dd84058d
MY
461
462config TARGET_SPEAR310
463 bool "Support spear310"
a5d67547 464 select BOARD_EARLY_INIT_F
5ed063d1 465 select CPU_ARM926EJS
d10fc50f 466 select PL011_SERIAL
5ed063d1 467 imply CMD_SAVES
dd84058d
MY
468
469config TARGET_SPEAR320
470 bool "Support spear320"
a5d67547 471 select BOARD_EARLY_INIT_F
5ed063d1 472 select CPU_ARM926EJS
d10fc50f 473 select PL011_SERIAL
5ed063d1 474 imply CMD_SAVES
dd84058d
MY
475
476config TARGET_SPEAR600
477 bool "Support spear600"
a5d67547 478 select BOARD_EARLY_INIT_F
5ed063d1 479 select CPU_ARM926EJS
d10fc50f 480 select PL011_SERIAL
5ed063d1 481 imply CMD_SAVES
dd84058d 482
9fa32b12
VM
483config TARGET_STV0991
484 bool "Support stv0991"
acf15001 485 select CPU_V7A
cac0ca76
MY
486 select DM
487 select DM_SERIAL
e67abcaa
VM
488 select DM_SPI
489 select DM_SPI_FLASH
5ed063d1 490 select PL01X_SERIAL
f1b1f770 491 select SPI
e67abcaa 492 select SPI_FLASH
08a00cba 493 imply CMD_DM
9fa32b12 494
dd84058d
MY
495config TARGET_X600
496 bool "Support x600"
e5ec4815 497 select BOARD_LATE_INIT
2e07c249 498 select CPU_ARM926EJS
d10fc50f 499 select PL011_SERIAL
5ed063d1 500 select SUPPORT_SPL
dd84058d 501
dd84058d
MY
502config TARGET_WOODBURN
503 bool "Support woodburn"
2e07c249 504 select CPU_ARM1136
dd84058d
MY
505
506config TARGET_WOODBURN_SD
507 bool "Support woodburn_sd"
2e07c249 508 select CPU_ARM1136
02627356 509 select SUPPORT_SPL
dd84058d
MY
510
511config TARGET_FLEA3
512 bool "Support flea3"
2e07c249 513 select CPU_ARM1136
dd84058d
MY
514
515config TARGET_MX35PDK
516 bool "Support mx35pdk"
e5ec4815 517 select BOARD_LATE_INIT
2e07c249 518 select CPU_ARM1136
dd84058d 519
ddf6bd48
MY
520config ARCH_BCM283X
521 bool "Broadcom BCM283X family"
58d423b8 522 select DM
58d423b8 523 select DM_GPIO
5ed063d1 524 select DM_SERIAL
76709096 525 select OF_CONTROL
cf2c7784 526 select PL01X_SERIAL
ae5326a6 527 select SERIAL_SEARCH_ALL
08a00cba 528 imply CMD_DM
91d27a17 529 imply FAT_WRITE
46414296 530
dd84058d
MY
531config TARGET_VEXPRESS_CA15_TC2
532 bool "Support vexpress_ca15_tc2"
acf15001 533 select CPU_V7A
ea624e19
HG
534 select CPU_V7_HAS_NONSEC
535 select CPU_V7_HAS_VIRT
d10fc50f 536 select PL011_SERIAL
dd84058d 537
894c3ad2
TF
538config ARCH_BCMSTB
539 bool "Broadcom BCM7XXX family"
540 select CPU_V7A
541 select DM
542 select OF_CONTROL
543 select OF_PRIOR_STAGE
08a00cba 544 imply CMD_DM
894c3ad2
TF
545 help
546 This enables support for Broadcom ARM-based set-top box
547 chipsets, including the 7445 family of chips.
548
dd84058d
MY
549config TARGET_VEXPRESS_CA5X2
550 bool "Support vexpress_ca5x2"
acf15001 551 select CPU_V7A
d10fc50f 552 select PL011_SERIAL
dd84058d
MY
553
554config TARGET_VEXPRESS_CA9X4
555 bool "Support vexpress_ca9x4"
acf15001 556 select CPU_V7A
d10fc50f 557 select PL011_SERIAL
dd84058d 558
43486e4c
SR
559config TARGET_BCM23550_W1D
560 bool "Support bcm23550_w1d"
acf15001 561 select CPU_V7A
221a949e 562 imply CRC32_VERIFY
91d27a17 563 imply FAT_WRITE
43486e4c 564
dd84058d
MY
565config TARGET_BCM28155_AP
566 bool "Support bcm28155_ap"
acf15001 567 select CPU_V7A
221a949e 568 imply CRC32_VERIFY
91d27a17 569 imply FAT_WRITE
dd84058d 570
abb1678c
SR
571config TARGET_BCMCYGNUS
572 bool "Support bcmcygnus"
acf15001 573 select CPU_V7A
5ed063d1
MS
574 imply BCM_SF2_ETH
575 imply BCM_SF2_ETH_GMAC
551c3934 576 imply CMD_HASH
5ed063d1 577 imply CRC32_VERIFY
91d27a17 578 imply FAT_WRITE
221a949e 579 imply HASH_VERIFY
c89782dc 580 imply NETDEVICES
9dec5270 581
abb1678c
SR
582config TARGET_BCMNSP
583 bool "Support bcmnsp"
acf15001 584 select CPU_V7A
9dec5270 585
274bced8
JM
586config TARGET_BCMNS2
587 bool "Support Broadcom Northstar2"
588 select ARM64
589 help
590 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
591 ARMv8 Cortex-A57 processors targeting a broad range of networking
592 applications
593
72df68cc
MY
594config ARCH_EXYNOS
595 bool "Samsung EXYNOS"
58d423b8 596 select DM
5ed063d1 597 select DM_GPIO
fc47cf9d 598 select DM_I2C
5ed063d1 599 select DM_KEYBOARD
58d423b8
MY
600 select DM_SERIAL
601 select DM_SPI
5ed063d1 602 select DM_SPI_FLASH
f1b1f770 603 select SPI
08a00cba 604 imply CMD_DM
91d27a17 605 imply FAT_WRITE
dd84058d 606
311757be
SG
607config ARCH_S5PC1XX
608 bool "Samsung S5PC1XX"
acf15001 609 select CPU_V7A
58d423b8 610 select DM
58d423b8 611 select DM_GPIO
08848e9c 612 select DM_I2C
5ed063d1 613 select DM_SERIAL
08a00cba 614 imply CMD_DM
311757be 615
ef2b694c
MY
616config ARCH_HIGHBANK
617 bool "Calxeda Highbank"
acf15001 618 select CPU_V7A
d10fc50f 619 select PL011_SERIAL
dd84058d 620
5cbbd9bd
MY
621config ARCH_INTEGRATOR
622 bool "ARM Ltd. Integrator family"
3f394e70
LW
623 select DM
624 select DM_SERIAL
cf2c7784 625 select PL01X_SERIAL
08a00cba 626 imply CMD_DM
5cbbd9bd 627
c338f09e
MY
628config ARCH_KEYSTONE
629 bool "TI Keystone"
5ed063d1 630 select CMD_POWEROFF
acf15001 631 select CPU_V7A
02627356 632 select SUPPORT_SPL
7842b6a9 633 select SYS_ARCH_TIMER
5ed063d1 634 select SYS_THUMB_BUILD
d56b4b19 635 imply CMD_MTDPARTS
15dc63d6 636 imply CMD_SAVES
5ed063d1 637 imply FIT
dd84058d 638
586bde93
LV
639config ARCH_K3
640 bool "Texas Instruments' K3 Architecture"
641 select SPL
642 select SUPPORT_SPL
643 select FIT
644
a93fbf4a
MY
645config ARCH_OMAP2PLUS
646 bool "TI OMAP2+"
acf15001 647 select CPU_V7A
0680f1b1 648 select SPL_BOARD_INIT if SPL
ff6c3125 649 select SPL_STACK_R if SPL
a93fbf4a
MY
650 select SUPPORT_SPL
651 imply FIT
652
bfcef28a
BG
653config ARCH_MESON
654 bool "Amlogic Meson"
7325f6cf 655 imply DISTRO_DEFAULTS
bfcef28a
BG
656 help
657 Support for the Meson SoC family developed by Amlogic Inc.,
658 targeted at media players and tablet computers. We currently
659 support the S905 (GXBaby) 64-bit SoC.
660
ee54dfea
VZ
661config ARCH_LPC32XX
662 bool "NXP LPC32xx platform"
663 select CPU_ARM926EJS
664 select DM
665 select DM_GPIO
666 select DM_SERIAL
667 select SPL_DM if SPL
668 select SUPPORT_SPL
669 imply CMD_DM
670
b2b8b9be
PF
671config ARCH_IMX8
672 bool "NXP i.MX8 platform"
673 select ARM64
674 select DM
675 select OF_CONTROL
676
7a7391fd
PF
677config ARCH_MX8M
678 bool "NXP i.MX8M platform"
679 select ARM64
680 select DM
681 select SUPPORT_SPL
08a00cba 682 imply CMD_DM
7a7391fd 683
c5343d4e
SA
684config ARCH_MX23
685 bool "NXP i.MX23 family"
686 select CPU_ARM926EJS
687 select PL011_SERIAL
688 select SUPPORT_SPL
689
07df697e
FE
690config ARCH_MX25
691 bool "NXP MX25"
692 select CPU_ARM926EJS
8bbff6a7 693 imply MXC_GPIO
07df697e 694
25c5b4e1
SA
695config ARCH_MX28
696 bool "NXP i.MX28 family"
697 select CPU_ARM926EJS
698 select PL011_SERIAL
699 select SUPPORT_SPL
700
3159ec64
ML
701config ARCH_MX31
702 bool "NXP i.MX31 family"
703 select CPU_ARM1136
704
e90a08da 705config ARCH_MX7ULP
6e7bdde4 706 bool "NXP MX7ULP"
acf15001 707 select CPU_V7A
e90a08da 708 select ROM_UNIFIED_SECTIONS
8bbff6a7 709 imply MXC_GPIO
e90a08da 710
1a8150d4
AA
711config ARCH_MX7
712 bool "Freescale MX7"
5ed063d1
MS
713 select ARCH_MISC_INIT
714 select BOARD_EARLY_INIT_F
acf15001 715 select CPU_V7A
2c2e2c9e
YS
716 select SYS_FSL_HAS_SEC if SECURE_BOOT
717 select SYS_FSL_SEC_COMPAT_4
90b80386 718 select SYS_FSL_SEC_LE
8bbff6a7 719 imply MXC_GPIO
1a8150d4 720
89ebc821
BB
721config ARCH_MX6
722 bool "Freescale MX6"
acf15001 723 select CPU_V7A
2c2e2c9e
YS
724 select SYS_FSL_HAS_SEC if SECURE_BOOT
725 select SYS_FSL_SEC_COMPAT_4
90b80386 726 select SYS_FSL_SEC_LE
3a649407 727 select SYS_THUMB_BUILD if SPL
8bbff6a7 728 imply MXC_GPIO
89ebc821 729
b529993e
PT
730if ARCH_MX6
731config SPL_LDSCRIPT
6e7bdde4 732 default "arch/arm/mach-omap2/u-boot-spl.lds"
b529993e
PT
733endif
734
424ee3d1
AR
735config ARCH_MX5
736 bool "Freescale MX5"
a5d67547 737 select BOARD_EARLY_INIT_F
5ed063d1 738 select CPU_V7A
8bbff6a7 739 imply MXC_GPIO
424ee3d1 740
97775d26
MS
741config ARCH_OWL
742 bool "Actions Semi OWL SoCs"
743 select ARM64
744 select DM
745 select DM_SERIAL
746 select OF_CONTROL
08a00cba 747 imply CMD_DM
97775d26 748
32f11829
TT
749config ARCH_QEMU
750 bool "QEMU Virtual Platform"
32f11829
TT
751 select DM
752 select DM_SERIAL
753 select OF_CONTROL
cf2c7784 754 select PL01X_SERIAL
08a00cba 755 imply CMD_DM
a47c1b5b
AT
756 imply DM_RTC
757 imply RTC_PL031
32f11829 758
1cc95f6e 759config ARCH_RMOBILE
f40b9898 760 bool "Renesas ARM SoCs"
5ed063d1 761 select BOARD_EARLY_INIT_F
1cc95f6e
NI
762 select DM
763 select DM_SERIAL
08a00cba 764 imply CMD_DM
91d27a17 765 imply FAT_WRITE
3a649407 766 imply SYS_THUMB_BUILD
dd84058d 767
9702ec00
EP
768config TARGET_S32V234EVB
769 bool "Support s32v234evb"
770 select ARM64
c01e4a1a 771 select SYS_FSL_ERRATUM_ESDHC111
9702ec00 772
08592136
MK
773config ARCH_SNAPDRAGON
774 bool "Qualcomm Snapdragon SoCs"
775 select ARM64
776 select DM
777 select DM_GPIO
778 select DM_SERIAL
5ed063d1 779 select MSM_SMEM
08592136
MK
780 select OF_CONTROL
781 select OF_SEPARATE
654dd4a8 782 select SMEM
5ed063d1 783 select SPMI
08a00cba 784 imply CMD_DM
08592136 785
7865f4b0
MY
786config ARCH_SOCFPGA
787 bool "Altera SOCFPGA family"
48befc00 788 select ARCH_EARLY_INIT_R
d6a61da4 789 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
5ed063d1 790 select ARM64 if TARGET_SOCFPGA_STRATIX10
a684729a 791 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1d9aa3e5 792 select DM
73172753 793 select DM_SERIAL
a684729a 794 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
48befc00 795 select OF_CONTROL
00057eea 796 select SPL_DM_RESET if DM_RESET
5ed063d1 797 select SPL_DM_SERIAL
48befc00
MV
798 select SPL_LIBCOMMON_SUPPORT
799 select SPL_LIBDISK_SUPPORT
800 select SPL_LIBGENERIC_SUPPORT
801 select SPL_MMC_SUPPORT if DM_MMC
802 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
803 select SPL_OF_CONTROL
5ed063d1 804 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
48befc00
MV
805 select SPL_SERIAL_SUPPORT
806 select SPL_SPI_FLASH_SUPPORT if SPL_SPI_SUPPORT
807 select SPL_SPI_SUPPORT if DM_SPI
808 select SPL_WATCHDOG_SUPPORT
809 select SUPPORT_SPL
73172753 810 select SYS_NS16550
a684729a 811 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
08a00cba 812 imply CMD_DM
d56b4b19 813 imply CMD_MTDPARTS
221a949e 814 imply CRC32_VERIFY
fef4a545
SG
815 imply DM_SPI
816 imply DM_SPI_FLASH
91d27a17 817 imply FAT_WRITE
fef4a545 818 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
f48db4ed 819 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
dd84058d 820
2c7e3b90
IC
821config ARCH_SUNXI
822 bool "Support sunxi (Allwinner) SoCs"
d6a0c78a 823 select BINMAN
88bb800d 824 select CMD_GPIO
0878a8a7 825 select CMD_MMC if MMC
2997ee50 826 select CMD_USB if DISTRO_DEFAULTS
b6006baf 827 select DM
45368827 828 select DM_ETH
211d57a4
HG
829 select DM_GPIO
830 select DM_KEYBOARD
45368827 831 select DM_SERIAL
2997ee50 832 select DM_USB if DISTRO_DEFAULTS
d75111a7 833 select OF_BOARD_SETUP
b6006baf
HG
834 select OF_CONTROL
835 select OF_SEPARATE
6f6b7cfa 836 select SPECIFY_CONSOLE_INDEX
ab43de80
TR
837 select SPL_STACK_R if SPL
838 select SPL_SYS_MALLOC_SIMPLE if SPL
3a649407 839 select SPL_SYS_THUMB_BUILD if !ARM64
5ed063d1 840 select SYS_NS16550
ce2e44d8 841 select SYS_THUMB_BUILD if !ARM64
2997ee50 842 select USB if DISTRO_DEFAULTS
2997ee50 843 select USB_KEYBOARD if DISTRO_DEFAULTS
5ed063d1 844 select USB_STORAGE if DISTRO_DEFAULTS
8c7d2296 845 select USE_TINY_PRINTF
08a00cba 846 imply CMD_DM
a12fb0e3 847 imply CMD_GPT
c6cca10b 848 imply CMD_UBI if NAND
7325f6cf 849 imply DISTRO_DEFAULTS
91d27a17 850 imply FAT_WRITE
2f13cf35 851 imply FIT
eff264d7 852 imply OF_LIBFDT_OVERLAY
af83a604
MY
853 imply PRE_CONSOLE_BUFFER
854 imply SPL_GPIO_SUPPORT
855 imply SPL_LIBCOMMON_SUPPORT
856 imply SPL_LIBDISK_SUPPORT
857 imply SPL_LIBGENERIC_SUPPORT
4aa2ba3a 858 imply SPL_MMC_SUPPORT if MMC
af83a604
MY
859 imply SPL_POWER_SUPPORT
860 imply SPL_SERIAL_SUPPORT
654b02b1 861 imply USB_GADGET
8ebe4f42 862
ec48b6c9
MS
863config ARCH_VERSAL
864 bool "Support Xilinx Versal Platform"
865 select ARM64
866 select CLK
867 select DM
868 select DM_SERIAL
869 select OF_CONTROL
870
7966b437
SA
871config ARCH_VF610
872 bool "Freescale Vybrid"
acf15001 873 select CPU_V7A
c01e4a1a 874 select SYS_FSL_ERRATUM_ESDHC111
d56b4b19 875 imply CMD_MTDPARTS
5bbc265b 876 imply NAND
e7b860fa 877
5ca269a4 878config ARCH_ZYNQ
b8d4497f 879 bool "Xilinx Zynq based platform"
5ed063d1 880 select BOARD_EARLY_INIT_F if WDT
5ed063d1
MS
881 select CLK
882 select CLK_ZYNQ
acf15001 883 select CPU_V7A
8981f05c 884 select DM
c4a142f4 885 select DM_ETH if NET
c4a142f4 886 select DM_MMC if MMC
42800ffa 887 select DM_SERIAL
5ed063d1 888 select DM_SPI
9f7a4502 889 select DM_SPI_FLASH
dec49e86 890 select DM_USB if USB
5ed063d1 891 select OF_CONTROL
f1b1f770 892 select SPI
5ed063d1
MS
893 select SPL_BOARD_INIT if SPL
894 select SPL_CLK if SPL
895 select SPL_DM if SPL
896 select SPL_OF_CONTROL if SPL
897 select SPL_SEPARATE_BSS if SPL
898 select SUPPORT_SPL
899 imply ARCH_EARLY_INIT_R
8eb55e19 900 imply BOARD_LATE_INIT
d315628e 901 imply CMD_CLK
08a00cba 902 imply CMD_DM
72c3033f 903 imply CMD_SPL
5ed063d1 904 imply FAT_WRITE
dd84058d 905
1d6c54ec
MS
906config ARCH_ZYNQMP_R5
907 bool "Xilinx ZynqMP R5 based platform"
5ed063d1 908 select CLK
1d6c54ec 909 select CPU_V7R
1d6c54ec
MS
910 select DM
911 select DM_SERIAL
5ed063d1 912 select OF_CONTROL
08a00cba 913 imply CMD_DM
1d6c54ec 914
0b54a9dd 915config ARCH_ZYNQMP
b8d4497f 916 bool "Xilinx ZynqMP based platform"
84c7204b 917 select ARM64
5ed063d1 918 select CLK
c2490bf5 919 select DM
c2490bf5 920 select DM_SERIAL
5ed063d1
MS
921 select DM_USB if USB
922 select OF_CONTROL
0680f1b1 923 select SPL_BOARD_INIT if SPL
2f03968e 924 select SPL_CLK if SPL
5ed063d1 925 select SUPPORT_SPL
8eb55e19 926 imply BOARD_LATE_INIT
08a00cba 927 imply CMD_DM
91d27a17 928 imply FAT_WRITE
22270ca0 929 imply MP
84c7204b 930
ddd960e6
MY
931config TEGRA
932 bool "NVIDIA Tegra"
7325f6cf 933 imply DISTRO_DEFAULTS
91d27a17 934 imply FAT_WRITE
dd84058d 935
f91afc4d 936config TARGET_VEXPRESS64_AEMV8A
dd84058d 937 bool "Support vexpress_aemv8a"
016a954e 938 select ARM64
cf2c7784 939 select PL01X_SERIAL
dd84058d 940
f91afc4d
LW
941config TARGET_VEXPRESS64_BASE_FVP
942 bool "Support Versatile Express ARMv8a FVP BASE model"
943 select ARM64
cf2c7784 944 select PL01X_SERIAL
5ed063d1 945 select SEMIHOSTING
f91afc4d 946
fc04b923
RH
947config TARGET_VEXPRESS64_BASE_FVP_DRAM
948 bool "Support Versatile Express ARMv8a FVP BASE model booting from DRAM"
949 select ARM64
cf2c7784 950 select PL01X_SERIAL
fc04b923
RH
951 help
952 This target is derived from TARGET_VEXPRESS64_BASE_FVP and over-rides
953 the default config to allow the user to load the images directly into
954 DRAM using model parameters rather than by using semi-hosting to load
955 the files from the host filesystem.
956
ffc10373
LW
957config TARGET_VEXPRESS64_JUNO
958 bool "Support Versatile Express Juno Development Platform"
959 select ARM64
cf2c7784 960 select PL01X_SERIAL
ffc10373 961
44937214
PK
962config TARGET_LS2080A_EMU
963 bool "Support ls2080a_emu"
fb2bf8c2 964 select ARCH_LS2080A
5ed063d1 965 select ARCH_MISC_INIT
016a954e 966 select ARM64
23b5877c 967 select ARMV8_MULTIENTRY
44937214
PK
968 help
969 Support for Freescale LS2080A_EMU platform
970 The LS2080A Development System (EMULATOR) is a pre silicon
971 development platform that supports the QorIQ LS2080A
972 Layerscape Architecture processor.
dd84058d 973
44937214
PK
974config TARGET_LS2080A_SIMU
975 bool "Support ls2080a_simu"
fb2bf8c2 976 select ARCH_LS2080A
5ed063d1 977 select ARCH_MISC_INIT
016a954e 978 select ARM64
23b5877c 979 select ARMV8_MULTIENTRY
44937214
PK
980 help
981 Support for Freescale LS2080A_SIMU platform
982 The LS2080A Development System (QDS) is a pre silicon
983 development platform that supports the QorIQ LS2080A
984 Layerscape Architecture processor.
dd84058d 985
7769776a
AK
986config TARGET_LS1088AQDS
987 bool "Support ls1088aqds"
988 select ARCH_LS1088A
5ed063d1 989 select ARCH_MISC_INIT
7769776a
AK
990 select ARM64
991 select ARMV8_MULTIENTRY
7769776a 992 select BOARD_LATE_INIT
91fded62 993 select SUPPORT_SPL
7769776a
AK
994 help
995 Support for NXP LS1088AQDS platform
996 The LS1088A Development System (QDS) is a high-performance
997 development platform that supports the QorIQ LS1088A
998 Layerscape Architecture processor.
999
44937214
PK
1000config TARGET_LS2080AQDS
1001 bool "Support ls2080aqds"
fb2bf8c2 1002 select ARCH_LS2080A
5ed063d1 1003 select ARCH_MISC_INIT
7288c2c2
YS
1004 select ARM64
1005 select ARMV8_MULTIENTRY
e5ec4815 1006 select BOARD_LATE_INIT
b2d5ac59 1007 select SUPPORT_SPL
fedb428c 1008 imply SCSI
9fd95ef0 1009 imply SCSI_AHCI
7288c2c2 1010 help
44937214
PK
1011 Support for Freescale LS2080AQDS platform
1012 The LS2080A Development System (QDS) is a high-performance
1013 development platform that supports the QorIQ LS2080A
7288c2c2
YS
1014 Layerscape Architecture processor.
1015
44937214
PK
1016config TARGET_LS2080ARDB
1017 bool "Support ls2080ardb"
fb2bf8c2 1018 select ARCH_LS2080A
5ed063d1 1019 select ARCH_MISC_INIT
e2b65ea9
YS
1020 select ARM64
1021 select ARMV8_MULTIENTRY
e5ec4815 1022 select BOARD_LATE_INIT
32eda7cc 1023 select SUPPORT_SPL
fedb428c 1024 imply SCSI
9fd95ef0 1025 imply SCSI_AHCI
e2b65ea9 1026 help
44937214
PK
1027 Support for Freescale LS2080ARDB platform.
1028 The LS2080A Reference design board (RDB) is a high-performance
1029 development platform that supports the QorIQ LS2080A
e2b65ea9
YS
1030 Layerscape Architecture processor.
1031
3049a583
PJ
1032config TARGET_LS2081ARDB
1033 bool "Support ls2081ardb"
1034 select ARCH_LS2080A
5ed063d1 1035 select ARCH_MISC_INIT
3049a583
PJ
1036 select ARM64
1037 select ARMV8_MULTIENTRY
1038 select BOARD_LATE_INIT
1039 select SUPPORT_SPL
3049a583
PJ
1040 help
1041 Support for Freescale LS2081ARDB platform.
1042 The LS2081A Reference design board (RDB) is a high-performance
1043 development platform that supports the QorIQ LS2081A/LS2041A
1044 Layerscape Architecture processor.
1045
11ac2363
PG
1046config TARGET_HIKEY
1047 bool "Support HiKey 96boards Consumer Edition Platform"
1048 select ARM64
efd7b60a
PG
1049 select DM
1050 select DM_GPIO
9c71bcdc 1051 select DM_SERIAL
cd593ed6 1052 select OF_CONTROL
cf2c7784 1053 select PL01X_SERIAL
6f6b7cfa 1054 select SPECIFY_CONSOLE_INDEX
08a00cba 1055 imply CMD_DM
11ac2363
PG
1056 help
1057 Support for HiKey 96boards platform. It features a HI6220
1058 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1059
d754254f
JRO
1060config TARGET_POPLAR
1061 bool "Support Poplar 96boards Enterprise Edition Platform"
1062 select ARM64
1063 select DM
d754254f
JRO
1064 select DM_SERIAL
1065 select DM_USB
5ed063d1 1066 select OF_CONTROL
cf2c7784 1067 select PL01X_SERIAL
08a00cba 1068 imply CMD_DM
d754254f
JRO
1069 help
1070 Support for Poplar 96boards EE platform. It features a HI3798cv200
1071 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1072 making it capable of running any commercial set-top solution based on
1073 Linux or Android.
1074
9d044fcb
PK
1075config TARGET_LS1012AQDS
1076 bool "Support ls1012aqds"
9533acf3 1077 select ARCH_LS1012A
9d044fcb 1078 select ARM64
e5ec4815 1079 select BOARD_LATE_INIT
9d044fcb
PK
1080 help
1081 Support for Freescale LS1012AQDS platform.
1082 The LS1012A Development System (QDS) is a high-performance
1083 development platform that supports the QorIQ LS1012A
1084 Layerscape Architecture processor.
1085
3b6e3898
PK
1086config TARGET_LS1012ARDB
1087 bool "Support ls1012ardb"
9533acf3 1088 select ARCH_LS1012A
3b6e3898 1089 select ARM64
e5ec4815 1090 select BOARD_LATE_INIT
fedb428c 1091 imply SCSI
9fd95ef0 1092 imply SCSI_AHCI
3b6e3898
PK
1093 help
1094 Support for Freescale LS1012ARDB platform.
1095 The LS1012A Reference design board (RDB) is a high-performance
1096 development platform that supports the QorIQ LS1012A
1097 Layerscape Architecture processor.
1098
b0ce187b
BU
1099config TARGET_LS1012A2G5RDB
1100 bool "Support ls1012a2g5rdb"
1101 select ARCH_LS1012A
1102 select ARM64
1103 select BOARD_LATE_INIT
1104 imply SCSI
1105 help
1106 Support for Freescale LS1012A2G5RDB platform.
1107 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1108 development platform that supports the QorIQ LS1012A
1109 Layerscape Architecture processor.
1110
9629ccdd
BU
1111config TARGET_LS1012AFRWY
1112 bool "Support ls1012afrwy"
1113 select ARCH_LS1012A
1114 select ARM64
5ed063d1 1115 select BOARD_LATE_INIT
9629ccdd
BU
1116 imply SCSI
1117 imply SCSI_AHCI
1118 help
1119 Support for Freescale LS1012AFRWY platform.
1120 The LS1012A FRWY board (FRWY) is a high-performance
1121 development platform that supports the QorIQ LS1012A
1122 Layerscape Architecture processor.
1123
ff78aa2b
PK
1124config TARGET_LS1012AFRDM
1125 bool "Support ls1012afrdm"
9533acf3 1126 select ARCH_LS1012A
ff78aa2b
PK
1127 select ARM64
1128 help
1129 Support for Freescale LS1012AFRDM platform.
1130 The LS1012A Freedom board (FRDM) is a high-performance
1131 development platform that supports the QorIQ LS1012A
1132 Layerscape Architecture processor.
1133
e84a324b
AK
1134config TARGET_LS1088ARDB
1135 bool "Support ls1088ardb"
1136 select ARCH_LS1088A
5ed063d1 1137 select ARCH_MISC_INIT
e84a324b
AK
1138 select ARM64
1139 select ARMV8_MULTIENTRY
e84a324b 1140 select BOARD_LATE_INIT
099f4093 1141 select SUPPORT_SPL
e84a324b
AK
1142 help
1143 Support for NXP LS1088ARDB platform.
1144 The LS1088A Reference design board (RDB) is a high-performance
1145 development platform that supports the QorIQ LS1088A
1146 Layerscape Architecture processor.
1147
550e3dc0 1148config TARGET_LS1021AQDS
0de15707 1149 bool "Support ls1021aqds"
5ed063d1
MS
1150 select ARCH_LS1021A
1151 select ARCH_SUPPORT_PSCI
1152 select BOARD_EARLY_INIT_F
e5ec4815 1153 select BOARD_LATE_INIT
acf15001 1154 select CPU_V7A
adee1d4c
HZ
1155 select CPU_V7_HAS_NONSEC
1156 select CPU_V7_HAS_VIRT
5e8bd7e1 1157 select LS1_DEEP_SLEEP
5ed063d1 1158 select SUPPORT_SPL
d26e34c4 1159 select SYS_FSL_DDR
fedb428c 1160 imply SCSI
217f92bb 1161
c8a7d9da 1162config TARGET_LS1021ATWR
0de15707 1163 bool "Support ls1021atwr"
5ed063d1
MS
1164 select ARCH_LS1021A
1165 select ARCH_SUPPORT_PSCI
1166 select BOARD_EARLY_INIT_F
e5ec4815 1167 select BOARD_LATE_INIT
acf15001 1168 select CPU_V7A
adee1d4c
HZ
1169 select CPU_V7_HAS_NONSEC
1170 select CPU_V7_HAS_VIRT
5e8bd7e1 1171 select LS1_DEEP_SLEEP
5ed063d1 1172 select SUPPORT_SPL
fedb428c 1173 imply SCSI
c8a7d9da 1174
20c700f8
FL
1175config TARGET_LS1021AIOT
1176 bool "Support ls1021aiot"
5ed063d1
MS
1177 select ARCH_LS1021A
1178 select ARCH_SUPPORT_PSCI
e5ec4815 1179 select BOARD_LATE_INIT
acf15001 1180 select CPU_V7A
20c700f8
FL
1181 select CPU_V7_HAS_NONSEC
1182 select CPU_V7_HAS_VIRT
1183 select SUPPORT_SPL
fedb428c 1184 imply SCSI
20c700f8
FL
1185 help
1186 Support for Freescale LS1021AIOT platform.
1187 The LS1021A Freescale board (IOT) is a high-performance
1188 development platform that supports the QorIQ LS1021A
1189 Layerscape Architecture processor.
1190
02b5d2ed
SX
1191config TARGET_LS1043AQDS
1192 bool "Support ls1043aqds"
0a37cf8f 1193 select ARCH_LS1043A
02b5d2ed
SX
1194 select ARM64
1195 select ARMV8_MULTIENTRY
5ed063d1 1196 select BOARD_EARLY_INIT_F
e5ec4815 1197 select BOARD_LATE_INIT
02b5d2ed 1198 select SUPPORT_SPL
fedb428c 1199 imply SCSI
02b5d2ed
SX
1200 help
1201 Support for Freescale LS1043AQDS platform.
1202
f3a8e2b7
MH
1203config TARGET_LS1043ARDB
1204 bool "Support ls1043ardb"
0a37cf8f 1205 select ARCH_LS1043A
f3a8e2b7 1206 select ARM64
831c068f 1207 select ARMV8_MULTIENTRY
5ed063d1 1208 select BOARD_EARLY_INIT_F
e5ec4815 1209 select BOARD_LATE_INIT
3ad44729 1210 select SUPPORT_SPL
fedb428c 1211 imply SCSI
f3a8e2b7
MH
1212 help
1213 Support for Freescale LS1043ARDB platform.
1214
126fe70d
SX
1215config TARGET_LS1046AQDS
1216 bool "Support ls1046aqds"
da28e58a 1217 select ARCH_LS1046A
126fe70d
SX
1218 select ARM64
1219 select ARMV8_MULTIENTRY
5ed063d1 1220 select BOARD_EARLY_INIT_F
e5ec4815 1221 select BOARD_LATE_INIT
126fe70d 1222 select DM_SPI_FLASH if DM_SPI
5ed063d1 1223 select SUPPORT_SPL
fedb428c 1224 imply SCSI
126fe70d
SX
1225 help
1226 Support for Freescale LS1046AQDS platform.
1227 The LS1046A Development System (QDS) is a high-performance
1228 development platform that supports the QorIQ LS1046A
1229 Layerscape Architecture processor.
1230
dd02936f
MH
1231config TARGET_LS1046ARDB
1232 bool "Support ls1046ardb"
da28e58a 1233 select ARCH_LS1046A
dd02936f
MH
1234 select ARM64
1235 select ARMV8_MULTIENTRY
5ed063d1 1236 select BOARD_EARLY_INIT_F
e5ec4815 1237 select BOARD_LATE_INIT
dd02936f 1238 select DM_SPI_FLASH if DM_SPI
dccef2ec 1239 select POWER_MC34VR500
5ed063d1 1240 select SUPPORT_SPL
fedb428c 1241 imply SCSI
dd02936f
MH
1242 help
1243 Support for Freescale LS1046ARDB platform.
1244 The LS1046A Reference Design Board (RDB) is a high-performance
1245 development platform that supports the QorIQ LS1046A
1246 Layerscape Architecture processor.
1247
dd84058d
MY
1248config TARGET_H2200
1249 bool "Support h2200"
2e07c249 1250 select CPU_PXA
dd84058d 1251
f19eb154
VK
1252config TARGET_ZIPITZ2
1253 bool "Support zipitz2"
1254 select CPU_PXA
1255
dd84058d
MY
1256config TARGET_COLIBRI_PXA270
1257 bool "Support colibri_pxa270"
2e07c249 1258 select CPU_PXA
dd84058d 1259
66cba041 1260config ARCH_UNIPHIER
b6ef3a3f 1261 bool "Socionext UniPhier SoCs"
e5ec4815 1262 select BOARD_LATE_INIT
4e819950 1263 select DM
b800cbde 1264 select DM_GPIO
4e819950 1265 select DM_I2C
4aceb3f8 1266 select DM_MMC
4fb96c48 1267 select DM_RESET
b5550e49 1268 select DM_SERIAL
47a79f65 1269 select DM_USB
65fce763 1270 select OF_BOARD_SETUP
b5550e49
MY
1271 select OF_CONTROL
1272 select OF_LIBFDT
27350c92 1273 select PINCTRL
0680f1b1 1274 select SPL_BOARD_INIT if SPL
561ca649
MY
1275 select SPL_DM if SPL
1276 select SPL_LIBCOMMON_SUPPORT if SPL
1277 select SPL_LIBGENERIC_SUPPORT if SPL
1278 select SPL_OF_CONTROL if SPL
1279 select SPL_PINCTRL if SPL
b5550e49 1280 select SUPPORT_SPL
08a00cba 1281 imply CMD_DM
7ef5b1e7 1282 imply DISTRO_DEFAULTS
91d27a17 1283 imply FAT_WRITE
b6ef3a3f
MY
1284 help
1285 Support for UniPhier SoC family developed by Socionext Inc.
1286 (formerly, System LSI Business Division of Panasonic Corporation)
66cba041 1287
0a61ee88 1288config STM32
2514c2d0 1289 bool "Support STMicroelectronics STM32 MCU with cortex M"
ed09a554 1290 select CPU_V7M
66562414
KL
1291 select DM
1292 select DM_SERIAL
08a00cba 1293 imply CMD_DM
ed09a554 1294
94e9a4ef
PC
1295config ARCH_STI
1296 bool "Support STMicrolectronics SoCs"
5ed063d1 1297 select BLK
acf15001 1298 select CPU_V7A
214a17e6 1299 select DM
eee20f81 1300 select DM_MMC
584861ff 1301 select DM_RESET
5ed063d1 1302 select DM_SERIAL
08a00cba 1303 imply CMD_DM
94e9a4ef
PC
1304 help
1305 Support for STMicroelectronics STiH407/10 SoC family.
1306 This SoC is used on Linaro 96Board STiH410-B2260
1307
2514c2d0
PD
1308config ARCH_STM32MP
1309 bool "Support STMicroelectronics STM32MP Socs with cortex A"
08772f6e 1310 select ARCH_MISC_INIT
2514c2d0
PD
1311 select BOARD_LATE_INIT
1312 select CLK
1313 select DM
1314 select DM_GPIO
1315 select DM_RESET
1316 select DM_SERIAL
5ed063d1 1317 select MISC
2514c2d0
PD
1318 select OF_CONTROL
1319 select OF_LIBFDT
1320 select PINCTRL
1321 select REGMAP
1322 select SUPPORT_SPL
1323 select SYSCON
86634a93 1324 select SYSRESET
2514c2d0 1325 select SYS_THUMB_BUILD
08a00cba 1326 imply CMD_DM
2514c2d0
PD
1327 help
1328 Support for STM32MP SoC family developed by STMicroelectronics,
1329 MPUs based on ARM cortex A core
1330 U-BOOT is running in DDR and SPL support is the unsecure First Stage
1331 BootLoader (FSBL)
1332
2444dae5
SG
1333config ARCH_ROCKCHIP
1334 bool "Support Rockchip SoCs"
aa15038c 1335 select BLK
2444dae5 1336 select DM
aa15038c
SG
1337 select DM_GPIO
1338 select DM_I2C
1339 select DM_MMC
5ed063d1
MS
1340 select DM_PWM
1341 select DM_REGULATOR
aa15038c
SG
1342 select DM_SERIAL
1343 select DM_SPI
1344 select DM_SPI_FLASH
892742df 1345 select DM_USB if USB
14ad6eb2 1346 select ENABLE_ARM_SOC_BOOT0_HOOK
5ed063d1 1347 select OF_CONTROL
f1b1f770 1348 select SPI
5ed063d1
MS
1349 select SPL_DM if SPL
1350 select SPL_SYS_MALLOC_SIMPLE if SPL
1351 select SYS_MALLOC_F
1352 select SYS_THUMB_BUILD if !ARM64
1353 imply ADC
08a00cba 1354 imply CMD_DM
7325f6cf 1355 imply DISTRO_DEFAULTS
91d27a17 1356 imply FAT_WRITE
8e8bcccc 1357 imply SARADC_ROCKCHIP
5ed063d1 1358 imply SPL_SYSRESET
c3c0331d 1359 imply SYS_NS16550
5ed063d1
MS
1360 imply TPL_SYSRESET
1361 imply USB_FUNCTION_FASTBOOT
2444dae5 1362
746f985a
ST
1363config TARGET_THUNDERX_88XX
1364 bool "Support ThunderX 88xx"
b4ba1693 1365 select ARM64
746f985a 1366 select OF_CONTROL
cf2c7784 1367 select PL01X_SERIAL
5ed063d1 1368 select SYS_CACHE_SHIFT_7
746f985a 1369
4697abea 1370config ARCH_ASPEED
1371 bool "Support Aspeed SoCs"
4697abea 1372 select DM
5ed063d1 1373 select OF_CONTROL
08a00cba 1374 imply CMD_DM
4697abea 1375
dd84058d
MY
1376endchoice
1377
5fbed8f2
AD
1378config TI_SECURE_DEVICE
1379 bool "HS Device Type Support"
1380 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS
1381 help
1382 If a high secure (HS) device type is being used, this config
1383 must be set. This option impacts various aspects of the
1384 build system (to create signed boot images that can be
1385 authenticated) and the code. See the doc/README.ti-secure
1386 file for further details.
1387
4697abea 1388source "arch/arm/mach-aspeed/Kconfig"
1389
4614b891
MY
1390source "arch/arm/mach-at91/Kconfig"
1391
ddf6bd48 1392source "arch/arm/mach-bcm283x/Kconfig"
3491ba63 1393
894c3ad2
TF
1394source "arch/arm/mach-bcmstb/Kconfig"
1395
ddf6bd48 1396source "arch/arm/mach-davinci/Kconfig"
34e609ca 1397
77b55e8c 1398source "arch/arm/mach-exynos/Kconfig"
72df68cc 1399
72a8ff4b 1400source "arch/arm/mach-highbank/Kconfig"
ef2b694c 1401
5cbbd9bd
MY
1402source "arch/arm/mach-integrator/Kconfig"
1403
586bde93
LV
1404source "arch/arm/mach-k3/Kconfig"
1405
39a72345 1406source "arch/arm/mach-keystone/Kconfig"
c338f09e 1407
56f86e39 1408source "arch/arm/mach-kirkwood/Kconfig"
47539e23 1409
ee54dfea
VZ
1410source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
1411
c3d89140
SR
1412source "arch/arm/mach-mvebu/Kconfig"
1413
0a37cf8f
YS
1414source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1415
07df697e
FE
1416source "arch/arm/mach-imx/mx2/Kconfig"
1417
3159ec64
ML
1418source "arch/arm/mach-imx/mx3/Kconfig"
1419
7a7391fd
PF
1420source "arch/arm/mach-imx/mx5/Kconfig"
1421
1422source "arch/arm/mach-imx/mx6/Kconfig"
e90a08da 1423
552a848e 1424source "arch/arm/mach-imx/mx7/Kconfig"
1a8150d4 1425
7a7391fd 1426source "arch/arm/mach-imx/mx7ulp/Kconfig"
89ebc821 1427
b2b8b9be
PF
1428source "arch/arm/mach-imx/imx8/Kconfig"
1429
7a7391fd 1430source "arch/arm/mach-imx/mx8m/Kconfig"
424ee3d1 1431
c5343d4e
SA
1432source "arch/arm/mach-imx/mxs/Kconfig"
1433
983e3700 1434source "arch/arm/mach-omap2/Kconfig"
6384726d 1435
da28e58a
YS
1436source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1437
3e93b4e6 1438source "arch/arm/mach-orion5x/Kconfig"
22f2be7a 1439
97775d26
MS
1440source "arch/arm/mach-owl/Kconfig"
1441
badbb63c 1442source "arch/arm/mach-rmobile/Kconfig"
f40b9898 1443
bfcef28a
BG
1444source "arch/arm/mach-meson/Kconfig"
1445
32f11829
TT
1446source "arch/arm/mach-qemu/Kconfig"
1447
2444dae5
SG
1448source "arch/arm/mach-rockchip/Kconfig"
1449
225f5eec 1450source "arch/arm/mach-s5pc1xx/Kconfig"
311757be 1451
08592136
MK
1452source "arch/arm/mach-snapdragon/Kconfig"
1453
7865f4b0
MY
1454source "arch/arm/mach-socfpga/Kconfig"
1455
94e9a4ef
PC
1456source "arch/arm/mach-sti/Kconfig"
1457
0a61ee88
VM
1458source "arch/arm/mach-stm32/Kconfig"
1459
2514c2d0
PD
1460source "arch/arm/mach-stm32mp/Kconfig"
1461
3abfd887
MY
1462source "arch/arm/mach-sunxi/Kconfig"
1463
09f455dc 1464source "arch/arm/mach-tegra/Kconfig"
ddd960e6 1465
4c425570 1466source "arch/arm/mach-uniphier/Kconfig"
66cba041 1467
7966b437
SA
1468source "arch/arm/cpu/armv7/vf610/Kconfig"
1469
0107f240 1470source "arch/arm/mach-zynq/Kconfig"
ddd960e6 1471
ec48b6c9
MS
1472source "arch/arm/mach-versal/Kconfig"
1473
1d6c54ec
MS
1474source "arch/arm/mach-zynqmp-r5/Kconfig"
1475
ea624e19
HG
1476source "arch/arm/cpu/armv7/Kconfig"
1477
75580007
SDPP
1478source "arch/arm/cpu/armv8/zynqmp/Kconfig"
1479
23b5877c
LW
1480source "arch/arm/cpu/armv8/Kconfig"
1481
552a848e 1482source "arch/arm/mach-imx/Kconfig"
a05a6045 1483
d8ccbe93 1484source "board/bosch/shc/Kconfig"
dd84058d 1485source "board/CarMediaLab/flea3/Kconfig"
dd84058d 1486source "board/Marvell/aspenite/Kconfig"
dd84058d 1487source "board/Marvell/gplugd/Kconfig"
dd84058d 1488source "board/armadeus/apf27/Kconfig"
dd84058d
MY
1489source "board/armltd/vexpress/Kconfig"
1490source "board/armltd/vexpress64/Kconfig"
43486e4c 1491source "board/broadcom/bcm23550_w1d/Kconfig"
dd84058d 1492source "board/broadcom/bcm28155_ap/Kconfig"
abb1678c
SR
1493source "board/broadcom/bcmcygnus/Kconfig"
1494source "board/broadcom/bcmnsp/Kconfig"
274bced8 1495source "board/broadcom/bcmns2/Kconfig"
746f985a 1496source "board/cavium/thunderx/Kconfig"
dd84058d 1497source "board/cirrus/edb93xx/Kconfig"
85ab0452 1498source "board/eets/pdu001/Kconfig"
6f332765 1499source "board/emulation/qemu-arm/Kconfig"
44937214
PK
1500source "board/freescale/ls2080a/Kconfig"
1501source "board/freescale/ls2080aqds/Kconfig"
1502source "board/freescale/ls2080ardb/Kconfig"
e84a324b 1503source "board/freescale/ls1088a/Kconfig"
550e3dc0 1504source "board/freescale/ls1021aqds/Kconfig"
02b5d2ed 1505source "board/freescale/ls1043aqds/Kconfig"
c8a7d9da 1506source "board/freescale/ls1021atwr/Kconfig"
20c700f8 1507source "board/freescale/ls1021aiot/Kconfig"
126fe70d 1508source "board/freescale/ls1046aqds/Kconfig"
f3a8e2b7 1509source "board/freescale/ls1043ardb/Kconfig"
dd02936f 1510source "board/freescale/ls1046ardb/Kconfig"
9d044fcb 1511source "board/freescale/ls1012aqds/Kconfig"
3b6e3898 1512source "board/freescale/ls1012ardb/Kconfig"
ff78aa2b 1513source "board/freescale/ls1012afrdm/Kconfig"
dd84058d 1514source "board/freescale/mx35pdk/Kconfig"
9702ec00 1515source "board/freescale/s32v234evb/Kconfig"
ab38bf6a 1516source "board/grinn/chiliboard/Kconfig"
dd84058d
MY
1517source "board/gumstix/pepper/Kconfig"
1518source "board/h2200/Kconfig"
345243ed 1519source "board/hisilicon/hikey/Kconfig"
d754254f 1520source "board/hisilicon/poplar/Kconfig"
a96c08f5 1521source "board/isee/igep003x/Kconfig"
dd84058d 1522source "board/phytec/pcm051/Kconfig"
dd84058d 1523source "board/silica/pengwyn/Kconfig"
dd84058d
MY
1524source "board/spear/spear300/Kconfig"
1525source "board/spear/spear310/Kconfig"
1526source "board/spear/spear320/Kconfig"
1527source "board/spear/spear600/Kconfig"
1528source "board/spear/x600/Kconfig"
9fa32b12 1529source "board/st/stv0991/Kconfig"
9d1b2987 1530source "board/tcl/sl50/Kconfig"
eba6589f 1531source "board/ucRobotics/bubblegum_96/Kconfig"
a2bc4321 1532source "board/birdland/bav335x/Kconfig"
dd84058d 1533source "board/toradex/colibri_pxa270/Kconfig"
6ce89324 1534source "board/vscom/baltos/Kconfig"
dd84058d 1535source "board/woodburn/Kconfig"
6da4f67a 1536source "board/xilinx/Kconfig"
37e3a36a 1537source "board/xilinx/zynq/Kconfig"
c436bf92 1538source "board/xilinx/zynqmp/Kconfig"
f19eb154 1539source "board/zipitz2/Kconfig"
dd84058d 1540
51b17d49
MY
1541source "arch/arm/Kconfig.debug"
1542
dd84058d 1543endmenu
b529993e
PT
1544
1545config SPL_LDSCRIPT
6e7bdde4
MS
1546 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1547 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
b529993e
PT
1548 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64
1549
1550
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