projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 6e9a0a39 MV |
1 | /* |
| 2 | * Freescale i.MX28 BCH Register Definitions | |
| 3 | * | |
| 4 | * Copyright (C) 2011 Marek Vasut <[email protected]> | |
| 5 | * on behalf of DENX Software Engineering GmbH | |
| 6 | * | |
| 7 | * Based on code from LTIB: | |
| 8 | * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved. | |
| 9 | * | |
| 1a459660 | 10 | * SPDX-License-Identifier: GPL-2.0+ |
| 6e9a0a39 MV |
11 | */ |
| 12 | ||
| 13 | #ifndef __MX28_REGS_BCH_H__ | |
| 14 | #define __MX28_REGS_BCH_H__ | |
| 15 | ||
| 0499218d | 16 | #include <asm/imx-common/regs-common.h> |
| 6e9a0a39 MV |
17 | |
| 18 | #ifndef __ASSEMBLY__ | |
| 9c471142 | 19 | struct mxs_bch_regs { |
| ddcf13b1 OS |
20 | mxs_reg_32(hw_bch_ctrl) |
| 21 | mxs_reg_32(hw_bch_status0) | |
| 22 | mxs_reg_32(hw_bch_mode) | |
| 23 | mxs_reg_32(hw_bch_encodeptr) | |
| 24 | mxs_reg_32(hw_bch_dataptr) | |
| 25 | mxs_reg_32(hw_bch_metaptr) | |
| 6e9a0a39 MV |
26 | |
| 27 | uint32_t reserved[4]; | |
| 28 | ||
| ddcf13b1 OS |
29 | mxs_reg_32(hw_bch_layoutselect) |
| 30 | mxs_reg_32(hw_bch_flash0layout0) | |
| 31 | mxs_reg_32(hw_bch_flash0layout1) | |
| 32 | mxs_reg_32(hw_bch_flash1layout0) | |
| 33 | mxs_reg_32(hw_bch_flash1layout1) | |
| 34 | mxs_reg_32(hw_bch_flash2layout0) | |
| 35 | mxs_reg_32(hw_bch_flash2layout1) | |
| 36 | mxs_reg_32(hw_bch_flash3layout0) | |
| 37 | mxs_reg_32(hw_bch_flash3layout1) | |
| 38 | mxs_reg_32(hw_bch_dbgkesread) | |
| 39 | mxs_reg_32(hw_bch_dbgcsferead) | |
| 40 | mxs_reg_32(hw_bch_dbgsyndegread) | |
| 41 | mxs_reg_32(hw_bch_dbgahbmread) | |
| 42 | mxs_reg_32(hw_bch_blockname) | |
| 43 | mxs_reg_32(hw_bch_version) | |
| 6e9a0a39 MV |
44 | }; |
| 45 | #endif | |
| 46 | ||
| 47 | #define BCH_CTRL_SFTRST (1 << 31) | |
| 48 | #define BCH_CTRL_CLKGATE (1 << 30) | |
| 49 | #define BCH_CTRL_DEBUGSYNDROME (1 << 22) | |
| 50 | #define BCH_CTRL_M2M_LAYOUT_MASK (0x3 << 18) | |
| 51 | #define BCH_CTRL_M2M_LAYOUT_OFFSET 18 | |
| 52 | #define BCH_CTRL_M2M_ENCODE (1 << 17) | |
| 53 | #define BCH_CTRL_M2M_ENABLE (1 << 16) | |
| 54 | #define BCH_CTRL_DEBUG_STALL_IRQ_EN (1 << 10) | |
| 55 | #define BCH_CTRL_COMPLETE_IRQ_EN (1 << 8) | |
| 56 | #define BCH_CTRL_BM_ERROR_IRQ (1 << 3) | |
| 57 | #define BCH_CTRL_DEBUG_STALL_IRQ (1 << 2) | |
| 58 | #define BCH_CTRL_COMPLETE_IRQ (1 << 0) | |
| 59 | ||
| 60 | #define BCH_STATUS0_HANDLE_MASK (0xfff << 20) | |
| 61 | #define BCH_STATUS0_HANDLE_OFFSET 20 | |
| 62 | #define BCH_STATUS0_COMPLETED_CE_MASK (0xf << 16) | |
| 63 | #define BCH_STATUS0_COMPLETED_CE_OFFSET 16 | |
| 64 | #define BCH_STATUS0_STATUS_BLK0_MASK (0xff << 8) | |
| 65 | #define BCH_STATUS0_STATUS_BLK0_OFFSET 8 | |
| 66 | #define BCH_STATUS0_STATUS_BLK0_ZERO (0x00 << 8) | |
| 67 | #define BCH_STATUS0_STATUS_BLK0_ERROR1 (0x01 << 8) | |
| 68 | #define BCH_STATUS0_STATUS_BLK0_ERROR2 (0x02 << 8) | |
| 69 | #define BCH_STATUS0_STATUS_BLK0_ERROR3 (0x03 << 8) | |
| 70 | #define BCH_STATUS0_STATUS_BLK0_ERROR4 (0x04 << 8) | |
| 71 | #define BCH_STATUS0_STATUS_BLK0_UNCORRECTABLE (0xfe << 8) | |
| 72 | #define BCH_STATUS0_STATUS_BLK0_ERASED (0xff << 8) | |
| 73 | #define BCH_STATUS0_ALLONES (1 << 4) | |
| 74 | #define BCH_STATUS0_CORRECTED (1 << 3) | |
| 75 | #define BCH_STATUS0_UNCORRECTABLE (1 << 2) | |
| 76 | ||
| 77 | #define BCH_MODE_ERASE_THRESHOLD_MASK 0xff | |
| 78 | #define BCH_MODE_ERASE_THRESHOLD_OFFSET 0 | |
| 79 | ||
| 80 | #define BCH_ENCODEPTR_ADDR_MASK 0xffffffff | |
| 81 | #define BCH_ENCODEPTR_ADDR_OFFSET 0 | |
| 82 | ||
| 83 | #define BCH_DATAPTR_ADDR_MASK 0xffffffff | |
| 84 | #define BCH_DATAPTR_ADDR_OFFSET 0 | |
| 85 | ||
| 86 | #define BCH_METAPTR_ADDR_MASK 0xffffffff | |
| 87 | #define BCH_METAPTR_ADDR_OFFSET 0 | |
| 88 | ||
| 89 | #define BCH_LAYOUTSELECT_CS15_SELECT_MASK (0x3 << 30) | |
| 90 | #define BCH_LAYOUTSELECT_CS15_SELECT_OFFSET 30 | |
| 91 | #define BCH_LAYOUTSELECT_CS14_SELECT_MASK (0x3 << 28) | |
| 92 | #define BCH_LAYOUTSELECT_CS14_SELECT_OFFSET 28 | |
| 93 | #define BCH_LAYOUTSELECT_CS13_SELECT_MASK (0x3 << 26) | |
| 94 | #define BCH_LAYOUTSELECT_CS13_SELECT_OFFSET 26 | |
| 95 | #define BCH_LAYOUTSELECT_CS12_SELECT_MASK (0x3 << 24) | |
| 96 | #define BCH_LAYOUTSELECT_CS12_SELECT_OFFSET 24 | |
| 97 | #define BCH_LAYOUTSELECT_CS11_SELECT_MASK (0x3 << 22) | |
| 98 | #define BCH_LAYOUTSELECT_CS11_SELECT_OFFSET 22 | |
| 99 | #define BCH_LAYOUTSELECT_CS10_SELECT_MASK (0x3 << 20) | |
| 100 | #define BCH_LAYOUTSELECT_CS10_SELECT_OFFSET 20 | |
| 101 | #define BCH_LAYOUTSELECT_CS9_SELECT_MASK (0x3 << 18) | |
| 102 | #define BCH_LAYOUTSELECT_CS9_SELECT_OFFSET 18 | |
| 103 | #define BCH_LAYOUTSELECT_CS8_SELECT_MASK (0x3 << 16) | |
| 104 | #define BCH_LAYOUTSELECT_CS8_SELECT_OFFSET 16 | |
| 105 | #define BCH_LAYOUTSELECT_CS7_SELECT_MASK (0x3 << 14) | |
| 106 | #define BCH_LAYOUTSELECT_CS7_SELECT_OFFSET 14 | |
| 107 | #define BCH_LAYOUTSELECT_CS6_SELECT_MASK (0x3 << 12) | |
| 108 | #define BCH_LAYOUTSELECT_CS6_SELECT_OFFSET 12 | |
| 109 | #define BCH_LAYOUTSELECT_CS5_SELECT_MASK (0x3 << 10) | |
| 110 | #define BCH_LAYOUTSELECT_CS5_SELECT_OFFSET 10 | |
| 111 | #define BCH_LAYOUTSELECT_CS4_SELECT_MASK (0x3 << 8) | |
| 112 | #define BCH_LAYOUTSELECT_CS4_SELECT_OFFSET 8 | |
| 113 | #define BCH_LAYOUTSELECT_CS3_SELECT_MASK (0x3 << 6) | |
| 114 | #define BCH_LAYOUTSELECT_CS3_SELECT_OFFSET 6 | |
| 115 | #define BCH_LAYOUTSELECT_CS2_SELECT_MASK (0x3 << 4) | |
| 116 | #define BCH_LAYOUTSELECT_CS2_SELECT_OFFSET 4 | |
| 117 | #define BCH_LAYOUTSELECT_CS1_SELECT_MASK (0x3 << 2) | |
| 118 | #define BCH_LAYOUTSELECT_CS1_SELECT_OFFSET 2 | |
| 119 | #define BCH_LAYOUTSELECT_CS0_SELECT_MASK (0x3 << 0) | |
| 120 | #define BCH_LAYOUTSELECT_CS0_SELECT_OFFSET 0 | |
| 121 | ||
| 122 | #define BCH_FLASHLAYOUT0_NBLOCKS_MASK (0xff << 24) | |
| 123 | #define BCH_FLASHLAYOUT0_NBLOCKS_OFFSET 24 | |
| 124 | #define BCH_FLASHLAYOUT0_META_SIZE_MASK (0xff << 16) | |
| 125 | #define BCH_FLASHLAYOUT0_META_SIZE_OFFSET 16 | |
| bedaa842 | 126 | #if (defined(CONFIG_MX6) || defined(CONFIG_MX7)) |
| ae695b18 SR |
127 | #define BCH_FLASHLAYOUT0_ECC0_MASK (0x1f << 11) |
| 128 | #define BCH_FLASHLAYOUT0_ECC0_OFFSET 11 | |
| 129 | #else | |
| 6e9a0a39 MV |
130 | #define BCH_FLASHLAYOUT0_ECC0_MASK (0xf << 12) |
| 131 | #define BCH_FLASHLAYOUT0_ECC0_OFFSET 12 | |
| ae695b18 | 132 | #endif |
| 6e9a0a39 MV |
133 | #define BCH_FLASHLAYOUT0_ECC0_NONE (0x0 << 12) |
| 134 | #define BCH_FLASHLAYOUT0_ECC0_ECC2 (0x1 << 12) | |
| 135 | #define BCH_FLASHLAYOUT0_ECC0_ECC4 (0x2 << 12) | |
| 136 | #define BCH_FLASHLAYOUT0_ECC0_ECC6 (0x3 << 12) | |
| 137 | #define BCH_FLASHLAYOUT0_ECC0_ECC8 (0x4 << 12) | |
| 138 | #define BCH_FLASHLAYOUT0_ECC0_ECC10 (0x5 << 12) | |
| 139 | #define BCH_FLASHLAYOUT0_ECC0_ECC12 (0x6 << 12) | |
| 140 | #define BCH_FLASHLAYOUT0_ECC0_ECC14 (0x7 << 12) | |
| 141 | #define BCH_FLASHLAYOUT0_ECC0_ECC16 (0x8 << 12) | |
| 142 | #define BCH_FLASHLAYOUT0_ECC0_ECC18 (0x9 << 12) | |
| 143 | #define BCH_FLASHLAYOUT0_ECC0_ECC20 (0xa << 12) | |
| 144 | #define BCH_FLASHLAYOUT0_ECC0_ECC22 (0xb << 12) | |
| 145 | #define BCH_FLASHLAYOUT0_ECC0_ECC24 (0xc << 12) | |
| 146 | #define BCH_FLASHLAYOUT0_ECC0_ECC26 (0xd << 12) | |
| 147 | #define BCH_FLASHLAYOUT0_ECC0_ECC28 (0xe << 12) | |
| 148 | #define BCH_FLASHLAYOUT0_ECC0_ECC30 (0xf << 12) | |
| 149 | #define BCH_FLASHLAYOUT0_ECC0_ECC32 (0x10 << 12) | |
| 150 | #define BCH_FLASHLAYOUT0_GF13_0_GF14_1 (1 << 10) | |
| 63b29d80 | 151 | #define BCH_FLASHLAYOUT0_GF13_0_GF14_1_OFFSET 10 |
| 6e9a0a39 MV |
152 | #define BCH_FLASHLAYOUT0_DATA0_SIZE_MASK 0xfff |
| 153 | #define BCH_FLASHLAYOUT0_DATA0_SIZE_OFFSET 0 | |
| 154 | ||
| 155 | #define BCH_FLASHLAYOUT1_PAGE_SIZE_MASK (0xffff << 16) | |
| 156 | #define BCH_FLASHLAYOUT1_PAGE_SIZE_OFFSET 16 | |
| bedaa842 | 157 | #if (defined(CONFIG_MX6) || defined(CONFIG_MX7)) |
| ae695b18 SR |
158 | #define BCH_FLASHLAYOUT1_ECCN_MASK (0x1f << 11) |
| 159 | #define BCH_FLASHLAYOUT1_ECCN_OFFSET 11 | |
| 160 | #else | |
| 6e9a0a39 MV |
161 | #define BCH_FLASHLAYOUT1_ECCN_MASK (0xf << 12) |
| 162 | #define BCH_FLASHLAYOUT1_ECCN_OFFSET 12 | |
| ae695b18 | 163 | #endif |
| 6e9a0a39 MV |
164 | #define BCH_FLASHLAYOUT1_ECCN_NONE (0x0 << 12) |
| 165 | #define BCH_FLASHLAYOUT1_ECCN_ECC2 (0x1 << 12) | |
| 166 | #define BCH_FLASHLAYOUT1_ECCN_ECC4 (0x2 << 12) | |
| 167 | #define BCH_FLASHLAYOUT1_ECCN_ECC6 (0x3 << 12) | |
| 168 | #define BCH_FLASHLAYOUT1_ECCN_ECC8 (0x4 << 12) | |
| 169 | #define BCH_FLASHLAYOUT1_ECCN_ECC10 (0x5 << 12) | |
| 170 | #define BCH_FLASHLAYOUT1_ECCN_ECC12 (0x6 << 12) | |
| 171 | #define BCH_FLASHLAYOUT1_ECCN_ECC14 (0x7 << 12) | |
| 172 | #define BCH_FLASHLAYOUT1_ECCN_ECC16 (0x8 << 12) | |
| 173 | #define BCH_FLASHLAYOUT1_ECCN_ECC18 (0x9 << 12) | |
| 174 | #define BCH_FLASHLAYOUT1_ECCN_ECC20 (0xa << 12) | |
| 175 | #define BCH_FLASHLAYOUT1_ECCN_ECC22 (0xb << 12) | |
| 176 | #define BCH_FLASHLAYOUT1_ECCN_ECC24 (0xc << 12) | |
| 177 | #define BCH_FLASHLAYOUT1_ECCN_ECC26 (0xd << 12) | |
| 178 | #define BCH_FLASHLAYOUT1_ECCN_ECC28 (0xe << 12) | |
| 179 | #define BCH_FLASHLAYOUT1_ECCN_ECC30 (0xf << 12) | |
| 180 | #define BCH_FLASHLAYOUT1_ECCN_ECC32 (0x10 << 12) | |
| 181 | #define BCH_FLASHLAYOUT1_GF13_0_GF14_1 (1 << 10) | |
| 63b29d80 | 182 | #define BCH_FLASHLAYOUT1_GF13_0_GF14_1_OFFSET 10 |
| 6e9a0a39 MV |
183 | #define BCH_FLASHLAYOUT1_DATAN_SIZE_MASK 0xfff |
| 184 | #define BCH_FLASHLAYOUT1_DATAN_SIZE_OFFSET 0 | |
| 185 | ||
| 186 | #define BCH_DEBUG0_RSVD1_MASK (0x1f << 27) | |
| 187 | #define BCH_DEBUG0_RSVD1_OFFSET 27 | |
| 188 | #define BCH_DEBUG0_ROM_BIST_ENABLE (1 << 26) | |
| 189 | #define BCH_DEBUG0_ROM_BIST_COMPLETE (1 << 25) | |
| 190 | #define BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_MASK (0x1ff << 16) | |
| 191 | #define BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_OFFSET 16 | |
| 192 | #define BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_NORMAL (0x0 << 16) | |
| 193 | #define BCH_DEBUG0_KES_DEBUG_SYNDROME_SYMBOL_TEST_MODE (0x1 << 16) | |
| 194 | #define BCH_DEBUG0_KES_DEBUG_SHIFT_SYND (1 << 15) | |
| 195 | #define BCH_DEBUG0_KES_DEBUG_PAYLOAD_FLAG (1 << 14) | |
| 196 | #define BCH_DEBUG0_KES_DEBUG_MODE4K (1 << 13) | |
| 197 | #define BCH_DEBUG0_KES_DEBUG_KICK (1 << 12) | |
| 198 | #define BCH_DEBUG0_KES_STANDALONE (1 << 11) | |
| 199 | #define BCH_DEBUG0_KES_DEBUG_STEP (1 << 10) | |
| 200 | #define BCH_DEBUG0_KES_DEBUG_STALL (1 << 9) | |
| 201 | #define BCH_DEBUG0_BM_KES_TEST_BYPASS (1 << 8) | |
| 202 | #define BCH_DEBUG0_RSVD0_MASK (0x3 << 6) | |
| 203 | #define BCH_DEBUG0_RSVD0_OFFSET 6 | |
| 204 | #define BCH_DEBUG0_DEBUG_REG_SELECT_MASK 0x3f | |
| 205 | #define BCH_DEBUG0_DEBUG_REG_SELECT_OFFSET 0 | |
| 206 | ||
| 207 | #define BCH_DBGKESREAD_VALUES_MASK 0xffffffff | |
| 208 | #define BCH_DBGKESREAD_VALUES_OFFSET 0 | |
| 209 | ||
| 210 | #define BCH_DBGCSFEREAD_VALUES_MASK 0xffffffff | |
| 211 | #define BCH_DBGCSFEREAD_VALUES_OFFSET 0 | |
| 212 | ||
| 213 | #define BCH_DBGSYNDGENREAD_VALUES_MASK 0xffffffff | |
| 214 | #define BCH_DBGSYNDGENREAD_VALUES_OFFSET 0 | |
| 215 | ||
| 216 | #define BCH_DBGAHBMREAD_VALUES_MASK 0xffffffff | |
| 217 | #define BCH_DBGAHBMREAD_VALUES_OFFSET 0 | |
| 218 | ||
| 219 | #define BCH_BLOCKNAME_NAME_MASK 0xffffffff | |
| 220 | #define BCH_BLOCKNAME_NAME_OFFSET 0 | |
| 221 | ||
| 222 | #define BCH_VERSION_MAJOR_MASK (0xff << 24) | |
| 223 | #define BCH_VERSION_MAJOR_OFFSET 24 | |
| 224 | #define BCH_VERSION_MINOR_MASK (0xff << 16) | |
| 225 | #define BCH_VERSION_MINOR_OFFSET 16 | |
| 226 | #define BCH_VERSION_STEP_MASK 0xffff | |
| 227 | #define BCH_VERSION_STEP_OFFSET 0 | |
| 228 | ||
| 229 | #endif /* __MX28_REGS_BCH_H__ */ |