[J-u-boot.git] / drivers / serial / lpc32xx_hsuart.c

/*
 * Copyright (C) 2011-2015 Vladimir Zapolskiy <[email protected]>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <dm.h>
#include <serial.h>
#include <dm/platform_data/lpc32xx_hsuart.h>

#include <asm/arch/uart.h>
#include <linux/compiler.h>

DECLARE_GLOBAL_DATA_PTR;

struct lpc32xx_hsuart_priv {
	struct hsuart_regs *hsuart;
};

static int lpc32xx_serial_setbrg(struct udevice *dev, int baudrate)
{
	struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
	struct hsuart_regs *hsuart = priv->hsuart;
	u32 div;

	/* UART rate = PERIPH_CLK / ((HSU_RATE + 1) x 14) */
	div = (get_serial_clock() / 14 + baudrate / 2) / baudrate - 1;
	if (div > 255)
		div = 255;

	writel(div, &hsuart->rate);

	return 0;
}

static int lpc32xx_serial_getc(struct udevice *dev)
{
	struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
	struct hsuart_regs *hsuart = priv->hsuart;

	if (!(readl(&hsuart->level) & HSUART_LEVEL_RX))
		return -EAGAIN;

	return readl(&hsuart->rx) & HSUART_RX_DATA;
}

static int lpc32xx_serial_putc(struct udevice *dev, const char c)
{
	struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
	struct hsuart_regs *hsuart = priv->hsuart;

	/* Wait for empty FIFO */
	if (readl(&hsuart->level) & HSUART_LEVEL_TX)
		return -EAGAIN;

	writel(c, &hsuart->tx);

	return 0;
}

static int lpc32xx_serial_pending(struct udevice *dev, bool input)
{
	struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
	struct hsuart_regs *hsuart = priv->hsuart;

	if (input) {
		if (readl(&hsuart->level) & HSUART_LEVEL_RX)
			return 1;
	} else {
		if (readl(&hsuart->level) & HSUART_LEVEL_TX)
			return 1;
	}

	return 0;
}

static int lpc32xx_serial_init(struct hsuart_regs *hsuart)
{
	/* Disable hardware RTS and CTS flow control, set up RX and TX FIFO */
	writel(HSUART_CTRL_TMO_16 | HSUART_CTRL_HSU_OFFSET(20) |
	       HSUART_CTRL_HSU_RX_TRIG_32 | HSUART_CTRL_HSU_TX_TRIG_0,
	       &hsuart->ctrl);

	return 0;
}

static int lpc32xx_hsuart_probe(struct udevice *dev)
{
	struct lpc32xx_hsuart_platdata *platdata = dev_get_platdata(dev);
	struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);

	priv->hsuart = (struct hsuart_regs *)platdata->base;

	lpc32xx_serial_init(priv->hsuart);

	return 0;
}

static const struct dm_serial_ops lpc32xx_hsuart_ops = {
	.setbrg	= lpc32xx_serial_setbrg,
	.getc	= lpc32xx_serial_getc,
	.putc	= lpc32xx_serial_putc,
	.pending = lpc32xx_serial_pending,
};

U_BOOT_DRIVER(lpc32xx_hsuart) = {
	.name	= "lpc32xx_hsuart",
	.id	= UCLASS_SERIAL,
	.probe	= lpc32xx_hsuart_probe,
	.ops	= &lpc32xx_hsuart_ops,
	.priv_auto_alloc_size = sizeof(struct lpc32xx_hsuart_priv),
	.flags	= DM_FLAG_PRE_RELOC,
};
Commit	Line	Data
cc35fdbc	1	/*
f21069ed	2	* Copyright (C) 2011-2015 Vladimir Zapolskiy <[email protected]>
cc35fdbc	3	*
1a459660	4	* SPDX-License-Identifier: GPL-2.0+
cc35fdbc VZ	5	*/
	6
	7	#include <common.h>
f21069ed	8	#include <dm.h>
e503f90a	9	#include <serial.h>
f21069ed VZ	10	#include <dm/platform_data/lpc32xx_hsuart.h>
	11
	12	#include <asm/arch/uart.h>
e503f90a	13	#include <linux/compiler.h>
cc35fdbc VZ	14
	15	DECLARE_GLOBAL_DATA_PTR;
	16
f21069ed VZ	17	struct lpc32xx_hsuart_priv {
	18	struct hsuart_regs *hsuart;
	19	};
cc35fdbc	20
f21069ed	21	static int lpc32xx_serial_setbrg(struct udevice *dev, int baudrate)
cc35fdbc	22	{
f21069ed VZ	23	struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
f21069ed VZ	24	struct hsuart_regs *hsuart = priv->hsuart;
cc35fdbc VZ	25	u32 div;
	26
	27	/* UART rate = PERIPH_CLK / ((HSU_RATE + 1) x 14) */
f21069ed	28	div = (get_serial_clock() / 14 + baudrate / 2) / baudrate - 1;
cc35fdbc VZ	29	if (div > 255)
	30	div = 255;
	31
	32	writel(div, &hsuart->rate);
f21069ed VZ	33
f21069ed VZ	34	return 0;
cc35fdbc VZ	35	}
cc35fdbc VZ	36
f21069ed	37	static int lpc32xx_serial_getc(struct udevice *dev)
cc35fdbc	38	{
f21069ed VZ	39	struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
	40	struct hsuart_regs *hsuart = priv->hsuart;
	41
	42	if (!(readl(&hsuart->level) & HSUART_LEVEL_RX))
	43	return -EAGAIN;
cc35fdbc VZ	44
	45	return readl(&hsuart->rx) & HSUART_RX_DATA;
	46	}
	47
f21069ed	48	static int lpc32xx_serial_putc(struct udevice *dev, const char c)
cc35fdbc	49	{
f21069ed VZ	50	struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
	51	struct hsuart_regs *hsuart = priv->hsuart;
	52
	53	/* Wait for empty FIFO */
	54	if (readl(&hsuart->level) & HSUART_LEVEL_TX)
	55	return -EAGAIN;
5deccafa	56
cc35fdbc VZ	57	writel(c, &hsuart->tx);
cc35fdbc VZ	58
f21069ed	59	return 0;
cc35fdbc VZ	60	}
cc35fdbc VZ	61
f21069ed	62	static int lpc32xx_serial_pending(struct udevice *dev, bool input)
cc35fdbc	63	{
f21069ed VZ	64	struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
	65	struct hsuart_regs *hsuart = priv->hsuart;
	66
	67	if (input) {
	68	if (readl(&hsuart->level) & HSUART_LEVEL_RX)
	69	return 1;
	70	} else {
	71	if (readl(&hsuart->level) & HSUART_LEVEL_TX)
	72	return 1;
	73	}
cc35fdbc VZ	74
	75	return 0;
	76	}
	77
f21069ed	78	static int lpc32xx_serial_init(struct hsuart_regs *hsuart)
cc35fdbc	79	{
cc35fdbc VZ	80	/* Disable hardware RTS and CTS flow control, set up RX and TX FIFO */
	81	writel(HSUART_CTRL_TMO_16 \| HSUART_CTRL_HSU_OFFSET(20) \|
	82	HSUART_CTRL_HSU_RX_TRIG_32 \| HSUART_CTRL_HSU_TX_TRIG_0,
	83	&hsuart->ctrl);
f21069ed	84
e503f90a	85	return 0;
cc35fdbc VZ	86	}
cc35fdbc VZ	87
f21069ed VZ	88	static int lpc32xx_hsuart_probe(struct udevice *dev)
	89	{
	90	struct lpc32xx_hsuart_platdata *platdata = dev_get_platdata(dev);
	91	struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
	92
	93	priv->hsuart = (struct hsuart_regs *)platdata->base;
	94
	95	lpc32xx_serial_init(priv->hsuart);
	96
	97	return 0;
	98	}
	99
	100	static const struct dm_serial_ops lpc32xx_hsuart_ops = {
e503f90a	101	.setbrg = lpc32xx_serial_setbrg,
e503f90a	102	.getc = lpc32xx_serial_getc,
f21069ed VZ	103	.putc = lpc32xx_serial_putc,
f21069ed VZ	104	.pending = lpc32xx_serial_pending,
e503f90a MV	105	};
e503f90a MV	106
f21069ed VZ	107	U_BOOT_DRIVER(lpc32xx_hsuart) = {
	108	.name = "lpc32xx_hsuart",
	109	.id = UCLASS_SERIAL,
	110	.probe = lpc32xx_hsuart_probe,
	111	.ops = &lpc32xx_hsuart_ops,
	112	.priv_auto_alloc_size = sizeof(struct lpc32xx_hsuart_priv),
	113	.flags = DM_FLAG_PRE_RELOC,
	114	};