[J-u-boot.git] / drivers / usb / dwc3 / dwc3-generic.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Generic DWC3 Glue layer
 *
 * Copyright (C) 2016 - 2018 Xilinx, Inc.
 *
 * Based on dwc3-omap.c.
 */

#include <common.h>
#include <asm-generic/io.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <dwc3-uboot.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <malloc.h>
#include <usb.h>
#include "core.h"
#include "gadget.h"
#include <reset.h>
#include <clk.h>

#if CONFIG_IS_ENABLED(DM_USB_GADGET)
struct dwc3_generic_peripheral {
	struct dwc3 dwc3;
	struct phy *phys;
	int num_phys;
	fdt_addr_t base;
};

int dm_usb_gadget_handle_interrupts(struct udevice *dev)
{
	struct dwc3_generic_peripheral *priv = dev_get_priv(dev);
	struct dwc3 *dwc3 = &priv->dwc3;

	dwc3_gadget_uboot_handle_interrupt(dwc3);

	return 0;
}

static int dwc3_generic_peripheral_probe(struct udevice *dev)
{
	int rc;
	struct dwc3_generic_peripheral *priv = dev_get_priv(dev);
	struct dwc3 *dwc3 = &priv->dwc3;

	rc = dwc3_setup_phy(dev, &priv->phys, &priv->num_phys);
	if (rc)
		return rc;

	dwc3->regs = map_physmem(priv->base, DWC3_OTG_REGS_END, MAP_NOCACHE);
	dwc3->regs += DWC3_GLOBALS_REGS_START;
	dwc3->dev = dev;

	rc =  dwc3_init(dwc3);
	if (rc) {
		unmap_physmem(dwc3->regs, MAP_NOCACHE);
		return rc;
	}

	return 0;
}

static int dwc3_generic_peripheral_remove(struct udevice *dev)
{
	struct dwc3_generic_peripheral *priv = dev_get_priv(dev);
	struct dwc3 *dwc3 = &priv->dwc3;

	dwc3_remove(dwc3);
	dwc3_shutdown_phy(dev, priv->phys, priv->num_phys);
	unmap_physmem(dwc3->regs, MAP_NOCACHE);

	return 0;
}

static int dwc3_generic_peripheral_ofdata_to_platdata(struct udevice *dev)
{
	struct dwc3_generic_peripheral *priv = dev_get_priv(dev);
	struct dwc3 *dwc3 = &priv->dwc3;
	int node = dev_of_offset(dev);

	priv->base = devfdt_get_addr(dev);

	dwc3->maximum_speed = usb_get_maximum_speed(node);
	if (dwc3->maximum_speed == USB_SPEED_UNKNOWN) {
		pr_err("Invalid usb maximum speed\n");
		return -ENODEV;
	}

	dwc3->dr_mode = usb_get_dr_mode(node);
	if (dwc3->dr_mode == USB_DR_MODE_UNKNOWN) {
		pr_err("Invalid usb mode setup\n");
		return -ENODEV;
	}

	return 0;
}

U_BOOT_DRIVER(dwc3_generic_peripheral) = {
	.name	= "dwc3-generic-peripheral",
	.id	= UCLASS_USB_GADGET_GENERIC,
	.ofdata_to_platdata = dwc3_generic_peripheral_ofdata_to_platdata,
	.probe = dwc3_generic_peripheral_probe,
	.remove = dwc3_generic_peripheral_remove,
	.priv_auto_alloc_size = sizeof(struct dwc3_generic_peripheral),
};
#endif

struct dwc3_glue_data {
	struct clk_bulk		clks;
	struct reset_ctl_bulk	resets;
	fdt_addr_t regs;
};

struct dwc3_glue_ops {
	void (*select_dr_mode)(struct udevice *dev, int index,
			       enum usb_dr_mode mode);
};

void dwc3_ti_select_dr_mode(struct udevice *dev, int index,
			    enum usb_dr_mode mode)
{
#define USBOTGSS_UTMI_OTG_STATUS		0x0084
#define USBOTGSS_UTMI_OTG_OFFSET		0x0480

/* UTMI_OTG_STATUS REGISTER */
#define USBOTGSS_UTMI_OTG_STATUS_SW_MODE	BIT(31)
#define USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT	BIT(9)
#define USBOTGSS_UTMI_OTG_STATUS_TXBITSTUFFENABLE BIT(8)
#define USBOTGSS_UTMI_OTG_STATUS_IDDIG		BIT(4)
#define USBOTGSS_UTMI_OTG_STATUS_SESSEND	BIT(3)
#define USBOTGSS_UTMI_OTG_STATUS_SESSVALID	BIT(2)
#define USBOTGSS_UTMI_OTG_STATUS_VBUSVALID	BIT(1)
enum dwc3_omap_utmi_mode {
	DWC3_OMAP_UTMI_MODE_UNKNOWN = 0,
	DWC3_OMAP_UTMI_MODE_HW,
	DWC3_OMAP_UTMI_MODE_SW,
};

	u32 use_id_pin;
	u32 host_mode;
	u32 reg;
	u32 utmi_mode;
	u32 utmi_status_offset = USBOTGSS_UTMI_OTG_STATUS;

	struct dwc3_glue_data *glue = dev_get_platdata(dev);
	void *base = map_physmem(glue->regs, 0x10000, MAP_NOCACHE);

	if (device_is_compatible(dev, "ti,am437x-dwc3"))
		utmi_status_offset += USBOTGSS_UTMI_OTG_OFFSET;

	utmi_mode = dev_read_u32_default(dev, "utmi-mode",
					 DWC3_OMAP_UTMI_MODE_UNKNOWN);
	if (utmi_mode != DWC3_OMAP_UTMI_MODE_HW) {
		debug("%s: OTG is not supported. defaulting to PERIPHERAL\n",
		      dev->name);
		mode = USB_DR_MODE_PERIPHERAL;
	}

	switch (mode)  {
	case USB_DR_MODE_PERIPHERAL:
		use_id_pin = 0;
		host_mode = 0;
		break;
	case USB_DR_MODE_HOST:
		use_id_pin = 0;
		host_mode = 1;
		break;
	case USB_DR_MODE_OTG:
	default:
		use_id_pin = 1;
		host_mode = 0;
		break;
	}

	reg = readl(base + utmi_status_offset);

	reg &= ~(USBOTGSS_UTMI_OTG_STATUS_SW_MODE);
	if (!use_id_pin)
		reg |= USBOTGSS_UTMI_OTG_STATUS_SW_MODE;

	writel(reg, base + utmi_status_offset);

	reg &= ~(USBOTGSS_UTMI_OTG_STATUS_SESSEND |
		USBOTGSS_UTMI_OTG_STATUS_VBUSVALID |
		USBOTGSS_UTMI_OTG_STATUS_IDDIG);

	reg |= USBOTGSS_UTMI_OTG_STATUS_SESSVALID |
		USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT;

	if (!host_mode)
		reg |= USBOTGSS_UTMI_OTG_STATUS_IDDIG |
			USBOTGSS_UTMI_OTG_STATUS_VBUSVALID;

	writel(reg, base + utmi_status_offset);

	unmap_physmem(base, MAP_NOCACHE);
}

struct dwc3_glue_ops ti_ops = {
	.select_dr_mode = dwc3_ti_select_dr_mode,
};

static int dwc3_glue_bind(struct udevice *parent)
{
	const void *fdt = gd->fdt_blob;
	int node;
	int ret;

	for (node = fdt_first_subnode(fdt, dev_of_offset(parent)); node > 0;
	     node = fdt_next_subnode(fdt, node)) {
		const char *name = fdt_get_name(fdt, node, NULL);
		enum usb_dr_mode dr_mode;
		struct udevice *dev;
		const char *driver = NULL;

		debug("%s: subnode name: %s\n", __func__, name);

		dr_mode = usb_get_dr_mode(node);

		switch (dr_mode) {
		case USB_DR_MODE_PERIPHERAL:
		case USB_DR_MODE_OTG:
#if CONFIG_IS_ENABLED(DM_USB_GADGET)
			debug("%s: dr_mode: OTG or Peripheral\n", __func__);
			driver = "dwc3-generic-peripheral";
#endif
			break;
		case USB_DR_MODE_HOST:
			debug("%s: dr_mode: HOST\n", __func__);
			driver = "xhci-dwc3";
			break;
		default:
			debug("%s: unsupported dr_mode\n", __func__);
			return -ENODEV;
		};

		if (!driver)
			continue;

		ret = device_bind_driver_to_node(parent, driver, name,
						 offset_to_ofnode(node), &dev);
		if (ret) {
			debug("%s: not able to bind usb device mode\n",
			      __func__);
			return ret;
		}
	}

	return 0;
}

static int dwc3_glue_reset_init(struct udevice *dev,
				struct dwc3_glue_data *glue)
{
	int ret;

	ret = reset_get_bulk(dev, &glue->resets);
	if (ret == -ENOTSUPP)
		return 0;
	else if (ret)
		return ret;

	ret = reset_deassert_bulk(&glue->resets);
	if (ret) {
		reset_release_bulk(&glue->resets);
		return ret;
	}

	return 0;
}

static int dwc3_glue_clk_init(struct udevice *dev,
			      struct dwc3_glue_data *glue)
{
	int ret;

	ret = clk_get_bulk(dev, &glue->clks);
	if (ret == -ENOSYS)
		return 0;
	if (ret)
		return ret;

#if CONFIG_IS_ENABLED(CLK)
	ret = clk_enable_bulk(&glue->clks);
	if (ret) {
		clk_release_bulk(&glue->clks);
		return ret;
	}
#endif

	return 0;
}

static int dwc3_glue_probe(struct udevice *dev)
{
	struct dwc3_glue_ops *ops = (struct dwc3_glue_ops *)dev_get_driver_data(dev);
	struct dwc3_glue_data *glue = dev_get_platdata(dev);
	struct udevice *child = NULL;
	int index = 0;
	int ret;

	glue->regs = dev_read_addr(dev);

	ret = dwc3_glue_clk_init(dev, glue);
	if (ret)
		return ret;

	ret = dwc3_glue_reset_init(dev, glue);
	if (ret)
		return ret;

	ret = device_find_first_child(dev, &child);
	if (ret)
		return ret;

	while (child) {
		enum usb_dr_mode dr_mode;

		dr_mode = usb_get_dr_mode(dev_of_offset(child));
		device_find_next_child(&child);
		if (ops && ops->select_dr_mode)
			ops->select_dr_mode(dev, index, dr_mode);
		index++;
	}

	return 0;
}

static int dwc3_glue_remove(struct udevice *dev)
{
	struct dwc3_glue_data *glue = dev_get_platdata(dev);

	reset_release_bulk(&glue->resets);

	clk_release_bulk(&glue->clks);

	return dm_scan_fdt_dev(dev);
}

static const struct udevice_id dwc3_glue_ids[] = {
	{ .compatible = "xlnx,zynqmp-dwc3" },
	{ .compatible = "ti,dwc3", .data = (ulong)&ti_ops },
	{ }
};

U_BOOT_DRIVER(dwc3_generic_wrapper) = {
	.name	= "dwc3-generic-wrapper",
	.id	= UCLASS_MISC,
	.of_match = dwc3_glue_ids,
	.bind = dwc3_glue_bind,
	.probe = dwc3_glue_probe,
	.remove = dwc3_glue_remove,
	.platdata_auto_alloc_size = sizeof(struct dwc3_glue_data),

};
Commit	Line	Data
22929e12	1	// SPDX-License-Identifier: GPL-2.0
49d67454 MS	2	/*
	3	* Generic DWC3 Glue layer
	4	*
	5	* Copyright (C) 2016 - 2018 Xilinx, Inc.
	6	*
	7	* Based on dwc3-omap.c.
	8	*/
	9
	10	#include <common.h>
93991cf1	11	#include <asm-generic/io.h>
49d67454 MS	12	#include <dm.h>
	13	#include <dm/device-internal.h>
	14	#include <dm/lists.h>
446e3a20	15	#include <dwc3-uboot.h>
49d67454 MS	16	#include <linux/usb/ch9.h>
	17	#include <linux/usb/gadget.h>
	18	#include <malloc.h>
	19	#include <usb.h>
	20	#include "core.h"
	21	#include "gadget.h"
446e3a20 JJH	22	#include <reset.h>
446e3a20 JJH	23	#include <clk.h>
49d67454	24
687ab545	25	#if CONFIG_IS_ENABLED(DM_USB_GADGET)
446e3a20 JJH	26	struct dwc3_generic_peripheral {
	27	struct dwc3 dwc3;
	28	struct phy *phys;
	29	int num_phys;
	30	fdt_addr_t base;
	31	};
	32
ff8d7558	33	int dm_usb_gadget_handle_interrupts(struct udevice *dev)
49d67454	34	{
446e3a20 JJH	35	struct dwc3_generic_peripheral *priv = dev_get_priv(dev);
446e3a20 JJH	36	struct dwc3 *dwc3 = &priv->dwc3;
49d67454	37
446e3a20	38	dwc3_gadget_uboot_handle_interrupt(dwc3);
49d67454 MS	39
	40	return 0;
	41	}
	42
	43	static int dwc3_generic_peripheral_probe(struct udevice *dev)
	44	{
446e3a20 JJH	45	int rc;
	46	struct dwc3_generic_peripheral *priv = dev_get_priv(dev);
	47	struct dwc3 *dwc3 = &priv->dwc3;
	48
	49	rc = dwc3_setup_phy(dev, &priv->phys, &priv->num_phys);
	50	if (rc)
	51	return rc;
	52
	53	dwc3->regs = map_physmem(priv->base, DWC3_OTG_REGS_END, MAP_NOCACHE);
	54	dwc3->regs += DWC3_GLOBALS_REGS_START;
	55	dwc3->dev = dev;
	56
	57	rc = dwc3_init(dwc3);
	58	if (rc) {
	59	unmap_physmem(dwc3->regs, MAP_NOCACHE);
	60	return rc;
	61	}
49d67454	62
446e3a20	63	return 0;
49d67454 MS	64	}
	65
	66	static int dwc3_generic_peripheral_remove(struct udevice *dev)
	67	{
446e3a20 JJH	68	struct dwc3_generic_peripheral *priv = dev_get_priv(dev);
446e3a20 JJH	69	struct dwc3 *dwc3 = &priv->dwc3;
49d67454	70
446e3a20 JJH	71	dwc3_remove(dwc3);
	72	dwc3_shutdown_phy(dev, priv->phys, priv->num_phys);
	73	unmap_physmem(dwc3->regs, MAP_NOCACHE);
49d67454 MS	74
	75	return 0;
	76	}
	77
	78	static int dwc3_generic_peripheral_ofdata_to_platdata(struct udevice *dev)
	79	{
446e3a20 JJH	80	struct dwc3_generic_peripheral *priv = dev_get_priv(dev);
446e3a20 JJH	81	struct dwc3 *dwc3 = &priv->dwc3;
49d67454 MS	82	int node = dev_of_offset(dev);
49d67454 MS	83
446e3a20	84	priv->base = devfdt_get_addr(dev);
49d67454	85
446e3a20 JJH	86	dwc3->maximum_speed = usb_get_maximum_speed(node);
446e3a20 JJH	87	if (dwc3->maximum_speed == USB_SPEED_UNKNOWN) {
49d67454 MS	88	pr_err("Invalid usb maximum speed\n");
	89	return -ENODEV;
	90	}
	91
446e3a20 JJH	92	dwc3->dr_mode = usb_get_dr_mode(node);
446e3a20 JJH	93	if (dwc3->dr_mode == USB_DR_MODE_UNKNOWN) {
49d67454 MS	94	pr_err("Invalid usb mode setup\n");
	95	return -ENODEV;
	96	}
	97
	98	return 0;
	99	}
	100
49d67454 MS	101	U_BOOT_DRIVER(dwc3_generic_peripheral) = {
49d67454 MS	102	.name = "dwc3-generic-peripheral",
01311624	103	.id = UCLASS_USB_GADGET_GENERIC,
49d67454 MS	104	.ofdata_to_platdata = dwc3_generic_peripheral_ofdata_to_platdata,
	105	.probe = dwc3_generic_peripheral_probe,
	106	.remove = dwc3_generic_peripheral_remove,
446e3a20	107	.priv_auto_alloc_size = sizeof(struct dwc3_generic_peripheral),
49d67454	108	};
687ab545	109	#endif
49d67454	110
446e3a20 JJH	111	struct dwc3_glue_data {
	112	struct clk_bulk clks;
	113	struct reset_ctl_bulk resets;
93991cf1 JJH	114	fdt_addr_t regs;
	115	};
	116
	117	struct dwc3_glue_ops {
	118	void (select_dr_mode)(struct udevice dev, int index,
	119	enum usb_dr_mode mode);
446e3a20 JJH	120	};
446e3a20 JJH	121
d66e54ac JJH	122	void dwc3_ti_select_dr_mode(struct udevice *dev, int index,
	123	enum usb_dr_mode mode)
	124	{
	125	#define USBOTGSS_UTMI_OTG_STATUS 0x0084
	126	#define USBOTGSS_UTMI_OTG_OFFSET 0x0480
	127
	128	/* UTMI_OTG_STATUS REGISTER */
	129	#define USBOTGSS_UTMI_OTG_STATUS_SW_MODE BIT(31)
	130	#define USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT BIT(9)
	131	#define USBOTGSS_UTMI_OTG_STATUS_TXBITSTUFFENABLE BIT(8)
	132	#define USBOTGSS_UTMI_OTG_STATUS_IDDIG BIT(4)
	133	#define USBOTGSS_UTMI_OTG_STATUS_SESSEND BIT(3)
	134	#define USBOTGSS_UTMI_OTG_STATUS_SESSVALID BIT(2)
	135	#define USBOTGSS_UTMI_OTG_STATUS_VBUSVALID BIT(1)
	136	enum dwc3_omap_utmi_mode {
	137	DWC3_OMAP_UTMI_MODE_UNKNOWN = 0,
	138	DWC3_OMAP_UTMI_MODE_HW,
	139	DWC3_OMAP_UTMI_MODE_SW,
	140	};
	141
	142	u32 use_id_pin;
	143	u32 host_mode;
	144	u32 reg;
	145	u32 utmi_mode;
	146	u32 utmi_status_offset = USBOTGSS_UTMI_OTG_STATUS;
	147
	148	struct dwc3_glue_data *glue = dev_get_platdata(dev);
	149	void *base = map_physmem(glue->regs, 0x10000, MAP_NOCACHE);
	150
	151	if (device_is_compatible(dev, "ti,am437x-dwc3"))
	152	utmi_status_offset += USBOTGSS_UTMI_OTG_OFFSET;
	153
	154	utmi_mode = dev_read_u32_default(dev, "utmi-mode",
	155	DWC3_OMAP_UTMI_MODE_UNKNOWN);
	156	if (utmi_mode != DWC3_OMAP_UTMI_MODE_HW) {
	157	debug("%s: OTG is not supported. defaulting to PERIPHERAL\n",
	158	dev->name);
	159	mode = USB_DR_MODE_PERIPHERAL;
	160	}
	161
	162	switch (mode) {
	163	case USB_DR_MODE_PERIPHERAL:
	164	use_id_pin = 0;
	165	host_mode = 0;
	166	break;
	167	case USB_DR_MODE_HOST:
	168	use_id_pin = 0;
	169	host_mode = 1;
	170	break;
	171	case USB_DR_MODE_OTG:
	172	default:
	173	use_id_pin = 1;
	174	host_mode = 0;
	175	break;
	176	}
	177
	178	reg = readl(base + utmi_status_offset);
	179
	180	reg &= ~(USBOTGSS_UTMI_OTG_STATUS_SW_MODE);
	181	if (!use_id_pin)
	182	reg \|= USBOTGSS_UTMI_OTG_STATUS_SW_MODE;
	183
	184	writel(reg, base + utmi_status_offset);
	185
186	reg &= ~(USBOTGSS_UTMI_OTG_STATUS_SESSEND \|
187	USBOTGSS_UTMI_OTG_STATUS_VBUSVALID \|
188	USBOTGSS_UTMI_OTG_STATUS_IDDIG);
189
190	reg \|= USBOTGSS_UTMI_OTG_STATUS_SESSVALID \|
191	USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT;
192
193	if (!host_mode)
194	reg \|= USBOTGSS_UTMI_OTG_STATUS_IDDIG \|
195	USBOTGSS_UTMI_OTG_STATUS_VBUSVALID;
196
197	writel(reg, base + utmi_status_offset);
198
199	unmap_physmem(base, MAP_NOCACHE);
200	}
201
202	struct dwc3_glue_ops ti_ops = {
203	.select_dr_mode = dwc3_ti_select_dr_mode,
204	};
205
446e3a20	206	static int dwc3_glue_bind(struct udevice *parent)
49d67454 MS	207	{
	208	const void *fdt = gd->fdt_blob;
	209	int node;
	210	int ret;
	211
	212	for (node = fdt_first_subnode(fdt, dev_of_offset(parent)); node > 0;
	213	node = fdt_next_subnode(fdt, node)) {
	214	const char *name = fdt_get_name(fdt, node, NULL);
	215	enum usb_dr_mode dr_mode;
	216	struct udevice *dev;
446e3a20	217	const char *driver = NULL;
49d67454 MS	218
49d67454 MS	219	debug("%s: subnode name: %s\n", __func__, name);
49d67454 MS	220
	221	dr_mode = usb_get_dr_mode(node);
	222
	223	switch (dr_mode) {
	224	case USB_DR_MODE_PERIPHERAL:
	225	case USB_DR_MODE_OTG:
446e3a20	226	#if CONFIG_IS_ENABLED(DM_USB_GADGET)
49d67454 MS	227	debug("%s: dr_mode: OTG or Peripheral\n", __func__);
49d67454 MS	228	driver = "dwc3-generic-peripheral";
446e3a20	229	#endif
49d67454 MS	230	break;
	231	case USB_DR_MODE_HOST:
	232	debug("%s: dr_mode: HOST\n", __func__);
446e3a20	233	driver = "xhci-dwc3";
49d67454 MS	234	break;
	235	default:
	236	debug("%s: unsupported dr_mode\n", __func__);
	237	return -ENODEV;
	238	};
	239
446e3a20 JJH	240	if (!driver)
	241	continue;
	242
49d67454 MS	243	ret = device_bind_driver_to_node(parent, driver, name,
	244	offset_to_ofnode(node), &dev);
	245	if (ret) {
	246	debug("%s: not able to bind usb device mode\n",
	247	__func__);
	248	return ret;
	249	}
	250	}
	251
	252	return 0;
	253	}
	254
446e3a20 JJH	255	static int dwc3_glue_reset_init(struct udevice *dev,
	256	struct dwc3_glue_data *glue)
	257	{
	258	int ret;
	259
	260	ret = reset_get_bulk(dev, &glue->resets);
	261	if (ret == -ENOTSUPP)
	262	return 0;
	263	else if (ret)
	264	return ret;
	265
	266	ret = reset_deassert_bulk(&glue->resets);
	267	if (ret) {
	268	reset_release_bulk(&glue->resets);
	269	return ret;
	270	}
	271
	272	return 0;
	273	}
	274
	275	static int dwc3_glue_clk_init(struct udevice *dev,
	276	struct dwc3_glue_data *glue)
	277	{
	278	int ret;
	279
	280	ret = clk_get_bulk(dev, &glue->clks);
	281	if (ret == -ENOSYS)
	282	return 0;
	283	if (ret)
	284	return ret;
	285
	286	#if CONFIG_IS_ENABLED(CLK)
	287	ret = clk_enable_bulk(&glue->clks);
	288	if (ret) {
	289	clk_release_bulk(&glue->clks);
	290	return ret;
	291	}
	292	#endif
	293
	294	return 0;
	295	}
	296
	297	static int dwc3_glue_probe(struct udevice *dev)
	298	{
93991cf1	299	struct dwc3_glue_ops ops = (struct dwc3_glue_ops )dev_get_driver_data(dev);
446e3a20	300	struct dwc3_glue_data *glue = dev_get_platdata(dev);
93991cf1 JJH	301	struct udevice *child = NULL;
93991cf1 JJH	302	int index = 0;
446e3a20 JJH	303	int ret;
446e3a20 JJH	304
93991cf1 JJH	305	glue->regs = dev_read_addr(dev);
93991cf1 JJH	306
446e3a20 JJH	307	ret = dwc3_glue_clk_init(dev, glue);
	308	if (ret)
	309	return ret;
	310
	311	ret = dwc3_glue_reset_init(dev, glue);
	312	if (ret)
	313	return ret;
	314
93991cf1 JJH	315	ret = device_find_first_child(dev, &child);
	316	if (ret)
	317	return ret;
	318
	319	while (child) {
	320	enum usb_dr_mode dr_mode;
	321
	322	dr_mode = usb_get_dr_mode(dev_of_offset(child));
	323	device_find_next_child(&child);
	324	if (ops && ops->select_dr_mode)
	325	ops->select_dr_mode(dev, index, dr_mode);
	326	index++;
	327	}
	328
446e3a20 JJH	329	return 0;
	330	}
	331
	332	static int dwc3_glue_remove(struct udevice *dev)
	333	{
	334	struct dwc3_glue_data *glue = dev_get_platdata(dev);
	335
	336	reset_release_bulk(&glue->resets);
	337
	338	clk_release_bulk(&glue->clks);
	339
	340	return dm_scan_fdt_dev(dev);
	341	}
	342
	343	static const struct udevice_id dwc3_glue_ids[] = {
49d67454	344	{ .compatible = "xlnx,zynqmp-dwc3" },
d66e54ac	345	{ .compatible = "ti,dwc3", .data = (ulong)&ti_ops },
49d67454 MS	346	{ }
	347	};
	348
	349	U_BOOT_DRIVER(dwc3_generic_wrapper) = {
	350	.name = "dwc3-generic-wrapper",
	351	.id = UCLASS_MISC,
446e3a20 JJH	352	.of_match = dwc3_glue_ids,
	353	.bind = dwc3_glue_bind,
	354	.probe = dwc3_glue_probe,
	355	.remove = dwc3_glue_remove,
	356	.platdata_auto_alloc_size = sizeof(struct dwc3_glue_data),
	357
49d67454	358	};