[J-u-boot.git] / arch / powerpc / cpu / mpc8xxx / fdt.c

/*
 * Copyright 2009-2012 Freescale Semiconductor, Inc.
 *
 * This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and
 * arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains
 * cpu specific common code for 85xx/86xx processors.
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <libfdt.h>
#include <fdt_support.h>
#include <asm/mp.h>
#include <asm/fsl_serdes.h>
#include <phy.h>
#include <hwconfig.h>

#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
#define CONFIG_USB_MAX_CONTROLLER_COUNT	1
#endif

#if defined(CONFIG_MP) && (defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx))
static int ft_del_cpuhandle(void *blob, int cpuhandle)
{
	int off, ret = -FDT_ERR_NOTFOUND;

	/* if we find a match, we'll delete at it which point the offsets are
	 * invalid so we start over from the beginning
	 */
	off = fdt_node_offset_by_prop_value(blob, -1, "cpu-handle",
						&cpuhandle, 4);
	while (off != -FDT_ERR_NOTFOUND) {
		fdt_delprop(blob, off, "cpu-handle");
		ret = 1;
		off = fdt_node_offset_by_prop_value(blob, -1, "cpu-handle",
				&cpuhandle, 4);
	}

	return ret;
}

void ft_fixup_num_cores(void *blob) {
	int off, num_cores, del_cores;

	del_cores = 0;
	num_cores = cpu_numcores();

	off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
	while (off != -FDT_ERR_NOTFOUND) {
		u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
		u32 phys_cpu_id = thread_to_core(*reg);

		if (!is_core_valid(phys_cpu_id) || is_core_disabled(phys_cpu_id)) {
			int ph = fdt_get_phandle(blob, off);

			/* Delete the cpu node once there are no cpu handles */
			if (-FDT_ERR_NOTFOUND == ft_del_cpuhandle(blob, ph)) {
				fdt_del_node(blob, off);
				del_cores++;
			}
			/* either we deleted some cpu handles or the cpu node
			 * so we reset the offset back to the start since we
			 * can't trust the offsets anymore
			 */
			off = -1;
		}
		off = fdt_node_offset_by_prop_value(blob, off,
				"device_type", "cpu", 4);
	}
	debug ("%x core system found\n", num_cores);
	debug ("deleted %d extra core entry entries from device tree\n",
								del_cores);
}
#endif /* defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) */

#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB)
static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
				const char *phy_type, int start_offset)
{
	const char *compat_dr = "fsl-usb2-dr";
	const char *compat_mph = "fsl-usb2-mph";
	const char *prop_mode = "dr_mode";
	const char *prop_type = "phy_type";
	const char *node_type = NULL;
	int node_offset;
	int err;

	node_offset = fdt_node_offset_by_compatible(blob,
			start_offset, compat_mph);
	if (node_offset < 0) {
		node_offset = fdt_node_offset_by_compatible(blob,
			start_offset, compat_dr);
		if (node_offset < 0) {
			printf("WARNING: could not find compatible"
				" node %s or %s: %s.\n", compat_mph,
				compat_dr, fdt_strerror(node_offset));
			return -1;
		} else
			node_type = compat_dr;
	} else
		node_type = compat_mph;

	if (mode) {
		err = fdt_setprop(blob, node_offset, prop_mode, mode,
				  strlen(mode) + 1);
		if (err < 0)
			printf("WARNING: could not set %s for %s: %s.\n",
			       prop_mode, node_type, fdt_strerror(err));
	}

	if (phy_type) {
		err = fdt_setprop(blob, node_offset, prop_type, phy_type,
				  strlen(phy_type) + 1);
		if (err < 0)
			printf("WARNING: could not set %s for %s: %s.\n",
			       prop_type, node_type, fdt_strerror(err));
	}

	return node_offset;
}

void fdt_fixup_dr_usb(void *blob, bd_t *bd)
{
	const char *modes[] = { "host", "peripheral", "otg" };
	const char *phys[] = { "ulpi", "utmi" };
	const char *dr_mode_type = NULL;
	const char *dr_phy_type = NULL;
	int usb_mode_off = -1;
	int usb_phy_off = -1;
	char str[5];
	int i, j;

	for (i = 1; i <= CONFIG_USB_MAX_CONTROLLER_COUNT; i++) {
		int mode_idx = -1, phy_idx = -1;
		snprintf(str, 5, "%s%d", "usb", i);
		if (hwconfig(str)) {
			for (j = 0; j < ARRAY_SIZE(modes); j++) {
				if (hwconfig_subarg_cmp(str, "dr_mode",
						modes[j])) {
					mode_idx = j;
					break;
				}
			}

			for (j = 0; j < ARRAY_SIZE(phys); j++) {
				if (hwconfig_subarg_cmp(str, "phy_type",
						phys[j])) {
					phy_idx = j;
					break;
				}
			}

			if (mode_idx < 0 || phy_idx < 0) {
				puts("ERROR: wrong usb mode/phy defined!!\n");
				return;
			}

			dr_mode_type = modes[mode_idx];
			dr_phy_type = phys[phy_idx];

			if (mode_idx < 0 && phy_idx < 0) {
				printf("WARNING: invalid phy or mode\n");
				return;
			}
		}

		usb_mode_off = fdt_fixup_usb_mode_phy_type(blob,
			dr_mode_type, NULL, usb_mode_off);

		if (usb_mode_off < 0)
			return;

		usb_phy_off = fdt_fixup_usb_mode_phy_type(blob,
			NULL, dr_phy_type, usb_phy_off);

		if (usb_phy_off < 0)
			return;
	}
}
#endif /* defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB) */

/*
 * update crypto node properties to a specified revision of the SEC
 * called with sec_rev == 0 if not on an E processor
 */
#if CONFIG_SYS_FSL_SEC_COMPAT == 2 /* SEC 2.x/3.x */
void fdt_fixup_crypto_node(void *blob, int sec_rev)
{
	static const struct sec_rev_prop {
		u32 sec_rev;
		u32 num_channels;
		u32 channel_fifo_len;
		u32 exec_units_mask;
		u32 descriptor_types_mask;
	} sec_rev_prop_list [] = {
		{ 0x0200, 4, 24, 0x07e, 0x01010ebf }, /* SEC 2.0 */
		{ 0x0201, 4, 24, 0x0fe, 0x012b0ebf }, /* SEC 2.1 */
		{ 0x0202, 1, 24, 0x04c, 0x0122003f }, /* SEC 2.2 */
		{ 0x0204, 4, 24, 0x07e, 0x012b0ebf }, /* SEC 2.4 */
		{ 0x0300, 4, 24, 0x9fe, 0x03ab0ebf }, /* SEC 3.0 */
		{ 0x0301, 4, 24, 0xbfe, 0x03ab0ebf }, /* SEC 3.1 */
		{ 0x0303, 4, 24, 0x97c, 0x03a30abf }, /* SEC 3.3 */
	};
	static char compat_strlist[ARRAY_SIZE(sec_rev_prop_list) *
				   sizeof("fsl,secX.Y")];
	int crypto_node, sec_idx, err;
	char *p;
	u32 val;

	/* locate crypto node based on lowest common compatible */
	crypto_node = fdt_node_offset_by_compatible(blob, -1, "fsl,sec2.0");
	if (crypto_node == -FDT_ERR_NOTFOUND)
		return;

	/* delete it if not on an E-processor */
	if (crypto_node > 0 && !sec_rev) {
		fdt_del_node(blob, crypto_node);
		return;
	}

	/* else we got called for possible uprev */
	for (sec_idx = 0; sec_idx < ARRAY_SIZE(sec_rev_prop_list); sec_idx++)
		if (sec_rev_prop_list[sec_idx].sec_rev == sec_rev)
			break;

	if (sec_idx == ARRAY_SIZE(sec_rev_prop_list)) {
		puts("warning: unknown SEC revision number\n");
		return;
	}

	val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].num_channels);
	err = fdt_setprop(blob, crypto_node, "fsl,num-channels", &val, 4);
	if (err < 0)
		printf("WARNING: could not set crypto property: %s\n",
		       fdt_strerror(err));

	val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].descriptor_types_mask);
	err = fdt_setprop(blob, crypto_node, "fsl,descriptor-types-mask", &val, 4);
	if (err < 0)
		printf("WARNING: could not set crypto property: %s\n",
		       fdt_strerror(err));

	val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].exec_units_mask);
	err = fdt_setprop(blob, crypto_node, "fsl,exec-units-mask", &val, 4);
	if (err < 0)
		printf("WARNING: could not set crypto property: %s\n",
		       fdt_strerror(err));

	val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].channel_fifo_len);
	err = fdt_setprop(blob, crypto_node, "fsl,channel-fifo-len", &val, 4);
	if (err < 0)
		printf("WARNING: could not set crypto property: %s\n",
		       fdt_strerror(err));

	val = 0;
	while (sec_idx >= 0) {
		p = compat_strlist + val;
		val += sprintf(p, "fsl,sec%d.%d",
			(sec_rev_prop_list[sec_idx].sec_rev & 0xff00) >> 8,
			sec_rev_prop_list[sec_idx].sec_rev & 0x00ff) + 1;
		sec_idx--;
	}
	err = fdt_setprop(blob, crypto_node, "compatible", &compat_strlist, val);
	if (err < 0)
		printf("WARNING: could not set crypto property: %s\n",
		       fdt_strerror(err));
}
#elif CONFIG_SYS_FSL_SEC_COMPAT >= 4  /* SEC4 */
static u8 caam_get_era(void)
{
	static const struct {
		u16 ip_id;
		u8 maj_rev;
		u8 era;
	} caam_eras[] = {
		{0x0A10, 1, 1},
		{0x0A10, 2, 2},
		{0x0A12, 1, 3},
		{0x0A14, 1, 3},
		{0x0A14, 2, 4},
		{0x0A16, 1, 4},
		{0x0A10, 3, 4},
		{0x0A11, 1, 4},
		{0x0A18, 1, 4},
		{0x0A11, 2, 5},
		{0x0A12, 2, 5},
		{0x0A13, 1, 5},
		{0x0A1C, 1, 5}
	};

	ccsr_sec_t __iomem *sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
	u32 secvid_ms = in_be32(&sec->secvid_ms);
	u32 ccbvid = in_be32(&sec->ccbvid);
	u16 ip_id = (secvid_ms & SEC_SECVID_MS_IPID_MASK) >>
				SEC_SECVID_MS_IPID_SHIFT;
	u8 maj_rev = (secvid_ms & SEC_SECVID_MS_MAJ_REV_MASK) >>
				SEC_SECVID_MS_MAJ_REV_SHIFT;
	u8 era = (ccbvid & SEC_CCBVID_ERA_MASK) >> SEC_CCBVID_ERA_SHIFT;

	int i;

	if (era)	/* This is '0' prior to CAAM ERA-6 */
		return era;

	for (i = 0; i < ARRAY_SIZE(caam_eras); i++)
		if (caam_eras[i].ip_id == ip_id &&
		    caam_eras[i].maj_rev == maj_rev)
			return caam_eras[i].era;

	return 0;
}

static void fdt_fixup_crypto_era(void *blob, u32 era)
{
	int err;
	int crypto_node;

	crypto_node = fdt_path_offset(blob, "crypto");
	if (crypto_node < 0) {
		printf("WARNING: Missing crypto node\n");
		return;
	}

	err = fdt_setprop(blob, crypto_node, "fsl,sec-era", &era,
			  sizeof(era));
	if (err < 0) {
		printf("ERROR: could not set fsl,sec-era property: %s\n",
		       fdt_strerror(err));
	}
}

void fdt_fixup_crypto_node(void *blob, int sec_rev)
{
	u8 era;

	if (!sec_rev) {
		fdt_del_node_and_alias(blob, "crypto");
		return;
	}

	/* Add SEC ERA information in compatible */
	era = caam_get_era();
	if (era) {
		fdt_fixup_crypto_era(blob, era);
	} else {
		printf("WARNING: Unable to get ERA for CAAM rev: %d\n",
			sec_rev);
	}
}
#endif

int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
{
	return fdt_setprop_string(blob, offset, "phy-connection-type",
					 phy_string_for_interface(phyc));
}

#ifdef CONFIG_SYS_SRIO
static inline void ft_disable_srio_port(void *blob, int srio_off, int port)
{
	int off = fdt_node_offset_by_prop_value(blob, srio_off,
			"cell-index", &port, 4);
	if (off >= 0) {
		off = fdt_setprop_string(blob, off, "status", "disabled");
		if (off > 0)
			printf("WARNING unable to set status for fsl,srio "
				"port %d: %s\n", port, fdt_strerror(off));
	}
}

static inline void ft_disable_rman(void *blob)
{
	int off = fdt_node_offset_by_compatible(blob, -1, "fsl,rman");
	if (off >= 0) {
		off = fdt_setprop_string(blob, off, "status", "disabled");
		if (off > 0)
			printf("WARNING unable to set status for fsl,rman %s\n",
				fdt_strerror(off));
	}
}

static inline void ft_disable_rmu(void *blob)
{
	int off = fdt_node_offset_by_compatible(blob, -1, "fsl,srio-rmu");
	if (off >= 0) {
		off = fdt_setprop_string(blob, off, "status", "disabled");
		if (off > 0)
			printf("WARNING unable to set status for "
				"fsl,srio-rmu %s\n", fdt_strerror(off));
	}
}

void ft_srio_setup(void *blob)
{
	int srio1_used = 0, srio2_used = 0;
	int srio_off;

	/* search for srio node, if doesn't exist just return - nothing todo */
	srio_off = fdt_node_offset_by_compatible(blob, -1, "fsl,srio");
	if (srio_off < 0)
		return ;

#ifdef CONFIG_SRIO1
	if (is_serdes_configured(SRIO1))
		srio1_used = 1;
#endif
#ifdef CONFIG_SRIO2
	if (is_serdes_configured(SRIO2))
		srio2_used = 1;
#endif

	/* mark port1 disabled */
	if (!srio1_used)
		ft_disable_srio_port(blob, srio_off, 1);

	/* mark port2 disabled */
	if (!srio2_used)
		ft_disable_srio_port(blob, srio_off, 2);

	/* if both ports not used, disable controller, rmu and rman */
	if (!srio1_used && !srio2_used) {
		fdt_setprop_string(blob, srio_off, "status", "disabled");

		ft_disable_rman(blob);
		ft_disable_rmu(blob);
	}
}
#endif
Commit	Line	Data
f8027f6b	1	/*
5a52977f	2	* Copyright 2009-2012 Freescale Semiconductor, Inc.
f8027f6b	3	*
a47a12be SR	4	* This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and
a47a12be SR	5	* arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains
8d1f2682	6	* cpu specific common code for 85xx/86xx processors.
1a459660	7	* SPDX-License-Identifier: GPL-2.0+
f8027f6b PA	8	*/
	9
	10	#include <common.h>
	11	#include <libfdt.h>
	12	#include <fdt_support.h>
8f3a7fa4	13	#include <asm/mp.h>
a09b9b68	14	#include <asm/fsl_serdes.h>
865ff856	15	#include <phy.h>
72f4980b	16	#include <hwconfig.h>
57567361	17
f1810d85	18	#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
	19	#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
	20	#endif
f8027f6b	21
8f3a7fa4	22	#if defined(CONFIG_MP) && (defined(CONFIG_MPC85xx) \|\| defined(CONFIG_MPC86xx))
11beefa3 KG	23	static int ft_del_cpuhandle(void *blob, int cpuhandle)
	24	{
	25	int off, ret = -FDT_ERR_NOTFOUND;
	26
	27	/* if we find a match, we'll delete at it which point the offsets are
	28	* invalid so we start over from the beginning
	29	*/
	30	off = fdt_node_offset_by_prop_value(blob, -1, "cpu-handle",
	31	&cpuhandle, 4);
	32	while (off != -FDT_ERR_NOTFOUND) {
	33	fdt_delprop(blob, off, "cpu-handle");
	34	ret = 1;
	35	off = fdt_node_offset_by_prop_value(blob, -1, "cpu-handle",
	36	&cpuhandle, 4);
	37	}
	38
	39	return ret;
	40	}
	41
f8027f6b PA	42	void ft_fixup_num_cores(void *blob) {
	43	int off, num_cores, del_cores;
	44
	45	del_cores = 0;
	46	num_cores = cpu_numcores();
	47
	48	off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
	49	while (off != -FDT_ERR_NOTFOUND) {
	50	u32 reg = (u32 )fdt_getprop(blob, off, "reg", 0);
709389b6	51	u32 phys_cpu_id = thread_to_core(*reg);
f8027f6b	52
709389b6	53	if (!is_core_valid(phys_cpu_id) \|\| is_core_disabled(phys_cpu_id)) {
11beefa3 KG	54	int ph = fdt_get_phandle(blob, off);
	55
	56	/* Delete the cpu node once there are no cpu handles */
	57	if (-FDT_ERR_NOTFOUND == ft_del_cpuhandle(blob, ph)) {
	58	fdt_del_node(blob, off);
	59	del_cores++;
	60	}
	61	/* either we deleted some cpu handles or the cpu node
	62	* so we reset the offset back to the start since we
	63	* can't trust the offsets anymore
	64	*/
f8027f6b PA	65	off = -1;
	66	}
	67	off = fdt_node_offset_by_prop_value(blob, off,
	68	"device_type", "cpu", 4);
	69	}
	70	debug ("%x core system found\n", num_cores);
	71	debug ("deleted %d extra core entry entries from device tree\n",
	72	del_cores);
	73	}
5d0c3b57 KP	74	#endif /* defined(CONFIG_MPC85xx) \|\| defined(CONFIG_MPC86xx) */
5d0c3b57 KP	75
79f49120	76	#if defined(CONFIG_HAS_FSL_DR_USB) \|\| defined(CONFIG_HAS_FSL_MPH_USB)
4765fb7d RM	77	static int fdt_fixup_usb_mode_phy_type(void blob, const char mode,
4765fb7d RM	78	const char *phy_type, int start_offset)
5d0c3b57	79	{
79f49120	80	const char *compat_dr = "fsl-usb2-dr";
79f49120	81	const char *compat_mph = "fsl-usb2-mph";
5d0c3b57 KP	82	const char *prop_mode = "dr_mode";
5d0c3b57 KP	83	const char *prop_type = "phy_type";
79f49120	84	const char *node_type = NULL;
5d0c3b57 KP	85	int node_offset;
	86	int err;
	87
72f4980b	88	node_offset = fdt_node_offset_by_compatible(blob,
79f49120	89	start_offset, compat_mph);
5d0c3b57	90	if (node_offset < 0) {
79f49120	91	node_offset = fdt_node_offset_by_compatible(blob,
	92	start_offset, compat_dr);
	93	if (node_offset < 0) {
	94	printf("WARNING: could not find compatible"
	95	" node %s or %s: %s.\n", compat_mph,
	96	compat_dr, fdt_strerror(node_offset));
	97	return -1;
	98	} else
	99	node_type = compat_dr;
	100	} else
	101	node_type = compat_mph;
5d0c3b57 KP	102
	103	if (mode) {
	104	err = fdt_setprop(blob, node_offset, prop_mode, mode,
	105	strlen(mode) + 1);
	106	if (err < 0)
	107	printf("WARNING: could not set %s for %s: %s.\n",
79f49120	108	prop_mode, node_type, fdt_strerror(err));
5d0c3b57 KP	109	}
5d0c3b57 KP	110
72f4980b RM	111	if (phy_type) {
	112	err = fdt_setprop(blob, node_offset, prop_type, phy_type,
	113	strlen(phy_type) + 1);
5d0c3b57 KP	114	if (err < 0)
5d0c3b57 KP	115	printf("WARNING: could not set %s for %s: %s.\n",
79f49120	116	prop_type, node_type, fdt_strerror(err));
5d0c3b57	117	}
72f4980b	118
4765fb7d	119	return node_offset;
72f4980b RM	120	}
	121
	122	void fdt_fixup_dr_usb(void blob, bd_t bd)
	123	{
	124	const char *modes[] = { "host", "peripheral", "otg" };
4765fb7d	125	const char *phys[] = { "ulpi", "utmi" };
9c889ece	126	const char *dr_mode_type = NULL;
9c889ece	127	const char *dr_phy_type = NULL;
4765fb7d RM	128	int usb_mode_off = -1;
4765fb7d RM	129	int usb_phy_off = -1;
72f4980b RM	130	char str[5];
	131	int i, j;
	132
f1810d85	133	for (i = 1; i <= CONFIG_USB_MAX_CONTROLLER_COUNT; i++) {
72f4980b	134	int mode_idx = -1, phy_idx = -1;
5a52977f	135	snprintf(str, 5, "%s%d", "usb", i);
72f4980b	136	if (hwconfig(str)) {
5a52977f	137	for (j = 0; j < ARRAY_SIZE(modes); j++) {
72f4980b RM	138	if (hwconfig_subarg_cmp(str, "dr_mode",
	139	modes[j])) {
	140	mode_idx = j;
	141	break;
	142	}
	143	}
9c889ece	144
5a52977f	145	for (j = 0; j < ARRAY_SIZE(phys); j++) {
72f4980b RM	146	if (hwconfig_subarg_cmp(str, "phy_type",
	147	phys[j])) {
	148	phy_idx = j;
	149	break;
	150	}
	151	}
9c889ece	152
dda48e8e	153	if (mode_idx < 0 \|\| phy_idx < 0) {
	154	puts("ERROR: wrong usb mode/phy defined!!\n");
	155	return;
	156	}
	157
9c889ece	158	dr_mode_type = modes[mode_idx];
	159	dr_phy_type = phys[phy_idx];
	160
9c889ece	161	if (mode_idx < 0 && phy_idx < 0) {
72f4980b	162	printf("WARNING: invalid phy or mode\n");
9c889ece	163	return;
9c889ece	164	}
72f4980b	165	}
9c889ece	166
	167	usb_mode_off = fdt_fixup_usb_mode_phy_type(blob,
	168	dr_mode_type, NULL, usb_mode_off);
	169
	170	if (usb_mode_off < 0)
	171	return;
	172
	173	usb_phy_off = fdt_fixup_usb_mode_phy_type(blob,
	174	NULL, dr_phy_type, usb_phy_off);
	175
	176	if (usb_phy_off < 0)
	177	return;
72f4980b	178	}
5d0c3b57	179	}
79f49120	180	#endif /* defined(CONFIG_HAS_FSL_DR_USB) \|\| defined(CONFIG_HAS_FSL_MPH_USB) */
5d0c3b57	181
5d0c3b57 KP	182	/*
5d0c3b57 KP	183	* update crypto node properties to a specified revision of the SEC
929a2138	184	* called with sec_rev == 0 if not on an E processor
5d0c3b57	185	*/
929a2138	186	#if CONFIG_SYS_FSL_SEC_COMPAT == 2 /* SEC 2.x/3.x */
5d0c3b57 KP	187	void fdt_fixup_crypto_node(void *blob, int sec_rev)
5d0c3b57 KP	188	{
345d6efd	189	static const struct sec_rev_prop {
5d0c3b57 KP	190	u32 sec_rev;
	191	u32 num_channels;
	192	u32 channel_fifo_len;
	193	u32 exec_units_mask;
	194	u32 descriptor_types_mask;
	195	} sec_rev_prop_list [] = {
	196	{ 0x0200, 4, 24, 0x07e, 0x01010ebf }, /* SEC 2.0 */
	197	{ 0x0201, 4, 24, 0x0fe, 0x012b0ebf }, /* SEC 2.1 */
	198	{ 0x0202, 1, 24, 0x04c, 0x0122003f }, /* SEC 2.2 */
	199	{ 0x0204, 4, 24, 0x07e, 0x012b0ebf }, /* SEC 2.4 */
	200	{ 0x0300, 4, 24, 0x9fe, 0x03ab0ebf }, /* SEC 3.0 */
	201	{ 0x0301, 4, 24, 0xbfe, 0x03ab0ebf }, /* SEC 3.1 */
	202	{ 0x0303, 4, 24, 0x97c, 0x03a30abf }, /* SEC 3.3 */
	203	};
345d6efd KP	204	static char compat_strlist[ARRAY_SIZE(sec_rev_prop_list) *
345d6efd KP	205	sizeof("fsl,secX.Y")];
5d0c3b57 KP	206	int crypto_node, sec_idx, err;
	207	char *p;
	208	u32 val;
	209
	210	/* locate crypto node based on lowest common compatible */
	211	crypto_node = fdt_node_offset_by_compatible(blob, -1, "fsl,sec2.0");
	212	if (crypto_node == -FDT_ERR_NOTFOUND)
	213	return;
	214
	215	/* delete it if not on an E-processor */
	216	if (crypto_node > 0 && !sec_rev) {
	217	fdt_del_node(blob, crypto_node);
	218	return;
	219	}
	220
	221	/* else we got called for possible uprev */
	222	for (sec_idx = 0; sec_idx < ARRAY_SIZE(sec_rev_prop_list); sec_idx++)
	223	if (sec_rev_prop_list[sec_idx].sec_rev == sec_rev)
	224	break;
	225
	226	if (sec_idx == ARRAY_SIZE(sec_rev_prop_list)) {
	227	puts("warning: unknown SEC revision number\n");
	228	return;
	229	}
	230
	231	val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].num_channels);
	232	err = fdt_setprop(blob, crypto_node, "fsl,num-channels", &val, 4);
	233	if (err < 0)
	234	printf("WARNING: could not set crypto property: %s\n",
	235	fdt_strerror(err));
	236
	237	val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].descriptor_types_mask);
	238	err = fdt_setprop(blob, crypto_node, "fsl,descriptor-types-mask", &val, 4);
	239	if (err < 0)
	240	printf("WARNING: could not set crypto property: %s\n",
	241	fdt_strerror(err));
	242
	243	val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].exec_units_mask);
	244	err = fdt_setprop(blob, crypto_node, "fsl,exec-units-mask", &val, 4);
	245	if (err < 0)
	246	printf("WARNING: could not set crypto property: %s\n",
	247	fdt_strerror(err));
	248
	249	val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].channel_fifo_len);
	250	err = fdt_setprop(blob, crypto_node, "fsl,channel-fifo-len", &val, 4);
	251	if (err < 0)
	252	printf("WARNING: could not set crypto property: %s\n",
	253	fdt_strerror(err));
	254
	255	val = 0;
	256	while (sec_idx >= 0) {
	257	p = compat_strlist + val;
	258	val += sprintf(p, "fsl,sec%d.%d",
	259	(sec_rev_prop_list[sec_idx].sec_rev & 0xff00) >> 8,
	260	sec_rev_prop_list[sec_idx].sec_rev & 0x00ff) + 1;
	261	sec_idx--;
	262	}
	263	err = fdt_setprop(blob, crypto_node, "compatible", &compat_strlist, val);
	264	if (err < 0)
	265	printf("WARNING: could not set crypto property: %s\n",
	266	fdt_strerror(err));
	267	}
22f292c7	268	#elif CONFIG_SYS_FSL_SEC_COMPAT >= 4 /* SEC4 */
5e95e2d8 VG	269	static u8 caam_get_era(void)
	270	{
	271	static const struct {
	272	u16 ip_id;
	273	u8 maj_rev;
	274	u8 era;
	275	} caam_eras[] = {
	276	{0x0A10, 1, 1},
	277	{0x0A10, 2, 2},
	278	{0x0A12, 1, 3},
	279	{0x0A14, 1, 3},
	280	{0x0A14, 2, 4},
	281	{0x0A16, 1, 4},
	282	{0x0A10, 3, 4},
	283	{0x0A11, 1, 4},
	284	{0x0A18, 1, 4},
	285	{0x0A11, 2, 5},
	286	{0x0A12, 2, 5},
	287	{0x0A13, 1, 5},
	288	{0x0A1C, 1, 5}
	289	};
	290
	291	ccsr_sec_t __iomem sec = (void __iomem )CONFIG_SYS_FSL_SEC_ADDR;
	292	u32 secvid_ms = in_be32(&sec->secvid_ms);
	293	u32 ccbvid = in_be32(&sec->ccbvid);
	294	u16 ip_id = (secvid_ms & SEC_SECVID_MS_IPID_MASK) >>
	295	SEC_SECVID_MS_IPID_SHIFT;
	296	u8 maj_rev = (secvid_ms & SEC_SECVID_MS_MAJ_REV_MASK) >>
	297	SEC_SECVID_MS_MAJ_REV_SHIFT;
	298	u8 era = (ccbvid & SEC_CCBVID_ERA_MASK) >> SEC_CCBVID_ERA_SHIFT;
	299
	300	int i;
	301
	302	if (era) /* This is '0' prior to CAAM ERA-6 */
	303	return era;
	304
	305	for (i = 0; i < ARRAY_SIZE(caam_eras); i++)
	306	if (caam_eras[i].ip_id == ip_id &&
	307	caam_eras[i].maj_rev == maj_rev)
	308	return caam_eras[i].era;
	309
	310	return 0;
	311	}
	312
	313	static void fdt_fixup_crypto_era(void *blob, u32 era)
	314	{
	315	int err;
	316	int crypto_node;
	317
	318	crypto_node = fdt_path_offset(blob, "crypto");
	319	if (crypto_node < 0) {
	320	printf("WARNING: Missing crypto node\n");
	321	return;
	322	}
	323
	324	err = fdt_setprop(blob, crypto_node, "fsl,sec-era", &era,
	325	sizeof(era));
	326	if (err < 0) {
	327	printf("ERROR: could not set fsl,sec-era property: %s\n",
	328	fdt_strerror(err));
	329	}
	330	}
	331
22f292c7 KP	332	void fdt_fixup_crypto_node(void *blob, int sec_rev)
22f292c7 KP	333	{
5e95e2d8 VG	334	u8 era;
	335
	336	if (!sec_rev) {
22f292c7	337	fdt_del_node_and_alias(blob, "crypto");
5e95e2d8 VG	338	return;
	339	}
	340
	341	/* Add SEC ERA information in compatible */
	342	era = caam_get_era();
	343	if (era) {
	344	fdt_fixup_crypto_era(blob, era);
	345	} else {
	346	printf("WARNING: Unable to get ERA for CAAM rev: %d\n",
	347	sec_rev);
	348	}
22f292c7	349	}
929a2138	350	#endif
a1964ea5	351
865ff856	352	int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
a1964ea5	353	{
a1964ea5	354	return fdt_setprop_string(blob, offset, "phy-connection-type",
865ff856	355	phy_string_for_interface(phyc));
a1964ea5	356	}
a09b9b68 KG	357
a09b9b68 KG	358	#ifdef CONFIG_SYS_SRIO
9c42ef61 KG	359	static inline void ft_disable_srio_port(void *blob, int srio_off, int port)
	360	{
	361	int off = fdt_node_offset_by_prop_value(blob, srio_off,
	362	"cell-index", &port, 4);
	363	if (off >= 0) {
	364	off = fdt_setprop_string(blob, off, "status", "disabled");
	365	if (off > 0)
	366	printf("WARNING unable to set status for fsl,srio "
	367	"port %d: %s\n", port, fdt_strerror(off));
	368	}
	369	}
	370
	371	static inline void ft_disable_rman(void *blob)
	372	{
	373	int off = fdt_node_offset_by_compatible(blob, -1, "fsl,rman");
	374	if (off >= 0) {
	375	off = fdt_setprop_string(blob, off, "status", "disabled");
	376	if (off > 0)
	377	printf("WARNING unable to set status for fsl,rman %s\n",
	378	fdt_strerror(off));
	379	}
	380	}
	381
	382	static inline void ft_disable_rmu(void *blob)
	383	{
	384	int off = fdt_node_offset_by_compatible(blob, -1, "fsl,srio-rmu");
	385	if (off >= 0) {
	386	off = fdt_setprop_string(blob, off, "status", "disabled");
	387	if (off > 0)
	388	printf("WARNING unable to set status for "
	389	"fsl,srio-rmu %s\n", fdt_strerror(off));
	390	}
	391	}
	392
a09b9b68 KG	393	void ft_srio_setup(void *blob)
a09b9b68 KG	394	{
9c42ef61 KG	395	int srio1_used = 0, srio2_used = 0;
	396	int srio_off;
	397
	398	/* search for srio node, if doesn't exist just return - nothing todo */
	399	srio_off = fdt_node_offset_by_compatible(blob, -1, "fsl,srio");
	400	if (srio_off < 0)
	401	return ;
	402
a09b9b68	403	#ifdef CONFIG_SRIO1
9c42ef61 KG	404	if (is_serdes_configured(SRIO1))
9c42ef61 KG	405	srio1_used = 1;
a09b9b68 KG	406	#endif
a09b9b68 KG	407	#ifdef CONFIG_SRIO2
9c42ef61 KG	408	if (is_serdes_configured(SRIO2))
9c42ef61 KG	409	srio2_used = 1;
a09b9b68	410	#endif
9c42ef61 KG	411
	412	/* mark port1 disabled */
	413	if (!srio1_used)
	414	ft_disable_srio_port(blob, srio_off, 1);
	415
	416	/* mark port2 disabled */
	417	if (!srio2_used)
	418	ft_disable_srio_port(blob, srio_off, 2);
	419
	420	/* if both ports not used, disable controller, rmu and rman */
	421	if (!srio1_used && !srio2_used) {
	422	fdt_setprop_string(blob, srio_off, "status", "disabled");
	423
	424	ft_disable_rman(blob);
	425	ft_disable_rmu(blob);
	426	}
a09b9b68 KG	427	}
a09b9b68 KG	428	#endif