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1/*
2 * (C) Copyright 2007-2008
c9e798d3 3 * Stelian Pop <[email protected]>
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4 * Lead Tech Design <www.leadtechdesign.com>
5 *
0cb77bfa 6 * (C) Copyright 2009-2011
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7 * Daniel Gorsulowski <[email protected]>
8 * esd electronic system design gmbh <www.esd.eu>
9 *
10 * Configuation settings for the esd MEESC board.
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
31#ifndef __CONFIG_H
32#define __CONFIG_H
33
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34/*
35 * SoC must be defined first, before hardware.h is included.
36 * In this case SoC is defined in boards.cfg.
37 */
38#include <asm/hardware.h>
39
40/*
41 * Warning: changing CONFIG_SYS_TEXT_BASE requires
42 * adapting the initial boot program.
43 * Since the linker has to swallow that define, we must use a pure
44 * hex number here!
45 */
46#define CONFIG_SYS_TEXT_BASE 0x20002000
47
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48/*
49 * since a number of boards are not being listed in linux
50 * arch/arm/tools/mach-types any more, the mach-types have to be
51 * defined here
52 */
53#define MACH_TYPE_MEESC 2165
54#define MACH_TYPE_ETHERCAN2 2407
55
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56/* ARM asynchronous clock */
57#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */
9f07dede 58#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */
d4562e09 59#define CONFIG_SYS_HZ 1000 /* decrementer freq */
33b1d3f4 60
0cb77bfa 61/* Misc CPU related */
33b1d3f4 62#define CONFIG_SKIP_LOWLEVEL_INIT
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63#define CONFIG_ARCH_CPU_INIT
64#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */
65#define CONFIG_SETUP_MEMORY_TAGS
66#define CONFIG_INITRD_TAG
67#define CONFIG_SERIAL_TAG
68#define CONFIG_REVISION_TAG
69#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
a3f3897b 70#define CONFIG_MISC_INIT_R /* Call misc_init_r */
33b1d3f4 71
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72#define CONFIG_DISPLAY_BOARDINFO /* call checkboard() */
73#define CONFIG_DISPLAY_CPUINFO /* display cpu info and speed */
74#define CONFIG_PREBOOT /* enable preboot variable */
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75
76/*
77 * Hardware drivers
78 */
79
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80/* required until arch/arm/include/asm/arch-at91/at91sam9263.h is reworked */
81#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
82
83/* general purpose I/O */
84#define CONFIG_AT91_GPIO
85
33b1d3f4 86/* Console output */
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87#define CONFIG_ATMEL_USART
88#define CONFIG_USART_BASE ATMEL_BASE_DBGU
89#define CONFIG_USART_ID ATMEL_ID_SYS
90#define CONFIG_BAUDRATE 115200
33b1d3f4 91
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92#define CONFIG_BOOTDELAY 3
93#define CONFIG_ZERO_BOOTDELAY_CHECK
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94
95/*
96 * BOOTP options
97 */
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98#define CONFIG_BOOTP_BOOTFILESIZE
99#define CONFIG_BOOTP_BOOTPATH
100#define CONFIG_BOOTP_GATEWAY
101#define CONFIG_BOOTP_HOSTNAME
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102
103/*
104 * Command line configuration.
105 */
106#include <config_cmd_default.h>
107#undef CONFIG_CMD_BDI
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108#undef CONFIG_CMD_FPGA
109#undef CONFIG_CMD_LOADS
110#undef CONFIG_CMD_IMLS
33b1d3f4 111
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112#define CONFIG_CMD_PING
113#define CONFIG_CMD_DHCP
114#define CONFIG_CMD_NAND
115#define CONFIG_CMD_USB
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116
117/* LED */
0cb77bfa 118#define CONFIG_AT91_LED
33b1d3f4 119
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120/*
121 * SDRAM: 1 bank, min 32, max 128 MB
122 * Initialized before u-boot gets started.
123 */
124#define CONFIG_NR_DRAM_BANKS 1
125#define CONFIG_SYS_SDRAM_BASE 0x20000000 /* ATMEL_BASE_CS1 */
126#define CONFIG_SYS_SDRAM_SIZE 0x02000000
127
128#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
129#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000)
130#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000)
131
132/*
133 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
134 * leaving the correct space for initial global data structure above
135 * that address while providing maximum stack area below.
136 */
137#define CONFIG_SYS_INIT_SP_ADDR \
138 (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE)
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139
140/* DataFlash */
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141#ifdef CONFIG_SYS_USE_DATAFLASH
142# define CONFIG_ATMEL_DATAFLASH_SPI
143# define CONFIG_HAS_DATAFLASH
144# define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
145# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
146# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
147# define AT91_SPI_CLK 15000000
148# define DATAFLASH_TCSS (0x1a << 16)
149# define DATAFLASH_TCHS (0x1 << 24)
150#endif
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151
152/* NOR flash is not populated, disable it */
0cb77bfa 153#define CONFIG_SYS_NO_FLASH
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154
155/* NAND flash */
156#ifdef CONFIG_CMD_NAND
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157# define CONFIG_NAND_ATMEL
158# define CONFIG_SYS_MAX_NAND_DEVICE 1
159# define CONFIG_SYS_NAND_BASE 0x40000000 /* ATMEL_BASE_CS3 */
160# define CONFIG_SYS_NAND_DBW_8
161# define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
162# define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
163# define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15
164# define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22
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165#endif
166
167/* Ethernet */
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168#define CONFIG_MACB
169#define CONFIG_RMII
0cb77bfa 170#define CONFIG_FIT
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171#define CONFIG_NET_RETRY_COUNT 20
172#undef CONFIG_RESET_PHY_R
173
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174/* USB */
175#define CONFIG_USB_ATMEL
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176#define CONFIG_USB_OHCI_NEW
177#define CONFIG_DOS_PARTITION
178#define CONFIG_SYS_USB_OHCI_CPU_INIT
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179#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000
180#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
181#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
33b1d3f4 182
33b1d3f4 183/* CAN */
0cb77bfa 184#define CONFIG_AT91_CAN
33b1d3f4 185
a380279b 186/* hw-controller addresses */
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187#define CONFIG_ET1100_BASE 0x70000000
188
189#ifdef CONFIG_SYS_USE_DATAFLASH
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190
191/* bootstrap + u-boot + env in dataflash on CS0 */
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192# define CONFIG_ENV_IS_IN_DATAFLASH
193# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
33b1d3f4 194 0x8400)
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195# define CONFIG_ENV_OFFSET 0x4200
196# define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
33b1d3f4 197 CONFIG_ENV_OFFSET)
0cb77bfa 198# define CONFIG_ENV_SIZE 0x4200
33b1d3f4 199
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200#elif CONFIG_SYS_USE_NANDFLASH
201
202/* bootstrap + u-boot + env + linux in nandflash */
203# define CONFIG_ENV_IS_IN_NAND 1
204# define CONFIG_ENV_OFFSET 0xC0000
205# define CONFIG_ENV_SIZE 0x20000
206
207#endif
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208
209#define CONFIG_SYS_PROMPT "=> "
0cb77bfa 210#define CONFIG_SYS_CBSIZE 512
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211#define CONFIG_SYS_MAXARGS 16
212#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
213 sizeof(CONFIG_SYS_PROMPT) + 16)
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214#define CONFIG_SYS_LONGHELP
215#define CONFIG_CMDLINE_EDITING
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216
217/*
218 * Size of malloc() pool
219 */
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220#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
221 128*1024, 0x1000)
33b1d3f4 222
33b1d3f4 223#endif
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