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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
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2 | /* |
3 | * Configuration settings for the SAMA5D4EK board. | |
4 | * | |
5 | * Copyright (C) 2014 Atmel | |
6 | * Bo Shen <[email protected]> | |
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7 | */ |
8 | ||
9 | #ifndef __CONFIG_H | |
10 | #define __CONFIG_H | |
11 | ||
b2d387bc | 12 | #include "at91-sama5_common.h" |
927b901b | 13 | |
927b901b | 14 | /* SDRAM */ |
e61ed48f | 15 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 |
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16 | #define CONFIG_SYS_SDRAM_SIZE 0x20000000 |
17 | ||
85758d8a | 18 | #define CONFIG_SPL_STACK 0x218000 |
927b901b | 19 | |
927b901b | 20 | /* NAND flash */ |
927b901b | 21 | #ifdef CONFIG_CMD_NAND |
927b901b | 22 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
e61ed48f | 23 | #define CONFIG_SYS_NAND_BASE 0x80000000 |
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24 | /* our ALE is AD21 */ |
25 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
26 | /* our CLE is AD22 */ | |
27 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
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28 | #endif |
29 | ||
5a4c9c22 | 30 | /* SPL */ |
5a4c9c22 | 31 | #define CONFIG_SPL_BSS_START_ADDR 0x20000000 |
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32 | #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 |
33 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 | |
34 | ||
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35 | #define CONFIG_SYS_MONITOR_LEN (512 << 10) |
36 | ||
927b901b | 37 | #endif |