[J-u-boot.git] / arch / arm / imx-common / syscounter.c

/*
 * Copyright (C) 2015 Freescale Semiconductor, Inc.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 *
 * The file use ls102xa/timer.c as a reference.
 */

#include <common.h>
#include <asm/io.h>
#include <div64.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/sys_proto.h>
#include <asm/imx-common/syscounter.h>

DECLARE_GLOBAL_DATA_PTR;

/*
 * This function is intended for SHORT delays only.
 * It will overflow at around 10 seconds @ 400MHz,
 * or 20 seconds @ 200MHz.
 */
unsigned long usec2ticks(unsigned long usec)
{
	ulong ticks;

	if (usec < 1000)
		ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
	else
		ticks = ((usec / 10) * (get_tbclk() / 100000));

	return ticks;
}

static inline unsigned long long tick_to_time(unsigned long long tick)
{
	unsigned long freq;

	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));

	tick *= CONFIG_SYS_HZ;
	do_div(tick, freq);

	return tick;
}

static inline unsigned long long us_to_tick(unsigned long long usec)
{
	unsigned long freq;

	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));

	usec = usec * freq  + 999999;
	do_div(usec, 1000000);

	return usec;
}

int timer_init(void)
{
	struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR;
	unsigned long val, freq;

	freq = CONFIG_SC_TIMER_CLK;
	asm("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));

	writel(freq, &sctr->cntfid0);

	/* Enable system counter */
	val = readl(&sctr->cntcr);
	val &= ~(SC_CNTCR_FREQ0 | SC_CNTCR_FREQ1);
	val |= SC_CNTCR_FREQ0 | SC_CNTCR_ENABLE | SC_CNTCR_HDBG;
	writel(val, &sctr->cntcr);

	gd->arch.tbl = 0;
	gd->arch.tbu = 0;

	return 0;
}

unsigned long long get_ticks(void)
{
	unsigned long long now;

	asm("mrrc p15, 0, %Q0, %R0, c14" : "=r" (now));

	gd->arch.tbl = (unsigned long)(now & 0xffffffff);
	gd->arch.tbu = (unsigned long)(now >> 32);

	return now;
}

ulong get_timer_masked(void)
{
	return tick_to_time(get_ticks());
}

ulong get_timer(ulong base)
{
	return get_timer_masked() - base;
}

void __udelay(unsigned long usec)
{
	unsigned long long tmp;
	ulong tmo;

	tmo = us_to_tick(usec);
	tmp = get_ticks() + tmo;	/* get current timestamp */

	while (get_ticks() < tmp)	/* loop till event */
		 /*NOP*/;
}

/*
 * This function is derived from PowerPC code (timebase clock frequency).
 * On ARM it returns the number of timer ticks per second.
 */
ulong get_tbclk(void)
{
	unsigned long freq;

	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));

	return freq;
}
Commit	Line	Data
69535741 AA	1	/*
	2	* Copyright (C) 2015 Freescale Semiconductor, Inc.
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*
	6	* The file use ls102xa/timer.c as a reference.
	7	*/
	8
	9	#include <common.h>
	10	#include <asm/io.h>
	11	#include <div64.h>
	12	#include <asm/arch/imx-regs.h>
	13	#include <asm/arch/sys_proto.h>
	14	#include <asm/imx-common/syscounter.h>
	15
	16	DECLARE_GLOBAL_DATA_PTR;
	17
	18	/*
	19	* This function is intended for SHORT delays only.
	20	* It will overflow at around 10 seconds @ 400MHz,
	21	* or 20 seconds @ 200MHz.
	22	*/
	23	unsigned long usec2ticks(unsigned long usec)
	24	{
	25	ulong ticks;
	26
	27	if (usec < 1000)
	28	ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
	29	else
	30	ticks = ((usec / 10) * (get_tbclk() / 100000));
	31
	32	return ticks;
	33	}
	34
	35	static inline unsigned long long tick_to_time(unsigned long long tick)
	36	{
	37	unsigned long freq;
	38
	39	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
	40
	41	tick *= CONFIG_SYS_HZ;
	42	do_div(tick, freq);
	43
	44	return tick;
	45	}
	46
	47	static inline unsigned long long us_to_tick(unsigned long long usec)
	48	{
	49	unsigned long freq;
	50
	51	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
	52
	53	usec = usec * freq + 999999;
	54	do_div(usec, 1000000);
	55
	56	return usec;
	57	}
	58
	59	int timer_init(void)
	60	{
	61	struct sctr_regs sctr = (struct sctr_regs )SCTR_BASE_ADDR;
	62	unsigned long val, freq;
	63
	64	freq = CONFIG_SC_TIMER_CLK;
65	asm("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
66
67	writel(freq, &sctr->cntfid0);
68
69	/* Enable system counter */
70	val = readl(&sctr->cntcr);
71	val &= ~(SC_CNTCR_FREQ0 \| SC_CNTCR_FREQ1);
72	val \|= SC_CNTCR_FREQ0 \| SC_CNTCR_ENABLE \| SC_CNTCR_HDBG;
73	writel(val, &sctr->cntcr);
74
75	gd->arch.tbl = 0;
76	gd->arch.tbu = 0;
77
78	return 0;
79	}
80
81	unsigned long long get_ticks(void)
82	{
83	unsigned long long now;
84
85	asm("mrrc p15, 0, %Q0, %R0, c14" : "=r" (now));
86
87	gd->arch.tbl = (unsigned long)(now & 0xffffffff);
88	gd->arch.tbu = (unsigned long)(now >> 32);
89
90	return now;
91	}
92
93	ulong get_timer_masked(void)
94	{
95	return tick_to_time(get_ticks());
96	}
97
98	ulong get_timer(ulong base)
99	{
100	return get_timer_masked() - base;
101	}
102
103	void __udelay(unsigned long usec)
104	{
105	unsigned long long tmp;
106	ulong tmo;
107
108	tmo = us_to_tick(usec);
109	tmp = get_ticks() + tmo; /* get current timestamp */
110
111	while (get_ticks() < tmp) /* loop till event */
112	/NOP/;
113	}
114
115	/*
116	* This function is derived from PowerPC code (timebase clock frequency).
117	* On ARM it returns the number of timer ticks per second.
118	*/
119	ulong get_tbclk(void)
120	{
121	unsigned long freq;
122
123	asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
124
125	return freq;
126	}