projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 25a9f974 MS |
1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* | |
| 3 | * logicore_dp_tx.h | |
| 4 | * | |
| 5 | * Driver for XILINX LogiCore DisplayPort v6.1 TX (Source) | |
| 6 | * | |
| 7 | * (C) Copyright 2016 | |
| 8 | * Dirk Eibach, Guntermann & Drunck GmbH, [email protected] | |
| 9 | */ | |
| 10 | ||
| 11 | #ifndef __GDSYS_LOGICORE_DP_TX_H__ | |
| 12 | #define __GDSYS_LOGICORE_DP_TX_H__ | |
| 13 | ||
| 14 | /* | |
| 15 | * struct logicore_dp_tx_msa - Main Stream Attributes (MSA) | |
| 16 | * @pixel_clock_hz: The pixel clock of the stream (in Hz) | |
| 17 | * @bits_per_color: Number of bits per color component | |
| 18 | * @h_active: Horizontal active resolution (pixels) | |
| 19 | * @h_start: Horizontal blank start (in pixels) | |
| 20 | * @h_sync_polarity: Horizontal sync polarity | |
| 21 | * (0 = negative | 1 = positive) | |
| 22 | * @h_sync_width: Horizontal sync width (pixels) | |
| 23 | * @h_total: Horizontal total (pixels) | |
| 24 | * @v_active: Vertical active resolution (lines) | |
| 25 | * @v_start: Vertical blank start (in lines). | |
| 26 | * @v_sync_polarity: Vertical sync polarity | |
| 27 | * (0 = negative | 1 = positive) | |
| 28 | * @v_sync_width: Vertical sync width (lines) | |
| 29 | * @v_total: Vertical total (lines) | |
| 30 | * @override_user_pixel_width: If true, the value stored for user_pixel_width | |
| 31 | * will be used as the pixel width. | |
| 32 | * @user_pixel_width: The width of the user data input port. | |
| 33 | * | |
| 34 | * This is a stripped down version of struct main_stream_attributes that | |
| 35 | * contains only the parameters that are not set by cfg_msa_recalculate() | |
| 36 | */ | |
| 37 | struct logicore_dp_tx_msa { | |
| 38 | u32 pixel_clock_hz; | |
| 39 | u32 bits_per_color; | |
| 40 | u16 h_active; | |
| 41 | u32 h_start; | |
| 42 | bool h_sync_polarity; | |
| 43 | u16 h_sync_width; | |
| 44 | u16 h_total; | |
| 45 | u16 v_active; | |
| 46 | u32 v_start; | |
| 47 | bool v_sync_polarity; | |
| 48 | u16 v_sync_width; | |
| 49 | u16 v_total; | |
| 50 | bool override_user_pixel_width; | |
| 51 | u32 user_pixel_width; | |
| 52 | }; | |
| 53 | ||
| 54 | #endif /* __GDSYS_LOGICORE_DP_TX_H__ */ |