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98d62e61 PB |
1 | /* |
2 | * Copyright (C) 2015 Beckhoff Automation GmbH & Co. KG | |
3 | * Patrick Bruenn <[email protected]> | |
4 | * | |
5 | * Configuration settings for Beckhoff CX9020. | |
6 | * | |
7 | * Based on Freescale's Linux i.MX mx53loco.h file: | |
8 | * Copyright (C) 2010-2011 Freescale Semiconductor. | |
9 | * | |
10 | * SPDX-License-Identifier: GPL-2.0+ | |
11 | */ | |
12 | ||
13 | #ifndef __CONFIG_H | |
14 | #define __CONFIG_H | |
15 | ||
16 | #include <asm/arch/imx-regs.h> | |
17 | ||
18 | #define CONFIG_CMDLINE_TAG | |
19 | #define CONFIG_SETUP_MEMORY_TAGS | |
20 | #define CONFIG_INITRD_TAG | |
21 | ||
22 | #define CONFIG_SYS_FSL_CLK | |
23 | ||
24 | /* Size of malloc() pool */ | |
25 | #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) | |
26 | ||
98d62e61 PB |
27 | #define CONFIG_MXC_GPIO |
28 | #define CONFIG_REVISION_TAG | |
29 | ||
30 | #define CONFIG_MXC_UART_BASE UART2_BASE | |
31 | ||
32 | #define CONFIG_FPGA_COUNT 1 | |
33 | ||
34 | /* MMC Configs */ | |
35 | #define CONFIG_FSL_ESDHC | |
36 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 | |
37 | #define CONFIG_SYS_FSL_ESDHC_NUM 2 | |
38 | ||
98d62e61 | 39 | /* bootz: zImage/initrd.img support */ |
98d62e61 PB |
40 | |
41 | /* Eth Configs */ | |
42 | #define CONFIG_MII | |
43 | #define IMX_FEC_BASE FEC_BASE_ADDR | |
44 | #define CONFIG_ETHPRIME "FEC0" | |
45 | #define CONFIG_FEC_MXC_PHYADDR 0x1F | |
46 | ||
47 | /* USB Configs */ | |
98d62e61 | 48 | #define CONFIG_USB_EHCI_MX5 |
98d62e61 PB |
49 | #define CONFIG_USB_HOST_ETHER |
50 | #define CONFIG_USB_ETHER_ASIX | |
51 | #define CONFIG_USB_ETHER_MCS7830 | |
52 | #define CONFIG_USB_ETHER_SMSC95XX | |
53 | #define CONFIG_MXC_USB_PORT 1 | |
54 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | |
55 | #define CONFIG_MXC_USB_FLAGS 0 | |
56 | ||
57 | /* allow to overwrite serial and ethaddr */ | |
58 | #define CONFIG_ENV_OVERWRITE | |
59 | #define CONFIG_CONS_INDEX 1 | |
98d62e61 PB |
60 | |
61 | /* Command definition */ | |
62 | #define CONFIG_SUPPORT_RAW_INITRD | |
63 | ||
64 | #define CONFIG_LOADADDR 0x70010000 /* loadaddr env var */ | |
65 | #define CONFIG_SYS_TEXT_BASE 0x77800000 | |
66 | ||
67 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
f8e63850 | 68 | "fdt_addr_r=0x71ff0000\0" \ |
bc104a70 | 69 | "pxefile_addr_r=0x73000000\0" \ |
f8e63850 | 70 | "ramdisk_addr_r=0x72000000\0" \ |
98d62e61 PB |
71 | "console=ttymxc1,115200\0" \ |
72 | "uenv=/boot/uEnv.txt\0" \ | |
73 | "optargs=\0" \ | |
74 | "cmdline=\0" \ | |
75 | "mmcdev=0\0" \ | |
76 | "mmcpart=1\0" \ | |
77 | "mmcrootfstype=ext4 rootwait fixrtc\0" \ | |
78 | "mmcargs=setenv bootargs console=${console} " \ | |
79 | "${optargs} " \ | |
80 | "root=/dev/mmcblk${mmcdev}p${mmcpart} ro " \ | |
81 | "rootfstype=${mmcrootfstype} " \ | |
82 | "${cmdline}\0" \ | |
83 | "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ | |
bc104a70 | 84 | "loadpxe=dhcp;setenv kernel_addr_r ${loadaddr};pxe get;pxe boot;\0" \ |
f8e63850 | 85 | "loadrd=load mmc ${bootpart} ${ramdisk_addr_r} ${bootdir}/${rdfile};" \ |
98d62e61 PB |
86 | "setenv rdsize ${filesize}\0" \ |
87 | "loadfdt=echo loading ${fdt_path} ...;" \ | |
f8e63850 | 88 | "load mmc ${bootpart} ${fdt_addr_r} ${fdt_path}\0" \ |
98d62e61 PB |
89 | "mmcboot=mmc dev ${mmcdev}; " \ |
90 | "if mmc rescan; then " \ | |
91 | "echo SD/MMC found on device ${mmcdev};" \ | |
92 | "echo Checking for: ${uenv} ...;" \ | |
93 | "setenv bootpart ${mmcdev}:${mmcpart};" \ | |
94 | "if test -e mmc ${bootpart} ${uenv}; then " \ | |
95 | "load mmc ${bootpart} ${loadaddr} ${uenv};" \ | |
96 | "env import -t ${loadaddr} ${filesize};" \ | |
97 | "echo Loaded environment from ${uenv};" \ | |
98 | "if test -n ${dtb}; then " \ | |
99 | "setenv fdt_file ${dtb};" \ | |
100 | "echo Using: dtb=${fdt_file} ...;" \ | |
101 | "fi;" \ | |
102 | "echo Checking for uname_r in ${uenv}...;" \ | |
103 | "if test -n ${uname_r}; then " \ | |
104 | "echo Running uname_boot ...;" \ | |
105 | "run uname_boot;" \ | |
106 | "fi;" \ | |
107 | "fi;" \ | |
108 | "fi;\0" \ | |
109 | "uname_boot="\ | |
110 | "setenv bootdir /boot; " \ | |
111 | "setenv bootfile vmlinuz-${uname_r}; " \ | |
112 | "setenv ccatfile /boot/ccat.rbf; " \ | |
113 | "echo loading CCAT firmware from ${ccatfile}; " \ | |
114 | "load mmc ${bootpart} ${loadaddr} ${ccatfile}; " \ | |
115 | "fpga load 0 ${loadaddr} ${filesize}; " \ | |
116 | "if test -e mmc ${bootpart} ${bootdir}/${bootfile}; then " \ | |
117 | "echo loading ${bootdir}/${bootfile} ...; " \ | |
118 | "run loadimage;" \ | |
119 | "setenv fdt_path /boot/dtbs/${uname_r}/${fdt_file}; " \ | |
120 | "if test -e mmc ${bootpart} ${fdt_path}; then " \ | |
121 | "run loadfdt;" \ | |
122 | "else " \ | |
123 | "echo; echo unable to find ${fdt_file} ...;" \ | |
124 | "echo booting legacy ...;"\ | |
125 | "run mmcargs;" \ | |
126 | "echo debug: [${bootargs}] ... ;" \ | |
127 | "echo debug: [bootz ${loadaddr}] ... ;" \ | |
128 | "bootz ${loadaddr}; " \ | |
129 | "fi;" \ | |
130 | "run mmcargs;" \ | |
131 | "echo debug: [${bootargs}] ... ;" \ | |
f8e63850 PB |
132 | "echo debug: [bootz ${loadaddr} - ${fdt_addr_r}];" \ |
133 | "bootz ${loadaddr} - ${fdt_addr_r}; " \ | |
bc104a70 PB |
134 | "else " \ |
135 | "echo loading from dhcp ...; " \ | |
136 | "run loadpxe; " \ | |
98d62e61 PB |
137 | "fi;\0" |
138 | ||
139 | #define CONFIG_BOOTCOMMAND \ | |
140 | "run mmcboot;" | |
141 | ||
142 | #define CONFIG_ARP_TIMEOUT 200UL | |
143 | ||
144 | /* Miscellaneous configurable options */ | |
145 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
146 | #define CONFIG_AUTO_COMPLETE | |
147 | #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ | |
148 | ||
98d62e61 PB |
149 | #define CONFIG_SYS_MEMTEST_START 0x70000000 |
150 | #define CONFIG_SYS_MEMTEST_END 0x70010000 | |
151 | ||
152 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
153 | ||
154 | #define CONFIG_CMDLINE_EDITING | |
155 | ||
156 | /* Physical Memory Map */ | |
157 | #define CONFIG_NR_DRAM_BANKS 2 | |
158 | #define PHYS_SDRAM_1 CSD0_BASE_ADDR | |
159 | #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) | |
160 | #define PHYS_SDRAM_2 CSD1_BASE_ADDR | |
161 | #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) | |
162 | #define PHYS_SDRAM_SIZE (gd->ram_size) | |
163 | ||
164 | #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) | |
165 | #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) | |
166 | #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) | |
167 | ||
168 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
169 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
170 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
171 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
172 | ||
e856bdcf | 173 | /* environment organization */ |
98d62e61 PB |
174 | #define CONFIG_ENV_OFFSET (6 * 64 * 1024) |
175 | #define CONFIG_ENV_SIZE (8 * 1024) | |
98d62e61 PB |
176 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
177 | ||
178 | /* Framebuffer and LCD */ | |
179 | #define CONFIG_PREBOOT | |
180 | #define CONFIG_VIDEO_IPUV3 | |
181 | #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE | |
182 | #define CONFIG_VIDEO_BMP_RLE8 | |
183 | #define CONFIG_SPLASH_SCREEN | |
184 | #define CONFIG_BMP_16BPP | |
185 | #define CONFIG_VIDEO_LOGO | |
186 | #define CONFIG_IPUV3_CLK 200000000 | |
187 | ||
188 | #endif /* __CONFIG_H */ |