projects / J-u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 46b3ff82 WE |
1 | CONFIG_ARM=y |
| 2 | CONFIG_SKIP_LOWLEVEL_INIT=y | |
| 3 | CONFIG_ARCH_K3=y | |
| 4 | CONFIG_SYS_MALLOC_LEN=0x2000000 | |
| 5 | CONFIG_SYS_MALLOC_F_LEN=0x8000 | |
| 6 | CONFIG_SPL_GPIO=y | |
| 7 | CONFIG_SPL_LIBCOMMON_SUPPORT=y | |
| 8 | CONFIG_SPL_LIBGENERIC_SUPPORT=y | |
| 9 | CONFIG_NR_DRAM_BANKS=2 | |
| 10 | CONFIG_SOC_K3_AM642=y | |
| 11 | CONFIG_K3_ATF_LOAD_ADDR=0x701c0000 | |
| 12 | CONFIG_TARGET_PHYCORE_AM64X_A53=y | |
| 5476cc00 | 13 | CONFIG_PHYTEC_SOM_DETECTION=y |
| 46b3ff82 WE |
14 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
| 15 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 | |
| 16 | CONFIG_ENV_SIZE=0x20000 | |
| 001550b4 | 17 | CONFIG_ENV_OFFSET=0x680000 |
| 46b3ff82 WE |
18 | CONFIG_DM_GPIO=y |
| 19 | CONFIG_SPL_DM_SPI=y | |
| 67557588 | 20 | CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am642-phyboard-electra-rdk" |
| 46b3ff82 WE |
21 | CONFIG_OF_LIBFDT_OVERLAY=y |
| 22 | CONFIG_DM_RESET=y | |
| 23 | CONFIG_SPL_MMC=y | |
| 24 | CONFIG_SPL_SERIAL=y | |
| 25 | CONFIG_SPL_DRIVERS_MISC=y | |
| 26 | CONFIG_SPL_STACK_R_ADDR=0x82000000 | |
| cfb88eb2 | 27 | CONFIG_SPL_TEXT_BASE=0x80080000 |
| 18e791c4 TR |
28 | CONFIG_SPL_HAS_BSS_LINKER_SECTION=y |
| 29 | CONFIG_SPL_BSS_START_ADDR=0x80a00000 | |
| 30 | CONFIG_SPL_BSS_MAX_SIZE=0x80000 | |
| 31 | CONFIG_SPL_STACK_R=y | |
| 001550b4 | 32 | CONFIG_ENV_OFFSET_REDUND=0x6c0000 |
| 46b3ff82 WE |
33 | CONFIG_SPL_FS_FAT=y |
| 34 | CONFIG_SPL_LIBDISK_SUPPORT=y | |
| 35 | CONFIG_SPL_SPI_FLASH_SUPPORT=y | |
| 36 | CONFIG_SPL_SPI=y | |
| 37 | # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set | |
| 38 | CONFIG_SPL_LOAD_FIT=y | |
| 39 | CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 | |
| 40 | CONFIG_BOOTSTD_FULL=y | |
| d0bc2ac2 | 41 | CONFIG_OF_BOARD_SETUP=y |
| 8b4a72f5 | 42 | CONFIG_BOOTCOMMAND="run ${boot}boot; bootflow scan -lb" |
| 46b3ff82 | 43 | CONFIG_DEFAULT_FDT_FILE="oftree" |
| 03de305e | 44 | CONFIG_BOARD_LATE_INIT=y |
| 46b3ff82 | 45 | CONFIG_SPL_MAX_SIZE=0x180000 |
| 46b3ff82 WE |
46 | CONFIG_SPL_BOARD_INIT=y |
| 47 | CONFIG_SPL_SYS_MALLOC_SIMPLE=y | |
| 46b3ff82 WE |
48 | CONFIG_SPL_SYS_MALLOC=y |
| 49 | CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 | |
| 2a00d73d | 50 | CONFIG_SPL_SYS_MMCSD_RAW_MODE=y |
| 46b3ff82 WE |
51 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 |
| 52 | CONFIG_SPL_DMA=y | |
| 53 | CONFIG_SPL_ENV_SUPPORT=y | |
| 54 | CONFIG_SPL_ETH=y | |
| 55 | CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" | |
| 56 | CONFIG_SPL_I2C=y | |
| 57 | CONFIG_SPL_DM_MAILBOX=y | |
| 58 | CONFIG_SPL_DM_SPI_FLASH=y | |
| 59 | CONFIG_SPL_NET=y | |
| 60 | CONFIG_SPL_NET_VCI_STRING="AM64X U-Boot A53 SPL" | |
| 61 | CONFIG_SPL_POWER_DOMAIN=y | |
| 46b3ff82 WE |
62 | CONFIG_SPL_RAM_DEVICE=y |
| 63 | # CONFIG_SPL_SPI_FLASH_TINY is not set | |
| 64 | CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y | |
| 65 | CONFIG_SPL_SPI_LOAD=y | |
| 66 | CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 | |
| 67 | CONFIG_SPL_YMODEM_SUPPORT=y | |
| 68 | CONFIG_CMD_ASKENV=y | |
| 69 | CONFIG_CMD_DFU=y | |
| 70 | CONFIG_CMD_GPT=y | |
| 71 | CONFIG_CMD_I2C=y | |
| 72 | CONFIG_CMD_MMC=y | |
| 9fa48655 | 73 | CONFIG_CMD_MTD=y |
| 46b3ff82 | 74 | CONFIG_CMD_USB=y |
| e3349111 DS |
75 | CONFIG_CMD_CACHE=y |
| 76 | CONFIG_CMD_RTC=y | |
| 46b3ff82 | 77 | CONFIG_CMD_TIME=y |
| e3349111 | 78 | CONFIG_CMD_SMC=y |
| 46b3ff82 WE |
79 | CONFIG_OF_CONTROL=y |
| 80 | CONFIG_SPL_OF_CONTROL=y | |
| cfb88eb2 | 81 | CONFIG_OF_OVERLAY_LIST="ti/k3-am6xx-phycore-disable-spi-nor ti/k3-am6xx-phycore-disable-rtc ti/k3-am6xx-phycore-disable-eth-phy ti/k3-am6xx-phycore-qspi-nor" |
| 46b3ff82 WE |
82 | CONFIG_MULTI_DTB_FIT=y |
| 83 | CONFIG_SPL_MULTI_DTB_FIT=y | |
| 84 | CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y | |
| 85 | CONFIG_ENV_IS_IN_MMC=y | |
| 001550b4 | 86 | CONFIG_SYS_REDUNDAND_ENVIRONMENT=y |
| 46b3ff82 WE |
87 | CONFIG_SYS_MMC_ENV_DEV=1 |
| 88 | CONFIG_NET_RANDOM_ETHADDR=y | |
| 89 | CONFIG_SPL_DM=y | |
| 90 | CONFIG_SPL_DM_SEQ_ALIAS=y | |
| 91 | CONFIG_REGMAP=y | |
| 92 | CONFIG_SPL_REGMAP=y | |
| 93 | CONFIG_SPL_SYSCON=y | |
| 94 | CONFIG_SPL_OF_TRANSLATE=y | |
| 95 | CONFIG_CLK=y | |
| 96 | CONFIG_SPL_CLK=y | |
| 97 | CONFIG_SPL_CLK_CCF=y | |
| 98 | CONFIG_CLK_CCF=y | |
| 99 | CONFIG_CLK_TI_SCI=y | |
| 100 | CONFIG_DFU_MMC=y | |
| 101 | CONFIG_DFU_RAM=y | |
| 102 | CONFIG_DFU_SF=y | |
| 103 | CONFIG_SYS_DFU_DATA_BUF_SIZE=0x40000 | |
| 104 | CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000 | |
| 105 | CONFIG_DMA_CHANNELS=y | |
| 106 | CONFIG_TI_K3_NAVSS_UDMA=y | |
| 107 | CONFIG_TI_SCI_PROTOCOL=y | |
| 108 | CONFIG_DM_PCA953X=y | |
| 109 | CONFIG_SPL_DM_PCA953X=y | |
| 110 | CONFIG_DM_I2C=y | |
| 111 | CONFIG_I2C_SET_DEFAULT_BUS_NUM=y | |
| 112 | CONFIG_DM_I2C_GPIO=y | |
| 113 | CONFIG_SYS_I2C_OMAP24XX=y | |
| 114 | CONFIG_DM_MAILBOX=y | |
| 115 | CONFIG_K3_SEC_PROXY=y | |
| 116 | CONFIG_SUPPORT_EMMC_BOOT=y | |
| 117 | CONFIG_MMC_HS400_SUPPORT=y | |
| 118 | CONFIG_SPL_MMC_HS400_SUPPORT=y | |
| 119 | CONFIG_MMC_SDHCI=y | |
| 120 | CONFIG_MMC_SDHCI_ADMA=y | |
| 121 | CONFIG_SPL_MMC_SDHCI_ADMA=y | |
| 122 | CONFIG_MMC_SDHCI_AM654=y | |
| 123 | CONFIG_MTD=y | |
| 124 | CONFIG_DM_SPI_FLASH=y | |
| 125 | CONFIG_SPI_FLASH_SFDP_SUPPORT=y | |
| 126 | # CONFIG_SPI_FLASH_SMART_HWCAPS is not set | |
| 127 | CONFIG_SPI_FLASH_SOFT_RESET=y | |
| 128 | CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y | |
| 46b3ff82 WE |
129 | CONFIG_SPI_FLASH_STMICRO=y |
| 130 | CONFIG_SPI_FLASH_MT35XU=y | |
| 9fa48655 | 131 | CONFIG_SPI_FLASH_MTD=y |
| 46b3ff82 WE |
132 | CONFIG_MULTIPLEXER=y |
| 133 | CONFIG_MUX_MMIO=y | |
| 134 | CONFIG_PHY_TI_DP83867=y | |
| 135 | CONFIG_PHY_FIXED=y | |
| 136 | CONFIG_TI_AM65_CPSW_NUSS=y | |
| 137 | CONFIG_PHY=y | |
| 138 | CONFIG_SPL_PHY=y | |
| 139 | CONFIG_PHY_CADENCE_TORRENT=y | |
| 140 | CONFIG_PHY_J721E_WIZ=y | |
| 141 | CONFIG_PINCTRL=y | |
| 142 | CONFIG_SPL_PINCTRL=y | |
| 143 | CONFIG_PINCTRL_SINGLE=y | |
| 144 | CONFIG_POWER_DOMAIN=y | |
| 145 | CONFIG_TI_SCI_POWER_DOMAIN=y | |
| 146 | CONFIG_K3_SYSTEM_CONTROLLER=y | |
| 147 | CONFIG_REMOTEPROC_TI_K3_ARM64=y | |
| 148 | CONFIG_RESET_TI_SCI=y | |
| 149 | CONFIG_DM_RTC=y | |
| 150 | CONFIG_RTC_RV3028=y | |
| 151 | CONFIG_DM_SERIAL=y | |
| 152 | CONFIG_SOC_DEVICE=y | |
| 153 | CONFIG_SOC_DEVICE_TI_K3=y | |
| 154 | CONFIG_SOC_TI=y | |
| 155 | CONFIG_SPI=y | |
| 156 | CONFIG_DM_SPI=y | |
| 157 | CONFIG_CADENCE_QSPI=y | |
| 158 | CONFIG_SYSRESET=y | |
| 159 | CONFIG_SPL_SYSRESET=y | |
| 160 | CONFIG_SYSRESET_TI_SCI=y | |
| 161 | CONFIG_DM_THERMAL=y | |
| 162 | CONFIG_USB=y | |
| 163 | CONFIG_DM_USB_GADGET=y | |
| 164 | CONFIG_SPL_DM_USB_GADGET=y | |
| 165 | CONFIG_USB_XHCI_HCD=y | |
| 166 | CONFIG_USB_CDNS3=y | |
| 167 | CONFIG_USB_CDNS3_GADGET=y | |
| 168 | CONFIG_USB_CDNS3_HOST=y | |
| 169 | CONFIG_USB_GADGET=y | |
| 371b379e | 170 | CONFIG_USB_GADGET_MANUFACTURER="PHYTEC" |
| 46b3ff82 WE |
171 | CONFIG_USB_GADGET_VENDOR_NUM=0x0451 |
| 172 | CONFIG_USB_GADGET_PRODUCT_NUM=0x6165 | |
| 173 | CONFIG_USB_GADGET_DOWNLOAD=y | |
| 174 | CONFIG_USB_FUNCTION_MASS_STORAGE=y | |
| 175 | CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 |